refactor: serialize CH390 runtime SPI access

Move runtime CH390 transactions behind a single ch390_runtime owner so main, lwIP glue, and EXTI no longer compete for SPI access. Keep the system stable under runtime load and capture the remaining CH390 readback failure as a credible low-level device-response issue in the handoff logs.
2026-04-01 03:39:08 +08:00
parent e5fffaccdf
commit 14a532290d
11 changed files with 892 additions and 255 deletions
@@ -44,7 +44,7 @@ void MX_SPI1_Init(void)
  hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;   /* CH390 requires CPOL=High (Mode 3) */
  hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;        /* CH390 requires CPHA=2Edge (Mode 3) */
  hspi1.Init.NSS = SPI_NSS_SOFT;                /* Software CS control for CH390 */
-  hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; /* 72MHz/8 = 9MHz (CH390 max 10MHz) */
+  hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64; /* 72MHz/64 = 1.125MHz for low-speed CH390 bring-up */
  hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
  hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
  hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;