refactor: serialize CH390 runtime SPI access
Move runtime CH390 transactions behind a single ch390_runtime owner so main, lwIP glue, and EXTI no longer compete for SPI access. Keep the system stable under runtime load and capture the remaining CH390 readback failure as a credible low-level device-response issue in the handoff logs.
This commit is contained in:
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#include "ch390_runtime.h"
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#include "CH390.h"
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#include "CH390_Interface.h"
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#include "SEGGER_RTT.h"
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#include "ethernetif.h"
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#include "stm32f1xx_hal.h"
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#include "lwip/etharp.h"
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#include "lwip/pbuf.h"
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#include "lwip/stats.h"
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static volatile uint8_t g_ch390_irq_pending;
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static uint8_t g_ch390_ready;
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static ch390_diag_t g_diag;
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static void ch390_runtime_refresh_diag(void)
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{
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g_diag.vendor_id = ch390_get_vendor_id();
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g_diag.product_id = ch390_get_product_id();
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g_diag.revision = ch390_get_revision();
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g_diag.nsr = ch390_read_reg(CH390_NSR);
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g_diag.ncr = ch390_read_reg(CH390_NCR);
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g_diag.rcr = ch390_read_reg(CH390_RCR);
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g_diag.imr = ch390_read_reg(CH390_IMR);
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g_diag.intcr = ch390_read_reg(CH390_INTCR);
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g_diag.gpr = ch390_read_reg(CH390_GPR);
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g_diag.isr = ch390_read_reg(CH390_ISR);
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g_diag.link_up = (uint8_t)ch390_get_link_status();
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g_diag.id_valid = (uint8_t)((g_diag.vendor_id != 0x0000u) &&
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(g_diag.vendor_id != 0xFFFFu) &&
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(g_diag.product_id != 0x0000u) &&
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(g_diag.product_id != 0xFFFFu));
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}
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static struct pbuf *ch390_runtime_input(struct netif *netif)
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{
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struct ethernetif *ethernetif = (struct ethernetif *)netif->state;
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struct pbuf *p = NULL;
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struct pbuf *q;
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uint16_t len;
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uint8_t rx_ready;
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uint8_t rx_header[4];
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ch390_read_reg(CH390_MRCMDX);
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rx_ready = ch390_read_reg(CH390_MRCMDX);
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if (rx_ready & CH390_PKT_ERR) {
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ch390_write_reg(CH390_RCR, 0u);
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ch390_write_reg(CH390_MPTRCR, 0x01u);
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ch390_write_reg(CH390_MRRH, 0x0Cu);
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ch390_delay_us(1000u);
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ch390_write_reg(CH390_RCR, RCR_RXEN | RCR_DIS_CRC);
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ethernetif->rx_len = 0u;
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LINK_STATS_INC(link.drop);
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return NULL;
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}
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if ((rx_ready & CH390_PKT_RDY) == 0u) {
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ethernetif->rx_len = 0u;
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return NULL;
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}
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ch390_read_mem(rx_header, 4);
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ethernetif->rx_status = rx_header[1];
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ethernetif->rx_len = (uint16_t)(((uint16_t)rx_header[2] | ((uint16_t)rx_header[3] << 8)) - 4u);
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if ((ethernetif->rx_status & 0x3Fu) != 0u || ethernetif->rx_len == 0u || ethernetif->rx_len > 1520u) {
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ch390_drop_packet((uint16_t)(ethernetif->rx_len + 4u));
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LINK_STATS_INC(link.drop);
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return NULL;
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}
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len = ethernetif->rx_len;
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#if ETH_PAD_SIZE
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len += ETH_PAD_SIZE;
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#endif
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p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
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if (p != NULL) {
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#if ETH_PAD_SIZE
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pbuf_remove_header(p, ETH_PAD_SIZE);
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#endif
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for (q = p; q != NULL; q = q->next) {
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ch390_read_mem((uint8_t *)q->payload, q->len);
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}
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#if ETH_PAD_SIZE
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pbuf_add_header(p, ETH_PAD_SIZE);
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#endif
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ch390_drop_packet(4u);
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LINK_STATS_INC(link.recv);
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} else {
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ch390_drop_packet((uint16_t)(ethernetif->rx_len + 4u));
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LINK_STATS_INC(link.memerr);
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LINK_STATS_INC(link.drop);
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}
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return p;
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}
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void ch390_runtime_init(struct netif *netif, const uint8_t *mac)
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{
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struct ethernetif *ethernetif = (struct ethernetif *)netif->state;
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SEGGER_RTT_WriteString(0, "ETH init: gpio\r\n");
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ch390_gpio_init();
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SEGGER_RTT_WriteString(0, "ETH init: spi\r\n");
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ch390_spi_init();
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SEGGER_RTT_WriteString(0, "ETH init: reset\r\n");
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ch390_hardware_reset();
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SEGGER_RTT_WriteString(0, "ETH init: default\r\n");
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ch390_default_config();
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SEGGER_RTT_WriteString(0, "ETH init: mac\r\n");
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ch390_set_mac_address((uint8_t *)mac);
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netif->hwaddr_len = ETHARP_HWADDR_LEN;
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SEGGER_RTT_WriteString(0, "ETH init: getmac\r\n");
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ch390_get_mac(netif->hwaddr);
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netif->mtu = 1500;
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netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
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ethernetif->rx_len = 0u;
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ethernetif->rx_status = 0u;
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ch390_runtime_refresh_diag();
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g_ch390_ready = g_diag.id_valid;
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SEGGER_RTT_WriteString(0, "ETH init: irq\r\n");
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ch390_interrupt_init();
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SEGGER_RTT_WriteString(0, "ETH init: done\r\n");
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}
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void ch390_runtime_set_irq_pending(void)
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{
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g_ch390_irq_pending = 1u;
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}
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void ch390_runtime_poll(struct netif *netif)
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{
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uint8_t int_status;
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if (!g_ch390_ready) {
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return;
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}
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if (g_ch390_irq_pending == 0u) {
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return;
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}
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g_ch390_irq_pending = 0u;
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int_status = ch390_read_reg(CH390_ISR);
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ch390_write_reg(CH390_ISR, int_status);
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if ((int_status & ISR_LNKCHG) != 0u) {
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ch390_runtime_check_link(netif);
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}
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if ((int_status & ISR_ROS) != 0u) {
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LINK_STATS_INC(link.err);
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}
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if ((int_status & ISR_PR) != 0u) {
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uint8_t loops = 0u;
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while (loops++ < 8u) {
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struct pbuf *p = ch390_runtime_input(netif);
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if (p == NULL) {
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break;
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}
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if (netif->input(p, netif) != ERR_OK) {
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pbuf_free(p);
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}
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}
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}
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}
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void ch390_runtime_check_link(struct netif *netif)
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{
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uint8_t link_up;
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if (!g_ch390_ready) {
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netif_set_link_down(netif);
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return;
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}
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link_up = (uint8_t)ch390_get_link_status();
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if (link_up) {
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if (!netif_is_link_up(netif)) {
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netif_set_link_up(netif);
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}
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} else if (netif_is_link_up(netif)) {
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netif_set_link_down(netif);
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}
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}
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err_t ch390_runtime_output(struct netif *netif, struct pbuf *p)
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{
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struct pbuf *q;
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uint32_t start_tick;
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LWIP_UNUSED_ARG(netif);
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if (!g_ch390_ready) {
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LINK_STATS_INC(link.drop);
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return ERR_IF;
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}
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#if ETH_PAD_SIZE
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pbuf_remove_header(p, ETH_PAD_SIZE);
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#endif
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start_tick = HAL_GetTick();
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while (ch390_read_reg(CH390_TCR) & TCR_TXREQ) {
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if ((HAL_GetTick() - start_tick) > 10u) {
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#if ETH_PAD_SIZE
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pbuf_add_header(p, ETH_PAD_SIZE);
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#endif
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LINK_STATS_INC(link.drop);
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return ERR_TIMEOUT;
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}
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}
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for (q = p; q != NULL; q = q->next) {
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ch390_write_mem((uint8_t *)q->payload, q->len);
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}
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ch390_write_reg(CH390_TXPLL, p->tot_len & 0xFFu);
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ch390_write_reg(CH390_TXPLH, (p->tot_len >> 8) & 0xFFu);
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ch390_send_request();
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#if ETH_PAD_SIZE
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pbuf_add_header(p, ETH_PAD_SIZE);
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#endif
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LINK_STATS_INC(link.xmit);
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return ERR_OK;
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}
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void ch390_runtime_get_diag(ch390_diag_t *diag)
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{
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if (diag != NULL) {
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ch390_runtime_refresh_diag();
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*diag = g_diag;
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}
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}
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bool ch390_runtime_is_ready(void)
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{
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return g_ch390_ready != 0u;
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}
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