feat: 完成TCP2UART透传核心集成
集成CH390驱动、LwIP协议栈和FreeRTOS多任务透传框架，确保TCP Server/Client与UART链路按配置稳定联动。
This commit is contained in:
@@ -0,0 +1,528 @@
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/**
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* @file uart_trans.c
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* @brief UART transparent transmission module implementation
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*
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* Uses DMA + IDLE interrupt for efficient variable-length data reception.
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* Integrates with TCP modules via FreeRTOS StreamBuffers.
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*/
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#include "uart_trans.h"
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#include "usart.h"
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#include "FreeRTOS.h"
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#include "task.h"
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#include "stream_buffer.h"
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#include <string.h>
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/*---------------------------------------------------------------------------
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* Private Definitions
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*---------------------------------------------------------------------------*/
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/* Channel context structure */
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typedef struct {
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UART_HandleTypeDef *huart; /* HAL UART handle */
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DMA_HandleTypeDef *hdma_rx; /* DMA RX handle */
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uint8_t rx_dma_buffer[UART_RX_DMA_BUFFER_SIZE]; /* DMA RX buffer */
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uint8_t tx_dma_buffer[UART_TX_DMA_BUFFER_SIZE]; /* DMA TX buffer */
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volatile uint16_t rx_read_index; /* Last read position */
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volatile bool tx_busy; /* TX in progress flag */
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StreamBufferHandle_t rx_stream; /* From TCP (for UART TX) */
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StreamBufferHandle_t tx_stream; /* To TCP (from UART RX) */
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uart_config_t config; /* UART configuration */
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uart_stats_t stats; /* Statistics */
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bool initialized;
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bool running;
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} uart_channel_ctx_t;
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/*---------------------------------------------------------------------------
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* Private Variables
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*---------------------------------------------------------------------------*/
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static uart_channel_ctx_t g_channels[UART_CHANNEL_MAX];
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/*---------------------------------------------------------------------------
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* Private Functions
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*---------------------------------------------------------------------------*/
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/**
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* @brief Apply UART configuration
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*/
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static int apply_uart_config(uart_channel_t channel)
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{
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uart_channel_ctx_t *ctx = &g_channels[channel];
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UART_HandleTypeDef *huart = ctx->huart;
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if (huart == NULL)
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{
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return -1;
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}
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/* Stop UART if running */
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if (ctx->running)
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{
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HAL_UART_DMAStop(huart);
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}
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/* Update UART parameters */
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huart->Init.BaudRate = ctx->config.baudrate;
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/* Data bits */
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if (ctx->config.data_bits == 9)
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{
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huart->Init.WordLength = UART_WORDLENGTH_9B;
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}
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else
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{
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huart->Init.WordLength = UART_WORDLENGTH_8B;
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}
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/* Stop bits */
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if (ctx->config.stop_bits == 2)
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{
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huart->Init.StopBits = UART_STOPBITS_2;
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}
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else
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{
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huart->Init.StopBits = UART_STOPBITS_1;
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}
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/* Parity */
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switch (ctx->config.parity)
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{
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case 1:
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huart->Init.Parity = UART_PARITY_ODD;
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break;
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case 2:
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huart->Init.Parity = UART_PARITY_EVEN;
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break;
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default:
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huart->Init.Parity = UART_PARITY_NONE;
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break;
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}
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/* Reinitialize UART */
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if (HAL_UART_Init(huart) != HAL_OK)
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{
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return -1;
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}
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return 0;
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}
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static void process_rx_data_from_isr(uart_channel_t channel, uint16_t end_index)
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{
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uart_channel_ctx_t *ctx = &g_channels[channel];
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uint16_t start = ctx->rx_read_index;
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uint16_t end = end_index;
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uint16_t len;
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BaseType_t xHigherPriorityTaskWoken = pdFALSE;
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if (start >= UART_RX_DMA_BUFFER_SIZE)
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{
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start = 0;
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}
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if (end > UART_RX_DMA_BUFFER_SIZE)
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{
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end = UART_RX_DMA_BUFFER_SIZE;
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}
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if (end >= start)
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{
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len = end - start;
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if (len > 0 && ctx->tx_stream != NULL)
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{
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xStreamBufferSendFromISR(ctx->tx_stream,
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&ctx->rx_dma_buffer[start],
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len,
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&xHigherPriorityTaskWoken);
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ctx->stats.rx_bytes += len;
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ctx->stats.rx_packets++;
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}
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}
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else
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{
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len = UART_RX_DMA_BUFFER_SIZE - start;
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if (len > 0 && ctx->tx_stream != NULL)
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{
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xStreamBufferSendFromISR(ctx->tx_stream,
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&ctx->rx_dma_buffer[start],
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len,
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&xHigherPriorityTaskWoken);
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ctx->stats.rx_bytes += len;
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}
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if (end > 0 && ctx->tx_stream != NULL)
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{
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xStreamBufferSendFromISR(ctx->tx_stream,
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ctx->rx_dma_buffer,
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end,
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&xHigherPriorityTaskWoken);
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ctx->stats.rx_bytes += end;
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}
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ctx->stats.rx_packets++;
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}
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ctx->rx_read_index = (end == UART_RX_DMA_BUFFER_SIZE) ? 0 : end;
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portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
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}
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/*---------------------------------------------------------------------------
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* Public Functions
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*---------------------------------------------------------------------------*/
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/**
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* @brief Initialize UART transparent transmission module
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*/
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int uart_trans_init(void)
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{
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/* Initialize Server channel (UART2) */
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memset(&g_channels[UART_CHANNEL_SERVER], 0, sizeof(uart_channel_ctx_t));
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g_channels[UART_CHANNEL_SERVER].huart = &huart2;
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g_channels[UART_CHANNEL_SERVER].config.baudrate = UART_DEFAULT_BAUDRATE;
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g_channels[UART_CHANNEL_SERVER].config.data_bits = UART_DEFAULT_DATA_BITS;
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g_channels[UART_CHANNEL_SERVER].config.stop_bits = UART_DEFAULT_STOP_BITS;
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g_channels[UART_CHANNEL_SERVER].config.parity = UART_DEFAULT_PARITY;
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g_channels[UART_CHANNEL_SERVER].initialized = true;
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/* Initialize Client channel (UART3) */
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memset(&g_channels[UART_CHANNEL_CLIENT], 0, sizeof(uart_channel_ctx_t));
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g_channels[UART_CHANNEL_CLIENT].huart = &huart3;
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g_channels[UART_CHANNEL_CLIENT].config.baudrate = UART_DEFAULT_BAUDRATE;
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g_channels[UART_CHANNEL_CLIENT].config.data_bits = UART_DEFAULT_DATA_BITS;
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g_channels[UART_CHANNEL_CLIENT].config.stop_bits = UART_DEFAULT_STOP_BITS;
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g_channels[UART_CHANNEL_CLIENT].config.parity = UART_DEFAULT_PARITY;
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g_channels[UART_CHANNEL_CLIENT].initialized = true;
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return 0;
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}
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/**
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* @brief Configure UART channel parameters
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*/
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int uart_trans_config(uart_channel_t channel, const uart_config_t *config)
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{
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if (channel >= UART_CHANNEL_MAX || config == NULL)
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{
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return -1;
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}
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uart_channel_ctx_t *ctx = &g_channels[channel];
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memcpy(&ctx->config, config, sizeof(uart_config_t));
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/* Apply configuration if already initialized */
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if (ctx->initialized)
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{
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return apply_uart_config(channel);
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}
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return 0;
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}
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/**
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* @brief Start UART reception
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*/
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int uart_trans_start(uart_channel_t channel)
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{
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if (channel >= UART_CHANNEL_MAX)
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{
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return -1;
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}
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uart_channel_ctx_t *ctx = &g_channels[channel];
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if (!ctx->initialized || ctx->huart == NULL)
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{
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return -1;
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}
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/* Reset read index */
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ctx->rx_read_index = 0;
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ctx->tx_busy = false;
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/* Enable IDLE interrupt */
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__HAL_UART_ENABLE_IT(ctx->huart, UART_IT_IDLE);
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/* Start DMA reception (circular mode) */
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HAL_UART_Receive_DMA(ctx->huart, ctx->rx_dma_buffer, UART_RX_DMA_BUFFER_SIZE);
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ctx->running = true;
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return 0;
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}
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/**
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* @brief Stop UART reception
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*/
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int uart_trans_stop(uart_channel_t channel)
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{
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if (channel >= UART_CHANNEL_MAX)
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{
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return -1;
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}
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uart_channel_ctx_t *ctx = &g_channels[channel];
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if (ctx->huart == NULL)
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{
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return -1;
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}
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/* Disable IDLE interrupt */
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__HAL_UART_DISABLE_IT(ctx->huart, UART_IT_IDLE);
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/* Stop DMA */
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HAL_UART_DMAStop(ctx->huart);
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ctx->running = false;
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return 0;
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}
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/**
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* @brief Set StreamBuffer handles
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*/
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void uart_trans_set_streams(uart_channel_t channel,
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void *rx_stream,
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void *tx_stream)
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{
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if (channel >= UART_CHANNEL_MAX)
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{
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return;
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}
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g_channels[channel].rx_stream = (StreamBufferHandle_t)rx_stream;
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g_channels[channel].tx_stream = (StreamBufferHandle_t)tx_stream;
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}
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/**
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* @brief Get UART statistics
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*/
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void uart_trans_get_stats(uart_channel_t channel, uart_stats_t *stats)
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{
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if (channel >= UART_CHANNEL_MAX || stats == NULL)
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{
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return;
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}
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memcpy(stats, &g_channels[channel].stats, sizeof(uart_stats_t));
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}
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/**
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* @brief Reset UART statistics
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*/
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void uart_trans_reset_stats(uart_channel_t channel)
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{
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if (channel >= UART_CHANNEL_MAX)
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{
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return;
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}
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memset(&g_channels[channel].stats, 0, sizeof(uart_stats_t));
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}
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/**
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* @brief UART IDLE interrupt handler
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*/
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void uart_trans_idle_handler(uart_channel_t channel)
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{
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if (channel >= UART_CHANNEL_MAX)
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{
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return;
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}
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uart_channel_ctx_t *ctx = &g_channels[channel];
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if (!ctx->running || ctx->huart == NULL)
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{
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return;
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}
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/* Get current DMA position */
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uint16_t dma_counter = __HAL_DMA_GET_COUNTER(ctx->huart->hdmarx);
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uint16_t current_pos = UART_RX_DMA_BUFFER_SIZE - dma_counter;
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/* Process received data */
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if (current_pos != ctx->rx_read_index)
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{
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process_rx_data_from_isr(channel, current_pos);
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}
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}
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void uart_trans_rx_half_cplt_handler(uart_channel_t channel)
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{
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if (channel >= UART_CHANNEL_MAX)
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{
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return;
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}
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uart_channel_ctx_t *ctx = &g_channels[channel];
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if (!ctx->running || ctx->huart == NULL)
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{
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return;
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}
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uint16_t dma_counter = __HAL_DMA_GET_COUNTER(ctx->huart->hdmarx);
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uint16_t current_pos = UART_RX_DMA_BUFFER_SIZE - dma_counter;
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if (current_pos != ctx->rx_read_index)
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{
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process_rx_data_from_isr(channel, current_pos);
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}
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}
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/**
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* @brief UART DMA RX complete callback (buffer half/full)
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*/
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void uart_trans_rx_cplt_handler(uart_channel_t channel)
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{
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/* In circular mode, this is called when buffer is full */
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/* The IDLE handler already processes data continuously */
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/* This is a safety handler for high-speed continuous data */
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if (channel >= UART_CHANNEL_MAX)
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{
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return;
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}
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uart_channel_ctx_t *ctx = &g_channels[channel];
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if (!ctx->running)
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{
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return;
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}
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uint16_t dma_counter = __HAL_DMA_GET_COUNTER(ctx->huart->hdmarx);
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uint16_t current_pos = UART_RX_DMA_BUFFER_SIZE - dma_counter;
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if (current_pos != ctx->rx_read_index)
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{
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process_rx_data_from_isr(channel, current_pos);
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}
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}
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/**
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* @brief UART DMA TX complete callback
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*/
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void uart_trans_tx_cplt_handler(uart_channel_t channel)
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{
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if (channel >= UART_CHANNEL_MAX)
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{
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return;
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}
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g_channels[channel].tx_busy = false;
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}
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/**
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* @brief Server transparent transmission task (UART2 <-> TCP Server)
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*/
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void uart_server_trans_task(void *argument)
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{
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uart_channel_ctx_t *ctx = &g_channels[UART_CHANNEL_SERVER];
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uint8_t tx_buffer[128];
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size_t len;
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(void)argument;
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/* Wait for streams to be set */
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while (ctx->rx_stream == NULL || ctx->tx_stream == NULL)
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{
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vTaskDelay(pdMS_TO_TICKS(100));
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}
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/* Start UART reception */
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uart_trans_start(UART_CHANNEL_SERVER);
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while (1)
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{
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/* Check for data from TCP to send to UART */
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if (!ctx->tx_busy && ctx->rx_stream != NULL)
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{
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len = xStreamBufferReceive(ctx->rx_stream, tx_buffer,
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sizeof(tx_buffer), pdMS_TO_TICKS(10));
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if (len > 0)
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{
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/* Copy to DMA buffer and send */
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memcpy(ctx->tx_dma_buffer, tx_buffer, len);
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ctx->tx_busy = true;
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if (HAL_UART_Transmit_DMA(ctx->huart, ctx->tx_dma_buffer, len) != HAL_OK)
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{
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ctx->tx_busy = false;
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ctx->stats.errors++;
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}
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else
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{
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ctx->stats.tx_bytes += len;
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ctx->stats.tx_packets++;
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}
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}
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}
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else
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{
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/* TX busy or no stream, wait a bit */
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vTaskDelay(pdMS_TO_TICKS(1));
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}
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}
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}
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/**
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* @brief Client transparent transmission task (UART3 <-> TCP Client)
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*/
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void uart_client_trans_task(void *argument)
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{
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uart_channel_ctx_t *ctx = &g_channels[UART_CHANNEL_CLIENT];
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uint8_t tx_buffer[128];
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size_t len;
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(void)argument;
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/* Wait for streams to be set */
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while (ctx->rx_stream == NULL || ctx->tx_stream == NULL)
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{
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vTaskDelay(pdMS_TO_TICKS(100));
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}
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/* Start UART reception */
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uart_trans_start(UART_CHANNEL_CLIENT);
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while (1)
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{
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/* Check for data from TCP to send to UART */
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if (!ctx->tx_busy && ctx->rx_stream != NULL)
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{
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len = xStreamBufferReceive(ctx->rx_stream, tx_buffer,
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sizeof(tx_buffer), pdMS_TO_TICKS(10));
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if (len > 0)
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{
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/* Copy to DMA buffer and send */
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memcpy(ctx->tx_dma_buffer, tx_buffer, len);
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ctx->tx_busy = true;
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if (HAL_UART_Transmit_DMA(ctx->huart, ctx->tx_dma_buffer, len) != HAL_OK)
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{
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ctx->tx_busy = false;
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ctx->stats.errors++;
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}
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else
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{
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ctx->stats.tx_bytes += len;
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ctx->stats.tx_packets++;
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}
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}
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}
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else
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{
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/* TX busy or no stream, wait a bit */
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vTaskDelay(pdMS_TO_TICKS(1));
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}
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}
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}
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