docs: record CH390 hardware-bound conclusion
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@@ -61,6 +61,8 @@ extern SPI_HandleTypeDef hspi1;
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/* Timeout for SPI operations (ms) */
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#define SPI_TIMEOUT 100
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#define CH390_BITBANG_HALF_PERIOD_US 2u
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/*----------------------------------------------------------------------------
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* Low-level GPIO operations
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*---------------------------------------------------------------------------*/
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@@ -86,6 +88,80 @@ static inline void ch390_rst(uint8_t state)
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state ? GPIO_PIN_SET : GPIO_PIN_RESET);
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}
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static inline void ch390_sck(uint8_t state)
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{
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HAL_GPIO_WritePin(CH390_SCK_PORT, CH390_SCK_PIN,
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state ? GPIO_PIN_SET : GPIO_PIN_RESET);
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}
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static inline void ch390_mosi(uint8_t state)
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{
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HAL_GPIO_WritePin(CH390_MOSI_PORT, CH390_MOSI_PIN,
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state ? GPIO_PIN_SET : GPIO_PIN_RESET);
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}
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static inline uint8_t ch390_miso(void)
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{
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return (uint8_t)(HAL_GPIO_ReadPin(CH390_MISO_PORT, CH390_MISO_PIN) == GPIO_PIN_SET);
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}
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static void ch390_spi_gpio_mode(void)
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{
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GPIO_InitTypeDef GPIO_InitStruct = {0};
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GPIO_InitStruct.Pin = CH390_SCK_PIN | CH390_MOSI_PIN;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(CH390_SCK_PORT, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = CH390_MISO_PIN;
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GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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HAL_GPIO_Init(CH390_MISO_PORT, &GPIO_InitStruct);
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ch390_cs(1u);
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ch390_sck(1u);
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ch390_mosi(1u);
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}
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static void ch390_spi_restore_pins(void)
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{
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GPIO_InitTypeDef GPIO_InitStruct = {0};
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GPIO_InitStruct.Pin = CH390_SCK_PIN | CH390_MOSI_PIN;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(CH390_SCK_PORT, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = CH390_MISO_PIN;
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GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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HAL_GPIO_Init(CH390_MISO_PORT, &GPIO_InitStruct);
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ch390_spi_init();
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}
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static uint8_t ch390_bitbang_exchange_byte(uint8_t byte)
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{
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uint8_t bit;
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uint8_t rx_data = 0u;
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for (bit = 0u; bit < 8u; ++bit) {
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ch390_mosi((uint8_t)((byte & 0x80u) != 0u));
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ch390_delay_us(CH390_BITBANG_HALF_PERIOD_US);
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ch390_sck(0u);
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ch390_delay_us(CH390_BITBANG_HALF_PERIOD_US);
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rx_data = (uint8_t)((rx_data << 1) | ch390_miso());
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ch390_sck(1u);
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byte <<= 1;
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ch390_delay_us(CH390_BITBANG_HALF_PERIOD_US);
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}
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return rx_data;
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}
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/*----------------------------------------------------------------------------
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* SPI Communication
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*---------------------------------------------------------------------------*/
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@@ -241,6 +317,22 @@ void ch390_hardware_reset(void)
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ch390_delay_us(50000); /* Wait 50ms for CH390 to initialize reliably */
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}
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uint8_t ch390_bitbang_read_reg(uint8_t reg)
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{
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uint8_t value;
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__HAL_SPI_DISABLE(&hspi1);
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ch390_spi_gpio_mode();
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ch390_cs(0u);
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(void)ch390_bitbang_exchange_byte((uint8_t)(reg | OPC_REG_R));
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value = ch390_bitbang_exchange_byte(0x00u);
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ch390_cs(1u);
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ch390_spi_restore_pins();
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return value;
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}
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/*----------------------------------------------------------------------------
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* CH390 Register/Memory Access Functions (SPI Mode)
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*---------------------------------------------------------------------------*/
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@@ -19,6 +19,7 @@ void ch390_spi_init(void);
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uint16_t ch390_get_int_pin(void);
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void ch390_delay_us(uint32_t time);
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void ch390_hardware_reset(void);
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uint8_t ch390_bitbang_read_reg(uint8_t reg);
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/**
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* @name ch390_read_reg
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@@ -123,6 +123,13 @@ void ch390_runtime_init(struct netif *netif, const uint8_t *mac)
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SEGGER_RTT_WriteString(0, "ETH init: probe\r\n");
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g_ch390_ready = ch390_runtime_probe_identity();
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if (g_ch390_ready == 0u) {
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SEGGER_RTT_printf(0,
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"CH390 bitbang VIDL=0x%02X VIDH=0x%02X PIDL=0x%02X PIDH=0x%02X CHIPR=0x%02X\r\n",
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ch390_bitbang_read_reg(CH390_VIDL),
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ch390_bitbang_read_reg(CH390_VIDH),
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ch390_bitbang_read_reg(CH390_PIDL),
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ch390_bitbang_read_reg(CH390_PIDH),
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ch390_bitbang_read_reg(CH390_CHIPR));
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netif->hwaddr_len = ETHARP_HWADDR_LEN;
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netif->mtu = 1500;
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netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
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