feat(ch390): optimize SPI transfer, MAC fallback, and build settings for V1.0.0
- increase UART DMA/ring buffer sizes for mux traffic - switch SPI1 to Mode0 with prescaler /2 and align CubeMX settings - refactor CH390 memory read/write path with chunked SPI read and HAL bulk write - fallback to hardware MAC when configured MAC is invalid (all-zero) - add mux frame RTT logs and remove redundant UART1 polling - update Keil post-build viewer integration and include build viewer artifacts - update AT manual with all-zero MAC behavior
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@@ -26,10 +26,10 @@ typedef struct {
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uint8_t payload[256];
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} uart_mux_frame_t;
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#define UART_RX_DMA_BUFFER_SIZE 128u
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#define UART_TX_DMA_BUFFER_SIZE 128u
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#define UART_RX_RING_BUFFER_SIZE 256u
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#define UART_TX_RING_BUFFER_SIZE 256u
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#define UART_RX_DMA_BUFFER_SIZE 256u
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#define UART_TX_DMA_BUFFER_SIZE 256u
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#define UART_RX_RING_BUFFER_SIZE 512u
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#define UART_TX_RING_BUFFER_SIZE 384u
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#define UART_DEFAULT_BAUDRATE 115200u
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typedef struct {
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