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fix: restore CH390 bridge flow and sync driver docs

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2026-04-03 05:18:02 +08:00
parent 1ef1ba9490
commit fd1fae8ad7
18 changed files with 501 additions and 178 deletions
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Core/Src/main.c
+54 -37
View File
@@ -68,6 +68,22 @@ static volatile uint16_t g_led_blink_ticks = 0;
static uint8_t g_clock_fallback_to_hsi = 0u;
volatile uint8_t g_uart1_rx_probe_byte = 0u;
static void App_ForwardTcpPair(void)
{
uint8_t buffer[256];
int len;
len = tcp_server_recv(buffer, sizeof(buffer), 0u);
if (len > 0) {
(void)tcp_client_send(buffer, (uint16_t)len);
}
len = tcp_client_recv(buffer, sizeof(buffer), 0u);
if (len > 0) {
(void)tcp_server_send(buffer, (uint16_t)len);
}
}
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
@@ -122,24 +138,27 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
static void BootDiag_ReportCh390(void)
{
ch390_diag_t diag;
const device_config_t *cfg = config_get();
uint8_t mac_hw[6];
ch390_runtime_get_diag(&diag);
ch390_get_mac(mac_hw);
SEGGER_RTT_printf(0,
"CH390 VID=0x%04X PID=0x%04X REV=0x%02X NSR=0x%02X LINK=%d\r\n",
"CH390 VID=0x%04X PID=0x%04X REV=0x%02X LINK=%u MAC=%02X:%02X:%02X:%02X:%02X:%02X\r\n",
diag.vendor_id,
diag.product_id,
diag.revision,
diag.nsr,
diag.link_up);
diag.link_up,
mac_hw[0], mac_hw[1], mac_hw[2], mac_hw[3], mac_hw[4], mac_hw[5]);
SEGGER_RTT_printf(0,
"CH390 NCR=0x%02X RCR=0x%02X IMR=0x%02X INTCR=0x%02X GPR=0x%02X ISR=0x%02X\r\n",
diag.ncr,
diag.rcr,
diag.imr,
diag.intcr,
diag.gpr,
diag.isr);
"NET cfg IP=%u.%u.%u.%u MASK=%u.%u.%u.%u GW=%u.%u.%u.%u SrvPort=%u Cli=%u.%u.%u.%u:%u\r\n",
cfg->ip[0], cfg->ip[1], cfg->ip[2], cfg->ip[3],
cfg->mask[0], cfg->mask[1], cfg->mask[2], cfg->mask[3],
cfg->gw[0], cfg->gw[1], cfg->gw[2], cfg->gw[3],
cfg->server_port,
cfg->remote_ip[0], cfg->remote_ip[1], cfg->remote_ip[2], cfg->remote_ip[3],
cfg->remote_port);
}
static void App_PollUart1ConfigRx(void)
@@ -152,6 +171,7 @@ static void App_PollUart1ConfigRx(void)
static void App_Init(void)
{
device_config_t *cfg_mut;
const device_config_t *cfg;
ip4_addr_t ipaddr;
ip4_addr_t netmask;
@@ -161,6 +181,22 @@ static void App_Init(void)
tcp_client_config_t client_cfg;
config_init();
cfg_mut = config_get_mutable();
cfg_mut->dhcp_enable = 0u;
cfg_mut->ip[0] = 192u;
cfg_mut->ip[1] = 168u;
cfg_mut->ip[2] = 31u;
cfg_mut->ip[3] = 100u;
cfg_mut->mask[0] = 255u;
cfg_mut->mask[1] = 255u;
cfg_mut->mask[2] = 255u;
cfg_mut->mask[3] = 0u;
cfg_mut->gw[0] = 192u;
cfg_mut->gw[1] = 168u;
cfg_mut->gw[2] = 31u;
cfg_mut->gw[3] = 1u;
cfg_mut->server_port = 8080u;
cfg_mut->remote_port = 8081u;
cfg = config_get();
uart_trans_init();
@@ -195,15 +231,18 @@ static void App_Init(void)
server_cfg.port = cfg->server_port;
server_cfg.auto_reconnect = true;
tcp_server_init(&server_cfg);
tcp_server_start();
(void)tcp_server_init(&server_cfg);
(void)tcp_server_start();
memcpy(client_cfg.server_ip, cfg->remote_ip, sizeof(client_cfg.server_ip));
client_cfg.local_port = 8081u;
client_cfg.server_port = cfg->remote_port;
client_cfg.auto_reconnect = true;
client_cfg.reconnect_interval_ms = cfg->reconnect_interval;
tcp_client_init(&client_cfg);
tcp_client_connect();
(void)tcp_client_init(&client_cfg);
(void)tcp_client_connect();
SEGGER_RTT_WriteString(0, "TCP bridge enabled\r\n");
/* Arm UART1 RX interrupt path so config commands can enter via USART1. */
if (HAL_UART_Receive_IT(&huart1, (uint8_t *)&g_uart1_rx_probe_byte, 1u) != HAL_OK) {
@@ -213,37 +252,15 @@ static void App_Init(void)
static void App_Poll(void)
{
uint8_t buffer[128];
int len;
ethernetif_poll();
ethernetif_check_link();
sys_check_timeouts();
tcp_client_poll();
App_ForwardTcpPair();
uart_trans_poll();
App_PollUart1ConfigRx();
config_poll();
len = tcp_server_recv(buffer, sizeof(buffer), 0u);
if (len > 0) {
uart_trans_write(UART_CHANNEL_SERVER, buffer, (uint16_t)len);
}
len = tcp_client_recv(buffer, sizeof(buffer), 0u);
if (len > 0) {
uart_trans_write(UART_CHANNEL_CLIENT, buffer, (uint16_t)len);
}
len = (int)uart_trans_read(UART_CHANNEL_SERVER, buffer, sizeof(buffer));
if (len > 0) {
tcp_server_send(buffer, (uint16_t)len);
}
len = (int)uart_trans_read(UART_CHANNEL_CLIENT, buffer, sizeof(buffer));
if (len > 0) {
tcp_client_send(buffer, (uint16_t)len);
}
if (config_is_reset_requested()) {
config_clear_reset_requested();
NVIC_SystemReset();
Core/Src/spi.c
+3 -3
View File
@@ -41,10 +41,10 @@ void MX_SPI1_Init(void)
hspi1.Init.Mode = SPI_MODE_MASTER;
hspi1.Init.Direction = SPI_DIRECTION_2LINES;
hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH; /* CH390 requires CPOL=High (Mode 3) */
hspi1.Init.CLKPhase = SPI_PHASE_2EDGE; /* CH390 requires CPHA=2Edge (Mode 3) */
hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; /* Match CH390 runtime baseline: CPOL=Low */
hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; /* Match CH390 runtime baseline: CPHA=1Edge (Mode 0) */
hspi1.Init.NSS = SPI_NSS_SOFT; /* Software CS control for CH390 */
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64; /* 72MHz/64 = 1.125MHz for low-speed CH390 bring-up */
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64; /* 72MHz/64 = 1.125MHz for conservative CH390 bring-up */
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
Core/Src/stm32f1xx_it.c
+1 -1
View File
@@ -346,7 +346,7 @@ void EXTI0_IRQHandler(void)
__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_0);
/* Defer CH390 processing to main loop */
ch390_runtime_set_irq_pending();
ethernetif_set_irq_pending();
}
}