fix: restore CH390 bridge flow and sync driver docs
This commit is contained in:
@@ -220,9 +220,9 @@ void ch390_default_config()
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// ch390_set_mac_address(mac_addr);
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ch390_set_multicast(multicase_addr);
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// Enable all interrupt and PAR
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ch390_write_reg(CH390_IMR, IMR_ALL);
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// Enable RX
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// Enable only the interrupts needed by the NO_SYS polling path.
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ch390_write_reg(CH390_IMR, (uint8_t)(IMR_PRI | IMR_LNKCHGI | IMR_ROOI | IMR_ROI));
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// Enable RX with the reference receive filter.
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ch390_write_reg(CH390_RCR, RCR_DIS_CRC | RCR_RXEN);
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}
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@@ -86,23 +86,6 @@ static inline void ch390_rst(uint8_t state)
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state ? GPIO_PIN_SET : GPIO_PIN_RESET);
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}
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static inline void ch390_sck(uint8_t state)
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{
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HAL_GPIO_WritePin(CH390_SCK_PORT, CH390_SCK_PIN,
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state ? GPIO_PIN_SET : GPIO_PIN_RESET);
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}
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static inline void ch390_mosi(uint8_t state)
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{
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HAL_GPIO_WritePin(CH390_MOSI_PORT, CH390_MOSI_PIN,
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state ? GPIO_PIN_SET : GPIO_PIN_RESET);
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}
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static inline uint8_t ch390_miso(void)
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{
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return (uint8_t)(HAL_GPIO_ReadPin(CH390_MISO_PORT, CH390_MISO_PIN) == GPIO_PIN_SET);
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}
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/*----------------------------------------------------------------------------
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* SPI Communication
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*---------------------------------------------------------------------------*/
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@@ -197,11 +180,9 @@ void ch390_interrupt_init(void)
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void ch390_spi_init(void)
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{
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/* SPI1 is initialized by MX_SPI1_Init() in main.c */
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/* We need to ensure correct SPI mode for CH390: */
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/* - CPOL = High (idle clock is high) */
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/* - CPHA = 2Edge (data captured on second edge) */
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ch390_spi_apply_mode(SPI_POLARITY_LOW, SPI_PHASE_1EDGE); /* Start with Mode 0 */
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/* Reference CH390 SPI path uses mode 3. */
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ch390_spi_apply_mode(SPI_POLARITY_HIGH, SPI_PHASE_2EDGE);
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SEGGER_RTT_WriteString(0, "CH390 SPI mode=3 (CPOL=1 CPHA=1)\r\n");
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}
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/**
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@@ -252,7 +233,7 @@ void ch390_delay_us(uint32_t time)
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*/
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void ch390_hardware_reset(void)
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{
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ch390_delay_us(3000); /* Short delay before reset */
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ch390_delay_us(10000); /* Short delay before reset */
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ch390_rst(0); /* Assert reset (low) */
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ch390_delay_us(3000); /* Hold reset for 3ms to satisfy datasheet minimum */
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ch390_rst(1); /* Release reset (high) */
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@@ -287,13 +268,9 @@ uint8_t ch390_read_reg(uint8_t reg)
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*/
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void ch390_write_reg(uint8_t reg, uint8_t value)
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{
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uint8_t frame[2];
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frame[0] = reg | OPC_REG_W;
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frame[1] = value;
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ch390_cs(0); /* CS low - select */
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ch390_spi_exchange_byte(frame[0]); /* Send write command */
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ch390_spi_exchange_byte(frame[1]); /* Send write data */
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(void)ch390_spi_exchange_byte(reg | OPC_REG_W);
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(void)ch390_spi_exchange_byte(value);
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ch390_cs(1); /* CS high - deselect */
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}
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+109
-33
@@ -9,6 +9,32 @@
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#include "lwip/pbuf.h"
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#include "lwip/stats.h"
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#include <string.h>
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static void ch390_runtime_dispatch_frame(struct netif *netif, struct pbuf *p)
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{
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if ((p != NULL) && (netif->input(p, netif) != ERR_OK)) {
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pbuf_free(p);
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}
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}
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static uint8_t ch390_runtime_drain_rx(struct netif *netif, uint8_t max_frames)
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{
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struct pbuf *p;
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uint8_t drained = 0u;
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while (drained < max_frames) {
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p = ch390_runtime_input_frame(netif);
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if (p == NULL) {
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break;
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}
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ch390_runtime_dispatch_frame(netif, p);
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drained++;
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}
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return drained;
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}
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static volatile uint8_t g_ch390_irq_pending;
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static uint8_t g_ch390_ready;
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static ch390_diag_t g_diag;
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@@ -18,6 +44,13 @@ static uint8_t ch390_runtime_probe_identity(void)
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g_diag.vendor_id = ch390_get_vendor_id();
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g_diag.product_id = ch390_get_product_id();
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g_diag.revision = ch390_get_revision();
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g_diag.phy_bmcr = ch390_read_phy(CH390_PHY_BMCR);
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g_diag.phy_bmsr = ch390_read_phy(CH390_PHY_BMSR);
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g_diag.phy_id1 = ch390_read_phy(CH390_PHY_PHYID1);
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g_diag.phy_id2 = ch390_read_phy(CH390_PHY_PHYID2);
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g_diag.phy_anar = ch390_read_phy(CH390_PHY_ANAR);
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g_diag.phy_anlpar = ch390_read_phy(CH390_PHY_ANLPAR);
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g_diag.phy_aner = ch390_read_phy(CH390_PHY_ANER);
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g_diag.nsr = ch390_read_reg(CH390_NSR);
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g_diag.ncr = ch390_read_reg(CH390_NCR);
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g_diag.rcr = ch390_read_reg(CH390_RCR);
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@@ -25,6 +58,8 @@ static uint8_t ch390_runtime_probe_identity(void)
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g_diag.intcr = ch390_read_reg(CH390_INTCR);
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g_diag.gpr = ch390_read_reg(CH390_GPR);
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g_diag.isr = ch390_read_reg(CH390_ISR);
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g_diag.phy_speed_10m = 0u;
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g_diag.phy_full_duplex = 0u;
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g_diag.link_up = (uint8_t)0u;
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g_diag.id_valid = (uint8_t)((g_diag.vendor_id != 0x0000u) &&
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(g_diag.vendor_id != 0xFFFFu) &&
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@@ -36,22 +71,25 @@ static uint8_t ch390_runtime_probe_identity(void)
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static void ch390_runtime_refresh_diag(void)
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{
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uint8_t id_valid = ch390_runtime_probe_identity();
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g_diag.int_pin = (uint8_t)ch390_get_int_pin();
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if (id_valid != 0u) {
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g_diag.phy_speed_10m = (uint8_t)ch390_get_phy_speed();
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g_diag.phy_full_duplex = (uint8_t)ch390_get_duplex_mode();
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g_diag.link_up = (uint8_t)ch390_get_link_status();
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}
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}
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static struct pbuf *ch390_runtime_input(struct netif *netif)
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struct pbuf *ch390_runtime_input_frame(struct netif *netif)
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{
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struct ethernetif *ethernetif = (struct ethernetif *)netif->state;
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struct pbuf *p = NULL;
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struct pbuf *q;
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uint16_t len;
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uint16_t frame_len;
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uint8_t rcr;
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uint8_t rx_ready;
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uint8_t rx_header[4];
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ch390_read_reg(CH390_MRCMDX);
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rx_ready = ch390_read_reg(CH390_MRCMDX);
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@@ -64,6 +102,7 @@ static struct pbuf *ch390_runtime_input(struct netif *netif)
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ch390_write_reg(CH390_RCR, rcr);
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ethernetif->rx_len = 0u;
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LINK_STATS_INC(link.drop);
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g_diag.rx_packets_drop++;
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return NULL;
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}
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@@ -72,16 +111,21 @@ static struct pbuf *ch390_runtime_input(struct netif *netif)
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return NULL;
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}
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g_diag.rx_ready_hits++;
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ch390_read_mem(rx_header, 4);
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ethernetif->rx_status = rx_header[1];
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ethernetif->rx_len = (uint16_t)(((uint16_t)rx_header[2] | ((uint16_t)rx_header[3] << 8)) - 4u);
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frame_len = (uint16_t)((uint16_t)rx_header[2] | ((uint16_t)rx_header[3] << 8));
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if ((ethernetif->rx_status & 0x3Fu) != 0u || ethernetif->rx_len == 0u || ethernetif->rx_len > 1520u) {
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ch390_drop_packet((uint16_t)(ethernetif->rx_len + 4u));
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if ((ethernetif->rx_status & 0x3Fu) != 0u || frame_len == 0u || frame_len > CH390_PKT_MAX) {
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ethernetif->rx_len = 0u;
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ch390_drop_packet(frame_len);
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LINK_STATS_INC(link.drop);
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g_diag.rx_packets_drop++;
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return NULL;
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}
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ethernetif->rx_len = frame_len;
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len = ethernetif->rx_len;
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#if ETH_PAD_SIZE
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len += ETH_PAD_SIZE;
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@@ -98,12 +142,16 @@ static struct pbuf *ch390_runtime_input(struct netif *netif)
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#if ETH_PAD_SIZE
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pbuf_add_header(p, ETH_PAD_SIZE);
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#endif
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ch390_drop_packet(4u);
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LINK_STATS_INC(link.recv);
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g_diag.rx_packets_ok++;
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g_diag.last_frame_len = frame_len;
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g_diag.last_payload_len = p->tot_len;
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} else {
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ch390_drop_packet((uint16_t)(ethernetif->rx_len + 4u));
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ch390_drop_packet(ethernetif->rx_len);
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LINK_STATS_INC(link.memerr);
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LINK_STATS_INC(link.drop);
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g_diag.rx_packets_drop++;
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}
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return p;
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@@ -125,7 +173,7 @@ void ch390_runtime_init(struct netif *netif, const uint8_t *mac)
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if (g_ch390_ready == 0u) {
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netif->hwaddr_len = ETHARP_HWADDR_LEN;
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netif->mtu = 1500;
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netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
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netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_ETHERNET;
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ethernetif->rx_len = 0u;
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ethernetif->rx_status = 0u;
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@@ -144,7 +192,7 @@ void ch390_runtime_init(struct netif *netif, const uint8_t *mac)
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SEGGER_RTT_WriteString(0, "ETH init: getmac\r\n");
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ch390_get_mac(netif->hwaddr);
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netif->mtu = 1500;
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netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
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netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_ETHERNET;
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ethernetif->rx_len = 0u;
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ethernetif->rx_status = 0u;
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@@ -162,56 +210,82 @@ void ch390_runtime_set_irq_pending(void)
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g_ch390_irq_pending = 1u;
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}
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uint8_t ch390_runtime_is_irq_pending(void)
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{
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return g_ch390_irq_pending;
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}
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void ch390_runtime_poll(struct netif *netif)
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{
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uint8_t int_status;
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uint8_t rx_ready;
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uint8_t rx_budget;
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uint8_t rx_hint;
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if (!g_ch390_ready) {
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return;
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}
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if (g_ch390_irq_pending == 0u) {
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return;
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}
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g_diag.rx_poll_calls++;
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g_ch390_irq_pending = 0u;
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int_status = ch390_read_reg(CH390_ISR);
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ch390_write_reg(CH390_ISR, int_status);
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rx_budget = 1u;
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rx_hint = 0u;
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if ((int_status & ISR_LNKCHG) != 0u) {
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HAL_Delay(65u);
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ch390_runtime_check_link(netif);
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}
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if ((g_ch390_irq_pending != 0u) || (ch390_get_int_pin() == GPIO_PIN_RESET)) {
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g_ch390_irq_pending = 0u;
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int_status = ch390_get_int_status();
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if ((int_status & ISR_ROS) != 0u) {
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LINK_STATS_INC(link.err);
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}
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if ((int_status & ISR_PR) != 0u) {
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uint8_t loops = 0u;
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while (loops++ < 8u) {
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struct pbuf *p = ch390_runtime_input(netif);
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if (p == NULL) {
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break;
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}
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if (netif->input(p, netif) != ERR_OK) {
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pbuf_free(p);
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}
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if ((int_status & ISR_LNKCHG) != 0u) {
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ch390_runtime_check_link(netif);
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}
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if ((int_status & ISR_ROS) != 0u) {
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LINK_STATS_INC(link.err);
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}
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if ((int_status & (ISR_PR | ISR_ROS | ISR_ROO)) != 0u) {
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rx_hint = 1u;
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rx_budget = 8u;
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}
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}
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ch390_read_reg(CH390_MRCMDX);
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rx_ready = ch390_read_reg(CH390_MRCMDX);
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if ((rx_ready & CH390_PKT_RDY) != 0u) {
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rx_hint = 1u;
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if (rx_budget < 4u) {
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rx_budget = 4u;
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}
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}
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if (rx_hint != 0u) {
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(void)ch390_runtime_drain_rx(netif, rx_budget);
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}
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}
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void ch390_runtime_check_link(struct netif *netif)
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{
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uint8_t link_up;
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static uint8_t s_last_reported = 0xFFu;
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if (!g_ch390_ready) {
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netif_set_link_down(netif);
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return;
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}
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ch390_runtime_refresh_diag();
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link_up = (uint8_t)ch390_get_link_status();
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if (link_up != s_last_reported) {
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SEGGER_RTT_printf(0,
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"ETH link %s nsr=0x%02X bmsr=0x%04X anlpar=0x%04X\r\n",
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link_up ? "up" : "down",
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g_diag.nsr,
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g_diag.phy_bmsr,
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g_diag.phy_anlpar);
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s_last_reported = link_up;
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}
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if (link_up) {
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if (!netif_is_link_up(netif)) {
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netif_set_link_up(netif);
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@@ -244,6 +318,7 @@ err_t ch390_runtime_output(struct netif *netif, struct pbuf *p)
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pbuf_add_header(p, ETH_PAD_SIZE);
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#endif
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LINK_STATS_INC(link.drop);
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g_diag.tx_packets_timeout++;
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return ERR_TIMEOUT;
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}
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}
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@@ -261,6 +336,7 @@ err_t ch390_runtime_output(struct netif *netif, struct pbuf *p)
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#endif
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LINK_STATS_INC(link.xmit);
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g_diag.tx_packets_ok++;
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return ERR_OK;
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}
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@@ -13,6 +13,13 @@ typedef struct {
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uint16_t vendor_id;
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uint16_t product_id;
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uint8_t revision;
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uint16_t phy_bmcr;
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uint16_t phy_bmsr;
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uint16_t phy_id1;
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uint16_t phy_id2;
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uint16_t phy_anar;
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uint16_t phy_anlpar;
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uint16_t phy_aner;
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uint8_t nsr;
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uint8_t ncr;
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uint8_t rcr;
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@@ -20,12 +27,32 @@ typedef struct {
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uint8_t intcr;
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uint8_t gpr;
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uint8_t isr;
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uint8_t int_pin;
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uint8_t phy_speed_10m;
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uint8_t phy_full_duplex;
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uint8_t link_up;
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uint8_t id_valid;
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uint32_t rx_poll_calls;
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uint32_t rx_ready_hits;
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uint32_t rx_packets_ok;
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uint32_t rx_packets_drop;
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uint32_t tx_packets_ok;
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uint32_t tx_packets_timeout;
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uint32_t rx_arp_frames;
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uint32_t rx_ip_frames;
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uint32_t rx_other_frames;
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uint32_t rx_unicast_self_frames;
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uint32_t rx_broadcast_frames;
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uint32_t rx_multicast_frames;
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uint16_t last_frame_len;
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uint16_t last_payload_len;
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uint16_t last_eth_type;
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} ch390_diag_t;
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void ch390_runtime_init(struct netif *netif, const uint8_t *mac);
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struct pbuf *ch390_runtime_input_frame(struct netif *netif);
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void ch390_runtime_set_irq_pending(void);
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uint8_t ch390_runtime_is_irq_pending(void);
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void ch390_runtime_poll(struct netif *netif);
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void ch390_runtime_check_link(struct netif *netif);
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err_t ch390_runtime_output(struct netif *netif, struct pbuf *p);
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