4 Commits

Author SHA1 Message Date
gaoro-xiao dc277b040b fix: 更新.gitignore以排除Keil构建日志和Wireshark日志文件 2026-04-13 15:50:16 +08:00
gaoro-xiao c21d85a9da refactor: 适配STM32F103RCT6 + FreeRTOS工程框架,同步baremetal-r8协议手册
- IOC: MCU切换为STM32F103RCTx,添加FREERTOS+TIM4中间件,HAL时间基准改为TIM4
- Keil uvprojx: 目标器件RC,Flash 256KB/48KB SRAM,宏xE,HD Flash算法,启动文件xe.s
- EWARM ewp: 宏xE,ICF/启动文件切换为xe版本
- 启动文件: Stack_Size 0x400→0x800适配FreeRTOS
- 重写项目需求说明/技术实现文档,描述FreeRTOS 5任务架构+lwIP NO_SYS=0
- 新增AT固件使用手册(MUX/NET/LINK协议)和工程调试指南(FreeRTOS专项)
2026-04-09 20:22:48 +08:00
gaoro-xiao 68c64959c7 refactor: 准备R8裸机迁移工程基线 2026-03-30 14:41:13 +08:00
gaoro-xiao 7ee96bc08d fix: 统一R8工程目标并修复MDK编译前置问题 2026-03-30 13:14:37 +08:00
24 changed files with 2144 additions and 1054 deletions
+4
View File
@@ -26,6 +26,7 @@ Release/
*.uvguix.* *.uvguix.*
MDK-ARM/DebugConfig/ MDK-ARM/DebugConfig/
MDK-ARM/TCP2UART/ MDK-ARM/TCP2UART/
build_keil.log
# OS # OS
Thumbs.db Thumbs.db
@@ -34,3 +35,6 @@ Desktop.ini
# 项目文档 # 项目文档
项目计划.md 项目计划.md
# Wireshark
WiresharkLog/
+10 -10
View File
@@ -4,25 +4,25 @@ LibFiles=Drivers\STM32F1xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM3
[PreviousUsedIarFiles] [PreviousUsedIarFiles]
SourceFiles=..\Core\Src\main.c;..\Core\Src\gpio.c;..\Core\Src\dma.c;..\Core\Src\iwdg.c;..\Core\Src\spi.c;..\Core\Src\usart.c;..\Core\Src\wwdg.c;..\Core\Src\stm32f1xx_it.c;..\Core\Src\stm32f1xx_hal_msp.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_iwdg.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_spi.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_wwdg.c;..\Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;..\Core\Src\system_stm32f1xx.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_iwdg.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_spi.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_wwdg.c;..\Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;..\Core\Src\system_stm32f1xx.c;;; SourceFiles=..\Core\Src\main.c;..\Core\Src\gpio.c;..\Core\Src\dma.c;..\Core\Src\iwdg.c;..\Core\Src\spi.c;..\Core\Src\usart.c;..\Core\Src\wwdg.c;..\Core\Src\stm32f1xx_it.c;..\Core\Src\stm32f1xx_hal_msp.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_iwdg.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_spi.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_wwdg.c;..\Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;..\Core\Src\system_stm32f1xx.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_iwdg.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_spi.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_wwdg.c;..\Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;..\Core\Src\system_stm32f1xx.c;;;
HeaderPath=..\Drivers\STM32F1xx_HAL_Driver\Inc;..\Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F1xx\Include;..\Drivers\CMSIS\Include;..\Core\Inc; HeaderPath=..\Drivers\STM32F1xx_HAL_Driver\Inc;..\Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F1xx\Include;..\Drivers\CMSIS\Include;..\Core\Inc;
CDefines=USE_HAL_DRIVER;STM32F103xE;USE_HAL_DRIVER;USE_HAL_DRIVER; CDefines=USE_HAL_DRIVER;STM32F103xB;USE_HAL_DRIVER;USE_HAL_DRIVER;
[PreviousUsedKeilFiles] [PreviousUsedKeilFiles]
SourceFiles=..\Core\Src\main.c;..\Core\Src\gpio.c;..\Core\Src\freertos.c;..\Core\Src\dma.c;..\Core\Src\iwdg.c;..\Core\Src\spi.c;..\Core\Src\usart.c;..\Core\Src\stm32f1xx_it.c;..\Core\Src\stm32f1xx_hal_msp.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_iwdg.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_spi.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c;..\Middlewares\Third_Party\FreeRTOS\Source\croutine.c;..\Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;..\Middlewares\Third_Party\FreeRTOS\Source\list.c;..\Middlewares\Third_Party\FreeRTOS\Source\queue.c;..\Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;..\Middlewares\Third_Party\FreeRTOS\Source\tasks.c;..\Middlewares\Third_Party\FreeRTOS\Source\timers.c;..\Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS_V2\cmsis_os2.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM3\port.c;..\Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;..\Core\Src\system_stm32f1xx.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_iwdg.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_spi.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c;..\Middlewares\Third_Party\FreeRTOS\Source\croutine.c;..\Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;..\Middlewares\Third_Party\FreeRTOS\Source\list.c;..\Middlewares\Third_Party\FreeRTOS\Source\queue.c;..\Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;..\Middlewares\Third_Party\FreeRTOS\Source\tasks.c;..\Middlewares\Third_Party\FreeRTOS\Source\timers.c;..\Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS_V2\cmsis_os2.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM3\port.c;..\Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;..\Core\Src\system_stm32f1xx.c;;;..\Middlewares\Third_Party\FreeRTOS\Source\croutine.c;..\Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;..\Middlewares\Third_Party\FreeRTOS\Source\list.c;..\Middlewares\Third_Party\FreeRTOS\Source\queue.c;..\Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;..\Middlewares\Third_Party\FreeRTOS\Source\tasks.c;..\Middlewares\Third_Party\FreeRTOS\Source\timers.c;..\Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS_V2\cmsis_os2.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM3\port.c; SourceFiles=..\Core\Src\main.c;..\Core\Src\gpio.c;..\Core\Src\freertos.c;..\Core\Src\dma.c;..\Core\Src\iwdg.c;..\Core\Src\spi.c;..\Core\Src\usart.c;..\Core\Src\stm32f1xx_it.c;..\Core\Src\stm32f1xx_hal_msp.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_iwdg.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_spi.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c;..\Middlewares\Third_Party\FreeRTOS\Source\croutine.c;..\Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;..\Middlewares\Third_Party\FreeRTOS\Source\list.c;..\Middlewares\Third_Party\FreeRTOS\Source\queue.c;..\Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;..\Middlewares\Third_Party\FreeRTOS\Source\tasks.c;..\Middlewares\Third_Party\FreeRTOS\Source\timers.c;..\Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS_V2\cmsis_os2.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM3\port.c;..\Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;..\Core\Src\system_stm32f1xx.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_iwdg.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_spi.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c;..\Middlewares\Third_Party\FreeRTOS\Source\croutine.c;..\Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;..\Middlewares\Third_Party\FreeRTOS\Source\list.c;..\Middlewares\Third_Party\FreeRTOS\Source\queue.c;..\Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;..\Middlewares\Third_Party\FreeRTOS\Source\tasks.c;..\Middlewares\Third_Party\FreeRTOS\Source\timers.c;..\Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS_V2\cmsis_os2.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM3\port.c;..\Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;..\Core\Src\system_stm32f1xx.c;;;..\Middlewares\Third_Party\FreeRTOS\Source\croutine.c;..\Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;..\Middlewares\Third_Party\FreeRTOS\Source\list.c;..\Middlewares\Third_Party\FreeRTOS\Source\queue.c;..\Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;..\Middlewares\Third_Party\FreeRTOS\Source\tasks.c;..\Middlewares\Third_Party\FreeRTOS\Source\timers.c;..\Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS_V2\cmsis_os2.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM3\port.c;
HeaderPath=..\Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;..\Drivers\STM32F1xx_HAL_Driver\Inc;..\Middlewares\Third_Party\FreeRTOS\Source\include;..\Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS_V2;..\Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM3;..\Drivers\CMSIS\Device\ST\STM32F1xx\Include;..\Drivers\CMSIS\Include;..\Core\Inc; HeaderPath=..\Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;..\Drivers\STM32F1xx_HAL_Driver\Inc;..\Drivers\CMSIS\Device\ST\STM32F1xx\Include;..\Drivers\CMSIS\Include;..\Core\Inc;
CDefines=USE_HAL_DRIVER;STM32F103xB;USE_HAL_DRIVER;USE_HAL_DRIVER; CDefines=USE_HAL_DRIVER;STM32F103xB;USE_HAL_DRIVER;USE_HAL_DRIVER;
[PreviousGenFiles] [PreviousGenFiles]
AdvancedFolderStructure=true AdvancedFolderStructure=true
HeaderFileListSize=9 HeaderFileListSize=9
HeaderFiles#0=..\Core\Inc\gpio.h HeaderFiles#0=..\Core\Inc\gpio.h
HeaderFiles#1=..\Core\Inc\FreeRTOSConfig.h HeaderFiles#1=..\Core\Inc\dma.h
HeaderFiles#2=..\Core\Inc\dma.h HeaderFiles#2=..\Core\Inc\iwdg.h
HeaderFiles#3=..\Core\Inc\iwdg.h HeaderFiles#3=..\Core\Inc\spi.h
HeaderFiles#4=..\Core\Inc\spi.h HeaderFiles#4=..\Core\Inc\usart.h
HeaderFiles#5=..\Core\Inc\usart.h HeaderFiles#5=..\Core\Inc\stm32f1xx_it.h
HeaderFiles#6=..\Core\Inc\stm32f1xx_it.h HeaderFiles#6=..\Core\Inc\stm32f1xx_hal_conf.h
HeaderFiles#7=..\Core\Inc\stm32f1xx_hal_conf.h HeaderFiles#7=..\Core\Inc\main.h
HeaderFiles#8=..\Core\Inc\main.h HeaderFiles#8=
HeaderFolderListSize=1 HeaderFolderListSize=1
HeaderPath#0=..\Core\Inc HeaderPath#0=..\Core\Inc
HeaderFiles=; HeaderFiles=;
+390
View File
@@ -0,0 +1,390 @@
# TCP2UART AT 固件使用手册
## 1. 文档范围
本文档定义 `TCP2UART` 项目的最终 AT 外部协议。
本文档只描述最终协议模型,不保留任何历史展开式实例字段,不包含测试记录,不讨论旧版兼容命令。
适用对象:
- 上位机开发人员
- 联调与测试人员
- 固件接口实现人员
## 2. 设备与接口
- 主控:`STM32F103RCT6`256KB Flash / 48KB SRAM
- 以太网芯片:`CH390D`
- 配置口:`USART1`
- 数据口:`USART2``USART3`
职责划分:
- `USART1`AT 配置口
- `USART2 / USART3`:业务数据口,可工作于普通透传或 MUX 透传模式
## 3. 最终协议模型
本项目最终控制协议由三部分组成:
1. `MUX`:全局数据承载模式开关
2. `NET`:全局静态网络配置记录
3. `LINK[ROLE]`:按角色名组织的链路配置记录(`S1/S2/C1/C2`
约束如下:
- 设备只有一张网卡,因此本地网络参数只配置一次
- DHCP 不属于最终协议范围
- 所有 AT 文本命令必须以 `\r\n` 结尾
-`DSTMASK=0x00` 时,MUX 数据口中的系统控制帧进入 AT 解析路径,其控制文本同样必须以 `\r\n` 结尾
## 4. MUX 帧格式
`MUX=1` 时,数据口使用如下帧格式:
```text
SYNC | LEN_H | LEN_L | SRCID | DSTMASK | PAYLOAD | TAIL
```
字段定义:
- `SYNC`:帧起始标记,建议固定为 `0x7E`
- `LEN_H / LEN_L``PAYLOAD` 长度,高字节在前
- `SRCID`:单字节源端点 ID
- `DSTMASK`:单字节目标端点位图
- `PAYLOAD`:负载数据
- `TAIL`:帧结束标记,建议固定为 `0x7F`
规则:
- `DSTMASK != 0x00`:业务数据帧
- `DSTMASK = 0x00`:系统控制帧
- 系统控制帧的 `PAYLOAD` 为 AT 文本,必须以 `\r\n` 结束
## 5. 统一端点编码
`UART``TCP` 逻辑实例统一进入同一套编码空间:
| 端点 | 编码 |
|------|------|
| `C1` | `0x01` |
| `C2` | `0x02` |
| `U0` | `0x04` |
| `U1` | `0x08` |
| `S1` | `0x10` |
| `S2` | `0x20` |
说明:
- `SRCID` 必须为单一端点值
- `DSTMASK` 可以是一个或多个端点编码按位或的结果
- `DSTMASK=0x00` 保留给系统控制帧
## 6. AT 命令总则
### 6.1 命令结尾
所有 AT 命令均必须以 `\r\n` 结尾。
例如:
```text
AT\r\n
AT+MUX?\r\n
AT+NET=192.168.1.100,255.255.255.0,192.168.1.1,02:00:00:00:00:01\r\n
```
### 6.2 持久化规则
参数设置成功后只写入当前运行配置,不会自动写入 Flash。
若要掉电保持,必须执行:
1. `AT+SAVE\r\n`
2. `AT+RESET\r\n`
### 6.3 响应风格
- 成功:`OK`
- 需要保存后生效时,允许追加提示文本
- 失败:`ERROR: <reason>`
## 7. 默认配置
### 7.1 MUX 默认值
```text
MUX = 0
```
### 7.2 NET 默认值
```text
NET = 192.168.1.100,255.255.255.0,192.168.1.1,02:00:00:00:00:01
```
### 7.3 LINK 默认值
```text
LINK:S1 = 1,8080,0.0.0.0,0,U0
LINK:S2 = 0,8081,0.0.0.0,0,U1
LINK:C1 = 1,9001,192.168.1.200,9000,U1
LINK:C2 = 0,9002,192.168.1.201,9001,U0
```
说明:
- `S1/S2/C1/C2` 为对外可见角色名
- 内部索引映射由固件管理,不对外暴露
UART 记号约定:
- `U0 = USART2`
- `U1 = USART3`
## 8. AT 命令定义
### 8.1 测试设备在线
命令:
```text
AT\r\n
```
返回:
```text
OK
```
### 8.2 查询摘要
命令:
```text
AT+?\r\n
AT+QUERY\r\n
```
推荐返回格式:
```text
+NET:IP=192.168.1.100,MASK=255.255.255.0,GW=192.168.1.1,MAC=02:00:00:00:00:01
+LINK:S1,EN=1,LPORT=8080,RIP=0.0.0.0,RPORT=0,UART=U0
+LINK:S2,EN=0,LPORT=8081,RIP=0.0.0.0,RPORT=0,UART=U1
+LINK:C1,EN=1,LPORT=9001,RIP=192.168.1.200,RPORT=9000,UART=U1
+LINK:C2,EN=0,LPORT=9002,RIP=192.168.1.201,RPORT=9001,UART=U0
+MUX:0
+MAP:UART2=0x04,UART3=0x08,C1=0x01,C2=0x02,S1=0x10,S2=0x20
+BAUD:U0=115200,U1=115200
OK
```
### 8.3 MUX 类命令
#### 设置 MUX
```text
AT+MUX=1\r\n
```
参数:
- `0`:普通透传模式
- `1`MUX 透传模式
查询:
```text
AT+MUX?\r\n
```
返回示例:
```text
+MUX:1
OK
```
### 8.4 NET 类命令
#### 设置 NET
```text
AT+NET=192.168.1.100,255.255.255.0,192.168.1.1,02:00:00:00:00:01\r\n
```
字段顺序:
```text
IP,MASK,GW,MAC
```
查询:
```text
AT+NET?\r\n
```
返回示例:
```text
+NET:IP=192.168.1.100,MASK=255.255.255.0,GW=192.168.1.1,MAC=02:00:00:00:00:01
OK
```
**MAC 设置说明:**
当MAC设置为全0时,固件将使用硬件MAC地址,此时通过AT+?查询到的MAC地址即为当前生效的硬件MAC地址。
### 8.5 LINK 类命令
#### 设置单条 LINK 记录
```text
AT+LINK=S1,1,8080,0.0.0.0,0,U0\r\n
AT+LINK=C1,1,9001,192.168.1.200,9000,U1\r\n
```
字段顺序:
```text
ROLE,EN,LPORT,RIP,RPORT,UART
```
字段说明:
- `ROLE`:链路角色名,固定为 `S1/S2/C1/C2`
- `EN``0/1`
- `LPORT`:本地端口
- `RIP`:对端 IP
- `RPORT`:对端端口
- `UART``U0/U1`
说明:
- `Server``Client` 共用同一条 `LINK` 记录模型
- `Server``RIP/RPORT` 可作为允许接入的对端约束或预设对端信息
- `Client``RIP/RPORT` 表示远端目标地址与端口
#### 查询单条 LINK
```text
AT+LINK=S1\r\n
```
返回示例:
```text
+LINK:S1,EN=1,LPORT=8080,RIP=0.0.0.0,RPORT=0,UART=U0
OK
```
#### 查询全部 LINK
```text
AT+LINK?\r\n
```
返回示例:
```text
+LINK:S1,EN=1,LPORT=8080,RIP=0.0.0.0,RPORT=0,UART=U0
+LINK:S2,EN=0,LPORT=8081,RIP=0.0.0.0,RPORT=0,UART=U1
+LINK:C1,EN=1,LPORT=9001,RIP=192.168.1.200,RPORT=9000,UART=U1
+LINK:C2,EN=0,LPORT=9002,RIP=192.168.1.201,RPORT=9001,UART=U0
OK
```
## 9. 保存与复位命令
### 9.1 保存配置
```text
AT+SAVE\r\n
```
成功返回:
```text
OK: Configuration saved
```
### 9.2 软件复位
```text
AT+RESET\r\n
```
返回:
```text
OK: Resetting...
```
### 9.3 恢复默认值
```text
AT+DEFAULT\r\n
```
返回:
```text
OK: Defaults restored
```
## 10. 常见错误返回
| 场景 | 返回 |
|------|------|
| 未知命令 | `ERROR: Unknown command` |
| 非法端口 | `ERROR: Invalid port` |
| 非法波特率 | `ERROR: Invalid baudrate` |
| 非法 IP 地址 | `ERROR: Invalid IP format` |
| 非法掩码 | `ERROR: Invalid mask format` |
| 非法网关 | `ERROR: Invalid gateway format` |
| 非法远端 IP | `ERROR: Invalid remote IP format` |
| 非法 MAC | `ERROR: Invalid MAC format` |
| 非法 `SRCID` / `DSTMASK` | `ERROR: Invalid route field` |
| Flash 保存失败 | `ERROR: Save failed` |
## 11. 推荐配置流程
```text
AT+NET=192.168.1.123,255.255.255.0,192.168.1.1,02:00:00:00:00:01\r\n
AT+LINK=S1,1,10001,0.0.0.0,0,U1\r\n
AT+LINK=S2,1,10003,0.0.0.0,0,U1\r\n
AT+LINK=C1,1,20001,192.168.1.201,10002,U0\r\n
AT+MUX=1\r\n
AT+SAVE\r\n
AT+RESET\r\n
```
## 12. 故障排查建议
### 12.1 发送 `AT` 没有返回
优先检查:
1. 是否连接到 `USART1`
2. 串口参数是否为 `115200 8N1`
3. 是否严格使用 `\r\n` 作为命令结尾
4. 接线是否正确
5. 设备是否正常上电运行
### 12.2 设置成功但重启后参数丢失
检查是否漏掉以下步骤:
1. `AT+SAVE\r\n`
2. `AT+RESET\r\n`
## 13. 相关文件
- AT 命令实现:`App/config.c`
- 配置结构与默认值:`App/config.h`
- FreeRTOS 任务定义:`Core/Src/freertos.c`
- 调试指导:`工程调试指南.md`
+2 -2
View File
@@ -19,8 +19,8 @@
* Private Definitions * Private Definitions
*---------------------------------------------------------------------------*/ *---------------------------------------------------------------------------*/
#define CONFIG_RX_BUFFER_SIZE 256 #define CONFIG_RX_BUFFER_SIZE 128
#define CONFIG_TX_BUFFER_SIZE 512 #define CONFIG_TX_BUFFER_SIZE 256
#define CONFIG_CMD_MAX_LEN 128 #define CONFIG_CMD_MAX_LEN 128
/* AT command prefixes */ /* AT command prefixes */
+2 -2
View File
@@ -22,8 +22,8 @@ extern "C" {
#define TCP_CLIENT_MAX_RECONNECT_TRIES 0 /* 0 = infinite */ #define TCP_CLIENT_MAX_RECONNECT_TRIES 0 /* 0 = infinite */
/* Buffer sizes */ /* Buffer sizes */
#define TCP_CLIENT_RX_BUFFER_SIZE 1024 #define TCP_CLIENT_RX_BUFFER_SIZE 512
#define TCP_CLIENT_TX_BUFFER_SIZE 1024 #define TCP_CLIENT_TX_BUFFER_SIZE 512
/* TCP Client state */ /* TCP Client state */
typedef enum { typedef enum {
+2 -2
View File
@@ -20,8 +20,8 @@ extern "C" {
#define TCP_SERVER_MAX_CONNECTIONS 1 #define TCP_SERVER_MAX_CONNECTIONS 1
/* Buffer sizes */ /* Buffer sizes */
#define TCP_SERVER_RX_BUFFER_SIZE 1024 #define TCP_SERVER_RX_BUFFER_SIZE 512
#define TCP_SERVER_TX_BUFFER_SIZE 1024 #define TCP_SERVER_TX_BUFFER_SIZE 512
/* TCP Server state */ /* TCP Server state */
typedef enum { typedef enum {
+2 -2
View File
@@ -25,8 +25,8 @@ typedef enum {
} uart_channel_t; } uart_channel_t;
/* DMA buffer sizes */ /* DMA buffer sizes */
#define UART_RX_DMA_BUFFER_SIZE 256 #define UART_RX_DMA_BUFFER_SIZE 128
#define UART_TX_DMA_BUFFER_SIZE 256 #define UART_TX_DMA_BUFFER_SIZE 128
/* UART configuration */ /* UART configuration */
typedef struct { typedef struct {
+2 -1
View File
@@ -65,7 +65,7 @@
#define configTICK_RATE_HZ ((TickType_t)1000) #define configTICK_RATE_HZ ((TickType_t)1000)
#define configMAX_PRIORITIES ( 56 ) #define configMAX_PRIORITIES ( 56 )
#define configMINIMAL_STACK_SIZE ((uint16_t)128) #define configMINIMAL_STACK_SIZE ((uint16_t)128)
#define configTOTAL_HEAP_SIZE ((size_t)16384) /* 16KB for LwIP + application */ #define configTOTAL_HEAP_SIZE ((size_t)8192) /* Fit R8 RAM budget with dynamic tasks */
#define configMAX_TASK_NAME_LEN ( 16 ) #define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_TRACE_FACILITY 1 #define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0 #define configUSE_16_BIT_TICKS 0
@@ -75,6 +75,7 @@
#define configUSE_COUNTING_SEMAPHORES 1 #define configUSE_COUNTING_SEMAPHORES 1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
#define configUSE_STREAM_BUFFERS 1 /* Enable StreamBuffer for UART data transfer */ #define configUSE_STREAM_BUFFERS 1 /* Enable StreamBuffer for UART data transfer */
#define configNUM_THREAD_LOCAL_STORAGE_POINTERS 1
/* Co-routine definitions. */ /* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0 #define configUSE_CO_ROUTINES 0
+5 -5
View File
@@ -50,11 +50,11 @@
/* Private define ------------------------------------------------------------*/ /* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */ /* USER CODE BEGIN PD */
/* Task stack sizes (words, not bytes) */ /* Task stack sizes (words, not bytes) */
#define LWIP_TASK_STACK_SIZE 512 #define LWIP_TASK_STACK_SIZE 384
#define TCP_SERVER_TASK_STACK_SIZE 384 #define TCP_SERVER_TASK_STACK_SIZE 320
#define TCP_CLIENT_TASK_STACK_SIZE 384 #define TCP_CLIENT_TASK_STACK_SIZE 320
#define UART_TRANS_TASK_STACK_SIZE 256 #define UART_TRANS_TASK_STACK_SIZE 192
#define CONFIG_TASK_STACK_SIZE 384 #define CONFIG_TASK_STACK_SIZE 256
#define DEFAULT_TASK_STACK_SIZE 128 #define DEFAULT_TASK_STACK_SIZE 128
/* Task priorities */ /* Task priorities */
+3
View File
@@ -4,6 +4,7 @@
*/ */
#include "lwip/opt.h" #include "lwip/opt.h"
#include "lwip/mem.h"
#include "lwip/sys.h" #include "lwip/sys.h"
#include "lwip/stats.h" #include "lwip/stats.h"
#include "arch/sys_arch.h" #include "arch/sys_arch.h"
@@ -15,6 +16,8 @@
#include <string.h> #include <string.h>
int errno;
/* Timeout for infinite wait */ /* Timeout for infinite wait */
#define LWIP_ARCH_TICK_PER_MS (1000 / configTICK_RATE_HZ) #define LWIP_ARCH_TICK_PER_MS (1000 / configTICK_RATE_HZ)
+1
View File
@@ -9,6 +9,7 @@
#include <stdint.h> #include <stdint.h>
#include <stdio.h> #include <stdio.h>
#include <stdlib.h> #include <stdlib.h>
#include "lwip/errno.h"
/* Use standard integer types from stdint.h */ /* Use standard integer types from stdint.h */
#define LWIP_NO_STDINT_H 0 #define LWIP_NO_STDINT_H 0
+4 -1
View File
@@ -31,6 +31,9 @@
#define MEM_LIBC_MALLOC 0 #define MEM_LIBC_MALLOC 0
#define MEMP_MEM_MALLOC 0 #define MEMP_MEM_MALLOC 0
/* Let lwIP provide the errno values used by sockets/netconn. */
#define LWIP_PROVIDE_ERRNO 1
/*----------------------------------------------------------------------------- /*-----------------------------------------------------------------------------
* Memory Configuration (optimized for STM32F103 with ~20KB RAM) * Memory Configuration (optimized for STM32F103 with ~20KB RAM)
*---------------------------------------------------------------------------*/ *---------------------------------------------------------------------------*/
@@ -63,7 +66,7 @@
#define MEMP_NUM_TCP_PCB_LISTEN 2 #define MEMP_NUM_TCP_PCB_LISTEN 2
/* Number of simultaneously queued TCP segments */ /* Number of simultaneously queued TCP segments */
#define MEMP_NUM_TCP_SEG 12 #define MEMP_NUM_TCP_SEG 17
/* Number of simultaneously active timeouts */ /* Number of simultaneously active timeouts */
#define MEMP_NUM_SYS_TIMEOUT 8 #define MEMP_NUM_SYS_TIMEOUT 8
+30
View File
@@ -37,6 +37,36 @@ typedef u32_t sys_prot_t;
#define SYS_MBOX_NULL ((sys_mbox_t)NULL) #define SYS_MBOX_NULL ((sys_mbox_t)NULL)
#define SYS_MUTEX_NULL ((sys_mutex_t)NULL) #define SYS_MUTEX_NULL ((sys_mutex_t)NULL)
/* Use one per-thread semaphore for lwIP netconn/socket API calls. */
#define LWIP_NETCONN_THREAD_SEM_TLS_INDEX 0
#define LWIP_NETCONN_THREAD_SEM_GET() \
((sys_sem_t *)pvTaskGetThreadLocalStoragePointer(NULL, LWIP_NETCONN_THREAD_SEM_TLS_INDEX))
#define LWIP_NETCONN_THREAD_SEM_ALLOC() \
do { \
sys_sem_t *sem = (sys_sem_t *)mem_malloc(sizeof(sys_sem_t)); \
if (sem != NULL) { \
*sem = SYS_SEM_NULL; \
if (sys_sem_new(sem, 0) == ERR_OK) { \
vTaskSetThreadLocalStoragePointer(NULL, \
LWIP_NETCONN_THREAD_SEM_TLS_INDEX,\
sem); \
} else { \
mem_free(sem); \
} \
} \
} while (0)
#define LWIP_NETCONN_THREAD_SEM_FREE() \
do { \
sys_sem_t *sem = LWIP_NETCONN_THREAD_SEM_GET(); \
if (sem != NULL) { \
sys_sem_free(sem); \
mem_free(sem); \
vTaskSetThreadLocalStoragePointer(NULL, \
LWIP_NETCONN_THREAD_SEM_TLS_INDEX, \
NULL); \
} \
} while (0)
/* Check if semaphore/mbox is valid */ /* Check if semaphore/mbox is valid */
#define sys_sem_valid(sem) ((sem) != NULL && (*(sem)) != SYS_SEM_NULL) #define sys_sem_valid(sem) ((sem) != NULL && (*(sem)) != SYS_SEM_NULL)
#define sys_sem_set_invalid(sem) do { if ((sem) != NULL) { *(sem) = SYS_SEM_NULL; } } while(0) #define sys_sem_set_invalid(sem) do { if ((sem) != NULL) { *(sem) = SYS_SEM_NULL; } } while(0)
+190
View File
@@ -0,0 +1,190 @@
;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
;* File Name : startup_stm32f103xb.s
;* Description : STM32F103xB Devices vector table for EWARM toolchain.
MODULE ?cstartup
EXTERN __iar_program_start
EXTERN SystemInit
PUBLIC __vector_table
SECTION .intvec:CODE:NOROOT(2)
__vector_table
DCD sfe(CSTACK)
DCD Reset_Handler
DCD NMI_Handler
DCD HardFault_Handler
DCD MemManage_Handler
DCD BusFault_Handler
DCD UsageFault_Handler
DCD 0
DCD 0
DCD 0
DCD 0
DCD SVC_Handler
DCD DebugMon_Handler
DCD 0
DCD PendSV_Handler
DCD SysTick_Handler
DCD WWDG_IRQHandler
DCD PVD_IRQHandler
DCD TAMPER_IRQHandler
DCD RTC_IRQHandler
DCD FLASH_IRQHandler
DCD RCC_IRQHandler
DCD EXTI0_IRQHandler
DCD EXTI1_IRQHandler
DCD EXTI2_IRQHandler
DCD EXTI3_IRQHandler
DCD EXTI4_IRQHandler
DCD DMA1_Channel1_IRQHandler
DCD DMA1_Channel2_IRQHandler
DCD DMA1_Channel3_IRQHandler
DCD DMA1_Channel4_IRQHandler
DCD DMA1_Channel5_IRQHandler
DCD DMA1_Channel6_IRQHandler
DCD DMA1_Channel7_IRQHandler
DCD ADC1_2_IRQHandler
DCD USB_HP_CAN1_TX_IRQHandler
DCD USB_LP_CAN1_RX0_IRQHandler
DCD CAN1_RX1_IRQHandler
DCD CAN1_SCE_IRQHandler
DCD EXTI9_5_IRQHandler
DCD TIM1_BRK_IRQHandler
DCD TIM1_UP_IRQHandler
DCD TIM1_TRG_COM_IRQHandler
DCD TIM1_CC_IRQHandler
DCD TIM2_IRQHandler
DCD TIM3_IRQHandler
DCD TIM4_IRQHandler
DCD I2C1_EV_IRQHandler
DCD I2C1_ER_IRQHandler
DCD I2C2_EV_IRQHandler
DCD I2C2_ER_IRQHandler
DCD SPI1_IRQHandler
DCD SPI2_IRQHandler
DCD USART1_IRQHandler
DCD USART2_IRQHandler
DCD USART3_IRQHandler
DCD EXTI15_10_IRQHandler
DCD RTC_Alarm_IRQHandler
DCD USBWakeUp_IRQHandler
THUMB
Reset_Handler
LDR R0, =SystemInit
BLX R0
LDR R0, =__iar_program_start
BX R0
PUBWEAK NMI_Handler
PUBWEAK HardFault_Handler
PUBWEAK MemManage_Handler
PUBWEAK BusFault_Handler
PUBWEAK UsageFault_Handler
PUBWEAK SVC_Handler
PUBWEAK DebugMon_Handler
PUBWEAK PendSV_Handler
PUBWEAK SysTick_Handler
PUBWEAK WWDG_IRQHandler
PUBWEAK PVD_IRQHandler
PUBWEAK TAMPER_IRQHandler
PUBWEAK RTC_IRQHandler
PUBWEAK FLASH_IRQHandler
PUBWEAK RCC_IRQHandler
PUBWEAK EXTI0_IRQHandler
PUBWEAK EXTI1_IRQHandler
PUBWEAK EXTI2_IRQHandler
PUBWEAK EXTI3_IRQHandler
PUBWEAK EXTI4_IRQHandler
PUBWEAK DMA1_Channel1_IRQHandler
PUBWEAK DMA1_Channel2_IRQHandler
PUBWEAK DMA1_Channel3_IRQHandler
PUBWEAK DMA1_Channel4_IRQHandler
PUBWEAK DMA1_Channel5_IRQHandler
PUBWEAK DMA1_Channel6_IRQHandler
PUBWEAK DMA1_Channel7_IRQHandler
PUBWEAK ADC1_2_IRQHandler
PUBWEAK USB_HP_CAN1_TX_IRQHandler
PUBWEAK USB_LP_CAN1_RX0_IRQHandler
PUBWEAK CAN1_RX1_IRQHandler
PUBWEAK CAN1_SCE_IRQHandler
PUBWEAK EXTI9_5_IRQHandler
PUBWEAK TIM1_BRK_IRQHandler
PUBWEAK TIM1_UP_IRQHandler
PUBWEAK TIM1_TRG_COM_IRQHandler
PUBWEAK TIM1_CC_IRQHandler
PUBWEAK TIM2_IRQHandler
PUBWEAK TIM3_IRQHandler
PUBWEAK TIM4_IRQHandler
PUBWEAK I2C1_EV_IRQHandler
PUBWEAK I2C1_ER_IRQHandler
PUBWEAK I2C2_EV_IRQHandler
PUBWEAK I2C2_ER_IRQHandler
PUBWEAK SPI1_IRQHandler
PUBWEAK SPI2_IRQHandler
PUBWEAK USART1_IRQHandler
PUBWEAK USART2_IRQHandler
PUBWEAK USART3_IRQHandler
PUBWEAK EXTI15_10_IRQHandler
PUBWEAK RTC_Alarm_IRQHandler
PUBWEAK USBWakeUp_IRQHandler
NMI_Handler
HardFault_Handler
MemManage_Handler
BusFault_Handler
UsageFault_Handler
SVC_Handler
DebugMon_Handler
PendSV_Handler
SysTick_Handler
WWDG_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USB_HP_CAN1_TX_IRQHandler
USB_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_IRQHandler
TIM1_UP_IRQHandler
TIM1_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTC_Alarm_IRQHandler
USBWakeUp_IRQHandler
B .
END
+27
View File
@@ -0,0 +1,27 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$/config/ide/IdeFlashRegions.icf" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x0800FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x0;
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };
+4 -4
View File
@@ -97,7 +97,7 @@ TCP2UART Keil 工程配置说明
打开 Keil -> Project -> Options for Target -> C/C++ -> Define 打开 Keil -> Project -> Options for Target -> C/C++ -> Define
保持现有定义,不需要额外添加: 保持现有定义,不需要额外添加:
USE_HAL_DRIVER,STM32F103xB USE_HAL_DRIVER,STM32F103xE
======================================== ========================================
四、编译优化设置 四、编译优化设置
@@ -113,8 +113,8 @@ USE_HAL_DRIVER,STM32F103xB
======================================== ========================================
确认 ROM 和 RAM 配置正确: 确认 ROM 和 RAM 配置正确:
- IROM1: 0x08000000, Size: 0x10000 (64KB) - IROM1: 0x08000000, Size: 0x40000 (256KB)
- IRAM1: 0x20000000, Size: 0x5000 (20KB) - IRAM1: 0x20000000, Size: 0xC000 (48KB)
======================================== ========================================
六、编译验证 六、编译验证
@@ -138,7 +138,7 @@ Debug 选项卡:
Utilities 选项卡: Utilities 选项卡:
- 选择正确的 Flash 算法 - 选择正确的 Flash 算法
- STM32F10x Med-density Flash (64KB) - STM32F10x High-density Flash (256KB)
======================================== ========================================
快速添加方法(可选) 快速添加方法(可选)
+285 -11
View File
@@ -14,16 +14,16 @@
<uAC6>0</uAC6> <uAC6>0</uAC6>
<TargetOption> <TargetOption>
<TargetCommonOption> <TargetCommonOption>
<Device>STM32F103R8</Device> <Device>STM32F103RC</Device>
<Vendor>STMicroelectronics</Vendor> <Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32F1xx_DFP.2.4.1</PackID> <PackID>Keil.STM32F1xx_DFP.2.4.1</PackID>
<PackURL>https://www.keil.com/pack/</PackURL> <PackURL>https://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00005000) IROM(0x08000000,0x00010000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu> <Cpu>IRAM(0x20000000,0x0000C000) IROM(0x08000000,0x00040000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec> <FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile> <StartupFile></StartupFile>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000 -FP0($$Device:STM32F103R8$Flash\STM32F10x_128.FLM))</FlashDriverDll> <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_HD -FS08000000 -FL040000 -FP0($$Device:STM32F103RC$Flash\STM32F10x_HD.FLM))</FlashDriverDll>
<DeviceId>0</DeviceId> <DeviceId>0</DeviceId>
<RegisterFile>$$Device:STM32F103R8$Device\Include\stm32f10x.h</RegisterFile> <RegisterFile>$$Device:STM32F103RC$Device\Include\stm32f10x.h</RegisterFile>
<MemoryEnv></MemoryEnv> <MemoryEnv></MemoryEnv>
<Cmp></Cmp> <Cmp></Cmp>
<Asm></Asm> <Asm></Asm>
@@ -33,7 +33,7 @@
<SLE66CMisc></SLE66CMisc> <SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc> <SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc> <SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:STM32F103R8$SVD\STM32F103xx.svd</SFDFile> <SFDFile>$$Device:STM32F103RC$SVD\STM32F103xx.svd</SFDFile>
<bCustSvd>0</bCustSvd> <bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv> <UseEnv>0</UseEnv>
<BinPath></BinPath> <BinPath></BinPath>
@@ -247,12 +247,12 @@
<IRAM> <IRAM>
<Type>0</Type> <Type>0</Type>
<StartAddress>0x20000000</StartAddress> <StartAddress>0x20000000</StartAddress>
<Size>0x5000</Size> <Size>0xC000</Size>
</IRAM> </IRAM>
<IROM> <IROM>
<Type>1</Type> <Type>1</Type>
<StartAddress>0x8000000</StartAddress> <StartAddress>0x8000000</StartAddress>
<Size>0x10000</Size> <Size>0x40000</Size>
</IROM> </IROM>
<XRAM> <XRAM>
<Type>0</Type> <Type>0</Type>
@@ -277,7 +277,7 @@
<OCR_RVCT4> <OCR_RVCT4>
<Type>1</Type> <Type>1</Type>
<StartAddress>0x8000000</StartAddress> <StartAddress>0x8000000</StartAddress>
<Size>0x10000</Size> <Size>0x40000</Size>
</OCR_RVCT4> </OCR_RVCT4>
<OCR_RVCT5> <OCR_RVCT5>
<Type>1</Type> <Type>1</Type>
@@ -302,7 +302,7 @@
<OCR_RVCT9> <OCR_RVCT9>
<Type>0</Type> <Type>0</Type>
<StartAddress>0x20000000</StartAddress> <StartAddress>0x20000000</StartAddress>
<Size>0x5000</Size> <Size>0xC000</Size>
</OCR_RVCT9> </OCR_RVCT9>
<OCR_RVCT10> <OCR_RVCT10>
<Type>0</Type> <Type>0</Type>
@@ -338,9 +338,9 @@
<v6Rtti>0</v6Rtti> <v6Rtti>0</v6Rtti>
<VariousControls> <VariousControls>
<MiscControls></MiscControls> <MiscControls></MiscControls>
<Define>USE_HAL_DRIVER,STM32F103xB</Define> <Define>USE_HAL_DRIVER,STM32F103xE</Define>
<Undefine></Undefine> <Undefine></Undefine>
<IncludePath>../Core/Inc;../Drivers/STM32F1xx_HAL_Driver/Inc;../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy;../Drivers/CMSIS/Device/ST/STM32F1xx/Include;../Drivers/CMSIS/Include;../Middlewares/Third_Party/FreeRTOS/Source/include;../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2;../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM3</IncludePath> <IncludePath>../Core/Inc;../Drivers/STM32F1xx_HAL_Driver/Inc;../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy;../Drivers/CMSIS/Device/ST/STM32F1xx/Include;../Drivers/CMSIS/Include;../Middlewares/Third_Party/FreeRTOS/Source/include;../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2;../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM3;..\Drivers\CH390;..\Drivers\LwIP\src\include;..\Drivers\LwIP\src\include\lwip;..\Drivers\LwIP\src\include\netif;..\Drivers\LwIP\src\include\arch;..\Drivers\LwIP\port;..\App</IncludePath>
</VariousControls> </VariousControls>
</Cads> </Cads>
<Aads> <Aads>
@@ -1211,6 +1211,271 @@
</File> </File>
</Files> </Files>
</Group> </Group>
<Group>
<GroupName>Drivers/CH390</GroupName>
<Files>
<File>
<FileName>CH390.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\CH390\CH390.c</FilePath>
</File>
<File>
<FileName>CH390_Interface.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\CH390\CH390_Interface.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Drivers/LwIP/core</GroupName>
<Files>
<File>
<FileName>altcp.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\altcp.c</FilePath>
</File>
<File>
<FileName>altcp_alloc.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\altcp_alloc.c</FilePath>
</File>
<File>
<FileName>altcp_tcp.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\altcp_tcp.c</FilePath>
</File>
<File>
<FileName>def.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\def.c</FilePath>
</File>
<File>
<FileName>dns.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\dns.c</FilePath>
</File>
<File>
<FileName>inet_chksum.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\inet_chksum.c</FilePath>
</File>
<File>
<FileName>init.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\init.c</FilePath>
</File>
<File>
<FileName>ip.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\ip.c</FilePath>
</File>
<File>
<FileName>mem.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\mem.c</FilePath>
</File>
<File>
<FileName>memp.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\memp.c</FilePath>
</File>
<File>
<FileName>netif.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\netif.c</FilePath>
</File>
<File>
<FileName>pbuf.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\pbuf.c</FilePath>
</File>
<File>
<FileName>raw.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\raw.c</FilePath>
</File>
<File>
<FileName>stats.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\stats.c</FilePath>
</File>
<File>
<FileName>sys.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\sys.c</FilePath>
</File>
<File>
<FileName>tcp.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\tcp.c</FilePath>
</File>
<File>
<FileName>tcp_in.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\tcp_in.c</FilePath>
</File>
<File>
<FileName>tcp_out.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\tcp_out.c</FilePath>
</File>
<File>
<FileName>timeouts.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\timeouts.c</FilePath>
</File>
<File>
<FileName>udp.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\udp.c</FilePath>
</File>
<File>
<FileName>acd.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\ipv4\acd.c</FilePath>
</File>
<File>
<FileName>autoip.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\ipv4\autoip.c</FilePath>
</File>
<File>
<FileName>dhcp.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\ipv4\dhcp.c</FilePath>
</File>
<File>
<FileName>etharp.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\ipv4\etharp.c</FilePath>
</File>
<File>
<FileName>icmp.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\ipv4\icmp.c</FilePath>
</File>
<File>
<FileName>igmp.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\ipv4\igmp.c</FilePath>
</File>
<File>
<FileName>ip4.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\ipv4\ip4.c</FilePath>
</File>
<File>
<FileName>ip4_addr.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\ipv4\ip4_addr.c</FilePath>
</File>
<File>
<FileName>ip4_frag.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\core\ipv4\ip4_frag.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Drivers/LwIP/api</GroupName>
<Files>
<File>
<FileName>api_lib.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\api\api_lib.c</FilePath>
</File>
<File>
<FileName>api_msg.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\api\api_msg.c</FilePath>
</File>
<File>
<FileName>err.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\api\err.c</FilePath>
</File>
<File>
<FileName>if_api.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\api\if_api.c</FilePath>
</File>
<File>
<FileName>netbuf.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\api\netbuf.c</FilePath>
</File>
<File>
<FileName>netdb.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\api\netdb.c</FilePath>
</File>
<File>
<FileName>netifapi.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\api\netifapi.c</FilePath>
</File>
<File>
<FileName>sockets.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\api\sockets.c</FilePath>
</File>
<File>
<FileName>tcpip.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\api\tcpip.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Drivers/LwIP/netif</GroupName>
<Files>
<File>
<FileName>ethernetif.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\src\netif\ethernetif.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Drivers/LwIP/port</GroupName>
<Files>
<File>
<FileName>sys_arch.c</FileName>
<FileType>1</FileType>
<FilePath>..\Drivers\LwIP\port\sys_arch.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>APP</GroupName>
<Files>
<File>
<FileName>config.c</FileName>
<FileType>1</FileType>
<FilePath>..\App\config.c</FilePath>
</File>
<File>
<FileName>flash_param.c</FileName>
<FileType>1</FileType>
<FilePath>..\App\flash_param.c</FilePath>
</File>
<File>
<FileName>tcp_client.c</FileName>
<FileType>1</FileType>
<FilePath>..\App\tcp_client.c</FilePath>
</File>
<File>
<FileName>tcp_server.c</FileName>
<FileType>1</FileType>
<FilePath>..\App\tcp_server.c</FilePath>
</File>
<File>
<FileName>uart_trans.c</FileName>
<FileType>1</FileType>
<FilePath>..\App\uart_trans.c</FilePath>
</File>
</Files>
</Group>
<Group> <Group>
<GroupName>::CMSIS</GroupName> <GroupName>::CMSIS</GroupName>
</Group> </Group>
@@ -1231,4 +1496,13 @@
<files/> <files/>
</RTE> </RTE>
<LayerInfo>
<Layers>
<Layer>
<LayName>TCP2UART</LayName>
<LayPrjMark>1</LayPrjMark>
</Layer>
</Layers>
</LayerInfo>
</Project> </Project>
+236
View File
@@ -0,0 +1,236 @@
=================================================== keil-build-viewer v1.6 ==================================================
[Search keil project] 1 item(s)
D:\code\STM32Project\TCP2UART\MDK-ARM\TCP2UART.uvprojx
[User input]
[Current folder] D:\code\STM32Project\TCP2UART\MDK-ARM
[Encoding] 936
[Keil project path] D:\code\STM32Project\TCP2UART\MDK-ARM\TCP2UART.uvprojx
[Keil project name] TCP2UART.uvprojx
[Is keil v4] 0
[target name] TCP2UART
[final target name] TCP2UART
[Device] STM32F103R8
[Target name]
[Output name] TCP2UART
[Output path] TCP2UART\
[Listing path] .\TCP2UART\
[Is has pack] 1
[Is enbale LTO] 0
[Is has user library] 0
[Is custom scatter file] 0
[TCP2UART.uvprojx] [TCP2UART] [STM32F103R8] [LTO disable]
[memory info]
[name] IRAM [base addr] 0x20000000 [size] 0x00005000 [type] 1 [off-chip] 0 [is pack] 1 [ID] 2
[name] IROM [base addr] 0x08000000 [size] 0x00010000 [type] 2 [off-chip] 0 [is pack] 1 [ID] 3
[map file path] D:\code\STM32Project\TCP2UART\MDK-ARM\TCP2UART\TCP2UART.map
[region info]
[load region] LR_IROM1
[execution region] ER_IROM1, 0x08000000, 0x00010000, 0x0000D178 [memory type] 2 [memory ID] 3
[execution region] RW_IRAM1, 0x20000000, 0x00005000, 0x00004FF8 [memory type] 1 [memory ID] 2
[ZI block] addr: 0x2000015C, size: 0x00004E9C (20124)
[object name max length] 24
[object path max length] 60
[object in map file]
[object name] ch390.o [path] ..\Drivers\CH390\CH390.c
[object name] ch390_interface.o [path] ..\Drivers\CH390\CH390_Interface.c
[object name] ch390_runtime.o [path] ..\Drivers\CH390\ch390_runtime.c
[object name] config.o [path] ..\App\config.c
[object name] def.o [path] ..\Drivers\LwIP\src\core\def.c
[object name] dma.o [path] ../Core/Src/dma.c
[object name] etharp.o [path] ..\Drivers\LwIP\src\core\ipv4\etharp.c
[object name] ethernet.o [path] ..\Drivers\LwIP\src\netif\ethernet.c
[object name] ethernetif.o [path] ..\Drivers\LwIP\src\netif\ethernetif.c
[object name] flash_param.o [path] ..\App\flash_param.c
[object name] gpio.o [path] ../Core/Src/gpio.c
[object name] icmp.o [path] ..\Drivers\LwIP\src\core\ipv4\icmp.c
[object name] inet_chksum.o [path] ..\Drivers\LwIP\src\core\inet_chksum.c
[object name] init.o [path] ..\Drivers\LwIP\src\core\init.c
[object name] ip.o [path] ..\Drivers\LwIP\src\core\ip.c
[object name] ip4.o [path] ..\Drivers\LwIP\src\core\ipv4\ip4.c
[object name] ip4_addr.o [path] ..\Drivers\LwIP\src\core\ipv4\ip4_addr.c
[object name] iwdg.o [path] ../Core/Src/iwdg.c
[object name] main.o [path] ../Core/Src/main.c
[object name] mem.o [path] ..\Drivers\LwIP\src\core\mem.c
[object name] memp.o [path] ..\Drivers\LwIP\src\core\memp.c
[object name] netif.o [path] ..\Drivers\LwIP\src\core\netif.c
[object name] pbuf.o [path] ..\Drivers\LwIP\src\core\pbuf.c
[object name] raw.o [path] ..\Drivers\LwIP\src\core\raw.c
[object name] segger_rtt.o [path] ..\Middlewares\Third_Party\SEGGER_RTT\SEGGER_RTT.c
[object name] segger_rtt_printf.o [path] ..\Middlewares\Third_Party\SEGGER_RTT\SEGGER_RTT_printf.c
[object name] spi.o [path] ../Core/Src/spi.c
[object name] startup_stm32f103xb.o [path] startup_stm32f103xb.s
[object name] stm32f1xx_hal.o [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c
[object name] stm32f1xx_hal_cortex.o [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c
[object name] stm32f1xx_hal_dma.o [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c
[object name] stm32f1xx_hal_flash.o [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c
[object name] stm32f1xx_hal_flash_ex.o [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c
[object name] stm32f1xx_hal_gpio.o [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c
[object name] stm32f1xx_hal_iwdg.o [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_iwdg.c
[object name] stm32f1xx_hal_msp.o [path] ../Core/Src/stm32f1xx_hal_msp.c
[object name] stm32f1xx_hal_rcc.o [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c
[object name] stm32f1xx_hal_spi.o [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c
[object name] stm32f1xx_hal_tim.o [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c
[object name] stm32f1xx_hal_tim_ex.o [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c
[object name] stm32f1xx_hal_uart.o [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c
[object name] stm32f1xx_it.o [path] ../Core/Src/stm32f1xx_it.c
[object name] system_stm32f1xx.o [path] ../Core/Src/system_stm32f1xx.c
[object name] tcp.o [path] ..\Drivers\LwIP\src\core\tcp.c
[object name] tcp_client.o [path] ..\App\tcp_client.c
[object name] tcp_in.o [path] ..\Drivers\LwIP\src\core\tcp_in.c
[object name] tcp_out.o [path] ..\Drivers\LwIP\src\core\tcp_out.c
[object name] tcp_server.o [path] ..\App\tcp_server.c
[object name] tim.o [path] ../Core/Src/tim.c
[object name] timeouts.o [path] ..\Drivers\LwIP\src\core\timeouts.c
[object name] uart_trans.o [path] ..\App\uart_trans.c
[object name] usart.o [path] ../Core/Src/usart.c
[file path in keil project]
[old name] startup_stm32f103xb.s [type] 1 [path] startup_stm32f103xb.s
[old name] main.c [type] 1 [path] ../Core/Src/main.c
[old name] gpio.c [type] 1 [path] ../Core/Src/gpio.c
[old name] dma.c [type] 1 [path] ../Core/Src/dma.c
[old name] iwdg.c [type] 1 [path] ../Core/Src/iwdg.c
[old name] tim.c [type] 1 [path] ../Core/Src/tim.c
[old name] spi.c [type] 1 [path] ../Core/Src/spi.c
[old name] usart.c [type] 1 [path] ../Core/Src/usart.c
[old name] stm32f1xx_it.c [type] 1 [path] ../Core/Src/stm32f1xx_it.c
[old name] stm32f1xx_hal_msp.c [type] 1 [path] ../Core/Src/stm32f1xx_hal_msp.c
[old name] stm32f1xx_hal_gpio_ex.c [type] 1 [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c
[old name] stm32f1xx_hal_iwdg.c [type] 1 [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_iwdg.c
[old name] stm32f1xx_hal.c [type] 1 [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c
[old name] stm32f1xx_hal_rcc.c [type] 1 [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c
[old name] stm32f1xx_hal_rcc_ex.c [type] 1 [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c
[old name] stm32f1xx_hal_gpio.c [type] 1 [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c
[old name] stm32f1xx_hal_dma.c [type] 1 [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c
[old name] stm32f1xx_hal_cortex.c [type] 1 [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c
[old name] stm32f1xx_hal_pwr.c [type] 1 [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c
[old name] stm32f1xx_hal_flash.c [type] 1 [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c
[old name] stm32f1xx_hal_flash_ex.c [type] 1 [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c
[old name] stm32f1xx_hal_exti.c [type] 1 [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c
[old name] stm32f1xx_hal_spi.c [type] 1 [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c
[old name] stm32f1xx_hal_tim.c [type] 1 [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c
[old name] stm32f1xx_hal_tim_ex.c [type] 1 [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c
[old name] stm32f1xx_hal_uart.c [type] 1 [path] ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c
[old name] system_stm32f1xx.c [type] 1 [path] ../Core/Src/system_stm32f1xx.c
[old name] CH390.c [type] 1 [path] ..\Drivers\CH390\CH390.c
[old name] CH390_Interface.c [type] 1 [path] ..\Drivers\CH390\CH390_Interface.c
[old name] ch390_runtime.c [type] 1 [path] ..\Drivers\CH390\ch390_runtime.c
[old name] def.c [type] 1 [path] ..\Drivers\LwIP\src\core\def.c
[old name] inet_chksum.c [type] 1 [path] ..\Drivers\LwIP\src\core\inet_chksum.c
[old name] init.c [type] 1 [path] ..\Drivers\LwIP\src\core\init.c
[old name] ip.c [type] 1 [path] ..\Drivers\LwIP\src\core\ip.c
[old name] mem.c [type] 1 [path] ..\Drivers\LwIP\src\core\mem.c
[old name] memp.c [type] 1 [path] ..\Drivers\LwIP\src\core\memp.c
[old name] netif.c [type] 1 [path] ..\Drivers\LwIP\src\core\netif.c
[old name] pbuf.c [type] 1 [path] ..\Drivers\LwIP\src\core\pbuf.c
[old name] raw.c [type] 1 [path] ..\Drivers\LwIP\src\core\raw.c
[old name] stats.c [type] 1 [path] ..\Drivers\LwIP\src\core\stats.c
[old name] sys.c [type] 1 [path] ..\Drivers\LwIP\src\core\sys.c
[old name] tcp.c [type] 1 [path] ..\Drivers\LwIP\src\core\tcp.c
[old name] tcp_in.c [type] 1 [path] ..\Drivers\LwIP\src\core\tcp_in.c
[old name] tcp_out.c [type] 1 [path] ..\Drivers\LwIP\src\core\tcp_out.c
[old name] timeouts.c [type] 1 [path] ..\Drivers\LwIP\src\core\timeouts.c
[old name] udp.c [type] 1 [path] ..\Drivers\LwIP\src\core\udp.c
[old name] etharp.c [type] 1 [path] ..\Drivers\LwIP\src\core\ipv4\etharp.c
[old name] icmp.c [type] 1 [path] ..\Drivers\LwIP\src\core\ipv4\icmp.c
[old name] ip4.c [type] 1 [path] ..\Drivers\LwIP\src\core\ipv4\ip4.c
[old name] ip4_addr.c [type] 1 [path] ..\Drivers\LwIP\src\core\ipv4\ip4_addr.c
[old name] ip4_frag.c [type] 1 [path] ..\Drivers\LwIP\src\core\ipv4\ip4_frag.c
[old name] ethernet.c [type] 1 [path] ..\Drivers\LwIP\src\netif\ethernet.c
[old name] ethernetif.c [type] 1 [path] ..\Drivers\LwIP\src\netif\ethernetif.c
[old name] config.c [type] 1 [path] ..\App\config.c
[old name] flash_param.c [type] 1 [path] ..\App\flash_param.c
[old name] tcp_client.c [type] 1 [path] ..\App\tcp_client.c
[old name] tcp_server.c [type] 1 [path] ..\App\tcp_server.c
[old name] uart_trans.c [type] 1 [path] ..\App\uart_trans.c
[old name] SEGGER_RTT.c [type] 1 [path] ..\Middlewares\Third_Party\SEGGER_RTT\SEGGER_RTT.c
[old name] SEGGER_RTT_printf.c [type] 1 [path] ..\Middlewares\Third_Party\SEGGER_RTT\SEGGER_RTT_printf.c
[record region info]
[load region] LR_IROM1
[execution region] ER_IROM1, 0x08000000, 0x00010000, 0x0000D178 [type] 2 [ID] 3
[execution region] RW_IRAM1, 0x20000000, 0x00005000, 0x00004FF8 [type] 1 [ID] 2
---------------------------------------------------------------------------------
FILE(s) | RAM (byte) | FLASH (byte) |
---------------------------------------------------------------------------------
ch390.o | 0 | 590 |
ch390_interface.o | 0 | 680 |
ch390_runtime.o | 91 | 1534 |
config.o | 1248 | 4289 |
def.o | 0 | 8 |
dma.o | 0 | 124 |
etharp.o | 241 | 1773 |
ethernet.o | 0 | 250 |
ethernetif.o | 48 | 178 |
flash_param.o | 0 | 246 |
gpio.o | 0 | 240 |
icmp.o | 0 | 452 |
inet_chksum.o | 0 | 334 |
init.o | 0 | 26 |
ip.o | 24 | 0 |
ip4.o | 2 | 780 |
ip4_addr.o | 0 | 50 |
iwdg.o | 12 | 0 |
main.o | 278 | 2937 |
mem.o | 4127 | 840 |
memp.o | 6496 | 472 |
netif.o | 12 | 594 |
pbuf.o | 0 | 1118 |
raw.o | 4 | 252 |
segger_rtt.o | 440 | 391 |
segger_rtt_printf.o | 0 | 64 |
spi.o | 88 | 216 |
startup_stm32f103xb.o | 1024 | 296 |
stm32f1xx_hal.o | 12 | 140 |
stm32f1xx_hal_cortex.o | 0 | 198 |
stm32f1xx_hal_dma.o | 0 | 808 |
stm32f1xx_hal_flash.o | 32 | 392 |
stm32f1xx_hal_flash_ex.o | 0 | 240 |
stm32f1xx_hal_gpio.o | 0 | 516 |
stm32f1xx_hal_iwdg.o | 0 | 12 |
stm32f1xx_hal_msp.o | 0 | 60 |
stm32f1xx_hal_rcc.o | 0 | 1258 |
stm32f1xx_hal_spi.o | 0 | 1510 |
stm32f1xx_hal_tim.o | 0 | 936 |
stm32f1xx_hal_tim_ex.o | 0 | 108 |
stm32f1xx_hal_uart.o | 0 | 2300 |
stm32f1xx_it.o | 0 | 490 |
system_stm32f1xx.o | 4 | 30 |
tcp.o | 32 | 3699 |
tcp_client.o | 1120 | 1216 |
tcp_in.o | 56 | 3720 |
tcp_out.o | 0 | 3862 |
tcp_server.o | 1104 | 962 |
tim.o | 72 | 164 |
timeouts.o | 12 | 402 |
uart_trans.o | 2936 | 1268 |
usart.o | 624 | 816 |
---------------------------------------------------------------------------------
[memory print mode]: 0
LR_IROM1
RAM 1 [0x20000000 | 0x00005000 (20480)]
[zi start] 1 [zi end] 49
RW_IRAM1 [0x20000000]|¡ö¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ¡õ_| ( 19.9 KB / 20.0 KB ) 100.0%
FLASH 1 [0x08000000 | 0x00010000 (65536)]
ER_IROM1 [0x08000000]|¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö¡ö__________| ( 52.3 KB / 64.0 KB ) 81.8%
[htm file path] D:\code\STM32Project\TCP2UART\MDK-ARM\TCP2UART\TCP2UART.htm
Maximum Stack Usage = 968 bytes + Unknown(Functions without stacksize, Cycles, Untraceable Function Pointers)
=============================================================================================================================
run time: 0.179 s
+1 -1
View File
@@ -40,7 +40,7 @@ __initial_sp
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h> ; </h>
Heap_Size EQU 0x1000 Heap_Size EQU 0x0
AREA HEAP, NOINIT, READWRITE, ALIGN=3 AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base __heap_base
+1 -1
View File
@@ -39,7 +39,7 @@ __initial_sp
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h> ; </h>
Heap_Size EQU 0x2800 Heap_Size EQU 0x0
AREA HEAP, NOINIT, READWRITE, ALIGN=3 AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base __heap_base
+82 -60
View File
@@ -31,7 +31,7 @@ Dma.USART2_RX.0.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART2_RX.0.Instance=DMA1_Channel6 Dma.USART2_RX.0.Instance=DMA1_Channel6
Dma.USART2_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE Dma.USART2_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART2_RX.0.MemInc=DMA_MINC_ENABLE Dma.USART2_RX.0.MemInc=DMA_MINC_ENABLE
Dma.USART2_RX.0.Mode=DMA_NORMAL Dma.USART2_RX.0.Mode=DMA_CIRCULAR
Dma.USART2_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE Dma.USART2_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART2_RX.0.PeriphInc=DMA_PINC_DISABLE Dma.USART2_RX.0.PeriphInc=DMA_PINC_DISABLE
Dma.USART2_RX.0.Priority=DMA_PRIORITY_LOW Dma.USART2_RX.0.Priority=DMA_PRIORITY_LOW
@@ -49,7 +49,7 @@ Dma.USART3_RX.4.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART3_RX.4.Instance=DMA1_Channel3 Dma.USART3_RX.4.Instance=DMA1_Channel3
Dma.USART3_RX.4.MemDataAlignment=DMA_MDATAALIGN_BYTE Dma.USART3_RX.4.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART3_RX.4.MemInc=DMA_MINC_ENABLE Dma.USART3_RX.4.MemInc=DMA_MINC_ENABLE
Dma.USART3_RX.4.Mode=DMA_NORMAL Dma.USART3_RX.4.Mode=DMA_CIRCULAR
Dma.USART3_RX.4.PeriphDataAlignment=DMA_PDATAALIGN_BYTE Dma.USART3_RX.4.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART3_RX.4.PeriphInc=DMA_PINC_DISABLE Dma.USART3_RX.4.PeriphInc=DMA_PINC_DISABLE
Dma.USART3_RX.4.Priority=DMA_PRIORITY_LOW Dma.USART3_RX.4.Priority=DMA_PRIORITY_LOW
@@ -63,12 +63,27 @@ Dma.USART3_TX.5.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART3_TX.5.PeriphInc=DMA_PINC_DISABLE Dma.USART3_TX.5.PeriphInc=DMA_PINC_DISABLE
Dma.USART3_TX.5.Priority=DMA_PRIORITY_LOW Dma.USART3_TX.5.Priority=DMA_PRIORITY_LOW
Dma.USART3_TX.5.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority Dma.USART3_TX.5.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
FREERTOS.IPParameters=Tasks01 FREERTOS.FootprintOK=true
FREERTOS.Tasks01=defaultTask,24,128,StartDefaultTask,Default,NULL,Dynamic,NULL,NULL FREERTOS.IPParameters=Tasks01,configUSE_PREEMPTION,configTICK_RATE_HZ,configMINIMAL_STACK_SIZE,configTOTAL_HEAP_SIZE,configMAX_PRIORITIES,configUSE_IDLE_HOOK,configUSE_TICK_HOOK,configUSE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configUSE_RECURSIVE_MUTEXES,configCHECK_FOR_STACK_OVERFLOW,configUSE_MALLOC_FAILED_HOOK,configSUPPORT_STATIC_ALLOCATION,configSUPPORT_DYNAMIC_ALLOCATION
FREERTOS.Tasks01=defaultTask\,0\,128\,StartDefaultTask\,Default\,NULL
FREERTOS.configCHECK_FOR_STACK_OVERFLOW=2
FREERTOS.configMAX_PRIORITIES=7
FREERTOS.configMINIMAL_STACK_SIZE=128
FREERTOS.configSUPPORT_DYNAMIC_ALLOCATION=1
FREERTOS.configSUPPORT_STATIC_ALLOCATION=0
FREERTOS.configTICK_RATE_HZ=1000
FREERTOS.configTOTAL_HEAP_SIZE=10240
FREERTOS.configUSE_COUNTING_SEMAPHORES=1
FREERTOS.configUSE_IDLE_HOOK=0
FREERTOS.configUSE_MALLOC_FAILED_HOOK=1
FREERTOS.configUSE_MUTEXES=1
FREERTOS.configUSE_PREEMPTION=1
FREERTOS.configUSE_RECURSIVE_MUTEXES=1
FREERTOS.configUSE_TICK_HOOK=0
File.Version=6 File.Version=6
GPIO.groupedBy=Group By Peripherals GPIO.groupedBy=Group By Peripherals
KeepUserPlacement=false KeepUserPlacement=false
Mcu.CPN=STM32F103R8T6 Mcu.CPN=STM32F103RCT6
Mcu.Family=STM32F1 Mcu.Family=STM32F1
Mcu.IP0=DMA Mcu.IP0=DMA
Mcu.IP1=FREERTOS Mcu.IP1=FREERTOS
@@ -77,24 +92,15 @@ Mcu.IP3=NVIC
Mcu.IP4=RCC Mcu.IP4=RCC
Mcu.IP5=SPI1 Mcu.IP5=SPI1
Mcu.IP6=SYS Mcu.IP6=SYS
Mcu.IP7=USART1 Mcu.IP7=TIM4
Mcu.IP8=USART2 Mcu.IP8=USART1
Mcu.IP9=USART3 Mcu.IP9=USART2
Mcu.IPNb=10 Mcu.IP10=USART3
Mcu.Name=STM32F103R(8-B)Tx Mcu.IPNb=11
Mcu.Name=STM32F103R(C-D-E)Tx
Mcu.Package=LQFP64 Mcu.Package=LQFP64
Mcu.Pin0=PC13-TAMPER-RTC Mcu.Pin0=PC13-TAMPER-RTC
Mcu.Pin1=PD0-OSC_IN Mcu.Pin1=PD0-OSC_IN
Mcu.Pin10=PB1
Mcu.Pin11=PB10
Mcu.Pin12=PB11
Mcu.Pin13=PA9
Mcu.Pin14=PA10
Mcu.Pin15=PA13
Mcu.Pin16=PA14
Mcu.Pin17=VP_FREERTOS_VS_CMSIS_V2
Mcu.Pin18=VP_IWDG_VS_IWDG
Mcu.Pin19=VP_SYS_VS_Systick
Mcu.Pin2=PD1-OSC_OUT Mcu.Pin2=PD1-OSC_OUT
Mcu.Pin3=PA2 Mcu.Pin3=PA2
Mcu.Pin4=PA3 Mcu.Pin4=PA3
@@ -103,36 +109,46 @@ Mcu.Pin6=PA5
Mcu.Pin7=PA6 Mcu.Pin7=PA6
Mcu.Pin8=PA7 Mcu.Pin8=PA7
Mcu.Pin9=PB0 Mcu.Pin9=PB0
Mcu.PinsNb=20 Mcu.Pin10=PB1
Mcu.Pin11=PB10
Mcu.Pin12=PB11
Mcu.Pin13=PA9
Mcu.Pin14=PA10
Mcu.Pin15=PA13
Mcu.Pin16=PA14
Mcu.Pin17=VP_FREERTOS_VS_ENABLE
Mcu.Pin18=VP_IWDG_VS_IWDG
Mcu.Pin19=VP_SYS_VS_TIM4
Mcu.Pin20=VP_TIM4_VS_ClockSourceINT
Mcu.PinsNb=21
Mcu.ThirdPartyNb=0 Mcu.ThirdPartyNb=0
Mcu.UserConstants= Mcu.UserConstants=
Mcu.UserName=STM32F103R8Tx Mcu.UserName=STM32F103RCTx
MxCube.Version=6.16.1 MxCube.Version=6.16.1
MxDb.Version=DB.6.0.161 MxDb.Version=DB.6.0.161
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.DMA1_Channel2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.DMA1_Channel2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true
NVIC.DMA1_Channel3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.DMA1_Channel3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true
NVIC.DMA1_Channel4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.DMA1_Channel4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true
NVIC.DMA1_Channel5_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.DMA1_Channel5_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true
NVIC.DMA1_Channel6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.DMA1_Channel6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true
NVIC.DMA1_Channel7_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.DMA1_Channel7_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.EXTI0_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
NVIC.ForceEnableDMAVector=true NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:true\:false\:false\:false
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC.SPI1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true NVIC.SPI1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.SavedPendsvIrqHandlerGenerated=true NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:true\:false\:false
NVIC.SavedSvcallIrqHandlerGenerated=true NVIC.TIM4_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.SavedSystickIrqHandlerGenerated=true NVIC.USART1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:true\:false\:true\:false NVIC.USART2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true
NVIC.USART1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.USART3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
NVIC.USART2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.USART3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
PA10.Mode=Asynchronous PA10.Mode=Asynchronous
PA10.Signal=USART1_RX PA10.Signal=USART1_RX
PA13.Mode=Serial_Wire PA13.Mode=Serial_Wire
@@ -143,8 +159,8 @@ PA2.Mode=Asynchronous
PA2.Signal=USART2_TX PA2.Signal=USART2_TX
PA3.Mode=Asynchronous PA3.Mode=Asynchronous
PA3.Signal=USART2_RX PA3.Signal=USART2_RX
PA4.Mode=NSS_Signal_Hard_Output PA4.Locked=true
PA4.Signal=SPI1_NSS PA4.Signal=GPIO_Output
PA5.Mode=Full_Duplex_Master PA5.Mode=Full_Duplex_Master
PA5.Signal=SPI1_SCK PA5.Signal=SPI1_SCK
PA6.Mode=Full_Duplex_Master PA6.Mode=Full_Duplex_Master
@@ -165,8 +181,8 @@ PC13-TAMPER-RTC.Locked=true
PC13-TAMPER-RTC.Signal=GPIO_Output PC13-TAMPER-RTC.Signal=GPIO_Output
PCC.Checker=false PCC.Checker=false
PCC.Line=STM32F103 PCC.Line=STM32F103
PCC.MCU=STM32F103R(8-B)Tx PCC.MCU=STM32F103R(C-D-E)Tx
PCC.PartNumber=STM32F103R8Tx PCC.PartNumber=STM32F103RCTx
PCC.Series=STM32F1 PCC.Series=STM32F1
PCC.Temperature=25 PCC.Temperature=25
PCC.Vdd=3.3 PCC.Vdd=3.3
@@ -184,12 +200,12 @@ ProjectManager.CoupleFile=true
ProjectManager.CustomerFirmwarePackage= ProjectManager.CustomerFirmwarePackage=
ProjectManager.DefaultFWLocation=true ProjectManager.DefaultFWLocation=true
ProjectManager.DeletePrevious=true ProjectManager.DeletePrevious=true
ProjectManager.DeviceId=STM32F103R8Tx ProjectManager.DeviceId=STM32F103RCTx
ProjectManager.FirmwarePackage=STM32Cube FW_F1 V1.8.7 ProjectManager.FirmwarePackage=STM32Cube FW_F1 V1.8.7
ProjectManager.FreePins=false ProjectManager.FreePins=false
ProjectManager.FreePinsContext= ProjectManager.FreePinsContext=
ProjectManager.HalAssertFull=false ProjectManager.HalAssertFull=false
ProjectManager.HeapSize=0x1000 ProjectManager.HeapSize=0x200
ProjectManager.KeepUserCode=true ProjectManager.KeepUserCode=true
ProjectManager.LastFirmware=true ProjectManager.LastFirmware=true
ProjectManager.LibraryCopy=0 ProjectManager.LibraryCopy=0
@@ -207,7 +223,7 @@ ProjectManager.ToolChainLocation=
ProjectManager.UAScriptAfterPath= ProjectManager.UAScriptAfterPath=
ProjectManager.UAScriptBeforePath= ProjectManager.UAScriptBeforePath=
ProjectManager.UnderRoot=false ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_IWDG_Init-IWDG-false-HAL-true,5-MX_USART1_UART_Init-USART1-false-HAL-true,6-MX_USART2_UART_Init-USART2-false-HAL-true,7-MX_USART3_UART_Init-USART3-false-HAL-true,8-MX_SPI1_Init-SPI1-false-HAL-true ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_IWDG_Init-IWDG-false-HAL-true,5-MX_USART1_UART_Init-USART1-false-HAL-true,6-MX_USART2_UART_Init-USART2-false-HAL-true,7-MX_USART3_UART_Init-USART3-false-HAL-true,8-MX_SPI1_Init-SPI1-false-HAL-true,9-MX_FREERTOS_Init-FREERTOS-false-HAL-true,10-MX_TIM4_Init-TIM4-false-HAL-true
RCC.ADCFreqValue=36000000 RCC.ADCFreqValue=36000000
RCC.AHBFreq_Value=72000000 RCC.AHBFreq_Value=72000000
RCC.APB1CLKDivider=RCC_HCLK_DIV2 RCC.APB1CLKDivider=RCC_HCLK_DIV2
@@ -235,24 +251,30 @@ RCC.USBFreq_Value=72000000
RCC.VCOOutput2Freq_Value=8000000 RCC.VCOOutput2Freq_Value=8000000
SH.GPXTI0.0=GPIO_EXTI0 SH.GPXTI0.0=GPIO_EXTI0
SH.GPXTI0.ConfNb=1 SH.GPXTI0.ConfNb=1
SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_4 SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_8
SPI1.CalculateBaudRate=18.0 MBits/s SPI1.CLKPhase=SPI_PHASE_2EDGE
SPI1.CLKPolarity=SPI_POLARITY_HIGH
SPI1.CalculateBaudRate=9.0 MBits/s
SPI1.Direction=SPI_DIRECTION_2LINES SPI1.Direction=SPI_DIRECTION_2LINES
SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,BaudRatePrescaler,VirtualNSS SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,BaudRatePrescaler,VirtualNSS,CLKPolarity,CLKPhase
SPI1.Mode=SPI_MODE_MASTER SPI1.Mode=SPI_MODE_MASTER
SPI1.VirtualNSS=VM_NSSHARD SPI1.VirtualNSS=VM_NSSSOFT
SPI1.VirtualType=VM_MASTER SPI1.VirtualType=VM_MASTER
TIM4.IPParameters=Prescaler,Period
TIM4.Period=999
TIM4.Prescaler=71
USART1.IPParameters=VirtualMode USART1.IPParameters=VirtualMode
USART1.VirtualMode=VM_ASYNC USART1.VirtualMode=VM_ASYNC
USART2.IPParameters=VirtualMode USART2.IPParameters=VirtualMode
USART2.VirtualMode=VM_ASYNC USART2.VirtualMode=VM_ASYNC
USART3.IPParameters=VirtualMode USART3.IPParameters=VirtualMode
USART3.VirtualMode=VM_ASYNC USART3.VirtualMode=VM_ASYNC
VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2 VP_FREERTOS_VS_ENABLE.Mode=Enabled
VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2 VP_FREERTOS_VS_ENABLE.Signal=FREERTOS_VS_ENABLE
VP_IWDG_VS_IWDG.Mode=IWDG_Activate VP_IWDG_VS_IWDG.Mode=IWDG_Activate
VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG
VP_SYS_VS_Systick.Mode=SysTick VP_SYS_VS_TIM4.Mode=TIM4
VP_SYS_VS_Systick.Signal=SYS_VS_Systick VP_SYS_VS_TIM4.Signal=SYS_VS_TIM4
VP_TIM4_VS_ClockSourceINT.Mode=Internal
VP_TIM4_VS_ClockSourceINT.Signal=TIM4_VS_ClockSourceINT
board=custom board=custom
rtos.0.ip=FREERTOS
+267
View File
@@ -0,0 +1,267 @@
# TCP2UART 调试指导
## 1. 适用范围
本指导面向当前 `TCP2UART` 工程,覆盖以下四类调试场景:
1. `STM32F103RCT6 + CH390D` 的基础 bring-up
2. `SEGGER RTT`、异常陷阱与 FreeRTOS 任务运行状态确认
3. `USART1` 配置口、`USART2/USART3` 数据口与 `MUX / NET / LINK[idx]` 协议联调
4. `TCP Server / TCP Client / UART` 三层数据通路联调与问题隔离
本指导默认基线如下:
1. 当前工程采用 `FreeRTOS` 任务调度架构
2. `CH390` 运行时访问由 `xSpiMutex` 保护,`NetworkTask` 持有主要访问权
3. 调试输出统一使用 `SEGGER RTT`
4. 当前应用层协议模型已经收敛到 `MUX / NET / LINK[idx]`
5. 当前代码应以 `MDK-ARM` 工程构建结果为准
---
## 2. 当前工程边界与真实状态
在进入现场调试前,先统一以下工程边界:
1. 当前项目的主要软件路径已经切换为:
- `NET`:网络基础参数
- `LINK[idx]`:链路配置记录
- `MUX`:数据口承载模式
2. 对外 AT 配置面应只围绕以下命令展开:
- `AT` / `AT+?` / `AT+QUERY`
- `AT+MUX` / `AT+NET` / `AT+LINK`
- `AT+SAVE` / `AT+RESET` / `AT+DEFAULT`
3. 已有结论表明:
- MCU 启动、RTT、FreeRTOS 调度、TIM4 心跳路径可工作
- `CH390D` 基础寄存器读写与 `lwIP netif` 基本链路已经打通过一次
- 真实硬件侧曾定位到 `CH390D` 供电滤波电容虚焊问题
4. 当前调试重点是:
- FreeRTOS 任务是否正常创建与调度
- `MUX / NET / LINK[idx]` 协议是否与代码一致
- UART / TCP / CH390 三层通路是否协同稳定
- 参数保存、复位和恢复流程是否可靠
---
## 3. 代码入口与调试责任边界
### 3.1 启动与 FreeRTOS 入口
以下代码路径是 bring-up 的第一现场:
1. `Core/Src/main.c`
- `main()`:总启动入口
- `SystemClock_Config()`:时钟初始化
- `MX_FREERTOS_Init()`FreeRTOS 任务创建(在 `freertos.c` 中实现)
2. `Core/Src/freertos.c`
- `StartDefaultTask()`:默认任务(LED 心跳 + 看门狗)
- `MX_FREERTOS_Init()`:用户任务创建入口
3. `Core/Src/stm32f1xx_it.c`
- 故障与中断入口
- `TIM4_IRQHandler`HAL 时间基准
- `USART1/2/3``EXTI0`、DMA 回调等联调关键入口
### 3.2 CH390 责任边界
当前 CH390 调试必须遵守以下责任边界:
1. `Drivers/CH390/CH390_Interface.c`GPIO / SPI / 寄存器与内存事务
2. `Drivers/CH390/CH390.c`:芯片级 helper
3. `Drivers/CH390/ch390_runtime.c`:唯一的运行时拥有者
4. `Drivers/LwIP/src/netif/ethernetif.c`netif glue 与轮询桥接
5. SPI 访问由 `xSpiMutex` 保护,避免多任务竞争
### 3.3 配置口与业务口边界
1. `USART1`AT 配置口,接收 `AT` 命令
2. `USART2 / USART3`:数据口,普通透传或 MUX 承载
---
## 4. 当前硬件与调试工具基线
### 4.1 核心硬件对象
1. MCU`STM32F103RCT6`256KB Flash / 48KB SRAM
2. 以太网芯片:`CH390D`
3. 配置串口:`USART1`
4. 数据串口:`USART2 / USART3`
5. 调试输出:`SEGGER RTT`
### 4.2 构建与下载基线
1. `MDK-ARM/TCP2UART.uvprojx`
2. 启动文件:`startup_stm32f103xe.s`
3. 目标器件:`STM32F103RC`
4. 预处理器宏:`USE_HAL_DRIVER, STM32F103xE`
### 4.3 常用调试工具
1. `Keil MDK-ARM`
2. `ST-Link / J-Link`
3. `SEGGER RTT Viewer`
4. `PowerShell`
5. `tools/start_tcp_debug_server.ps1`
6. `tools/tcp_debug_server.py`
---
## 5. FreeRTOS 专项调试
### 5.1 任务状态检查
使用 `vTaskList` 获取所有任务运行状态:
```c
char buf[512];
vTaskList(buf);
SEGGER_RTT_WriteString(0, buf);
```
输出格式:
```text
任务名 状态 优先级 剩余栈 编号
NetworkTask R 4 120 1
UartTask B 4 200 2
ConfigTask B 3 150 3
RouteTask R 3 180 4
DefaultTask B 1 80 5
IDLE R 0 100 6
Tmr Svc B 2 90 7
```
状态码:`R`=Ready, `B`=Blocked, `S`=Suspended, `D`=Deleted, `I`=Invalid
### 5.2 栈溢出检测
已启用 `configCHECK_FOR_STACK_OVERFLOW = 2`,溢出时自动调用:
```c
void vApplicationStackOverflowHook(TaskHandle_t xTask, char *pcTaskName)
{
SEGGER_RTT_printf(0, "STACK OVERFLOW: %s\n", pcTaskName);
__BKPT(0);
}
```
### 5.3 堆内存失败检测
已启用 `configUSE_MALLOC_FAILED_HOOK`,分配失败时自动调用:
```c
void vApplicationMallocFailedHook(void)
{
SEGGER_RTT_printf(0, "MALLOC FAILED: Free heap = %u\n", xPortGetFreeHeapSize());
__BKPT(0);
}
```
### 5.4 常见 FreeRTOS 调试陷阱
1. **优先级反转**:使用 Mutex(含优先级继承)而非 Binary Semaphore 保护共享资源
2. **死锁**:多 Mutex 场景确保所有任务按相同顺序获取
3. **中断优先级**FreeRTOS 可管理的 ISR 优先级必须 >= `configMAX_SYSCALL_INTERRUPT_PRIORITY`(本工程 5
4. **栈不足**:每个任务定期调用 `uxTaskGetStackHighWaterMark(NULL)` 检查剩余栈
5. **禁止在中断中调用阻塞 API**:必须使用 `FromISR` 后缀版本
---
## 6. 启动阶段调试顺序
建议按 P0 ~ P5 顺序推进,不要跳层。
### 6.1 P0:确认最小基础条件
1. `MDK-ARM` 可构建并产出新的 `axf/hex/map`
2. 板卡可正常下载与复位
3. RTT 可连接并看到启动输出
4. FreeRTOS 任务创建成功,`DefaultTask` LED 心跳可工作
5. `TIM4` 1ms tick 正常运行
### 6.2 P1:确认 FreeRTOS 调度正常
上电或复位后,优先确认:
1. `StartDefaultTask` 是否进入运行
2. `vTaskList` 输出是否显示所有预期任务
3. `xPortGetFreeHeapSize()` 返回值是否合理
4.`STACK OVERFLOW``MALLOC FAILED` 输出
### 6.3 P2:确认 CH390 初始化链路
启动阶段应重点关注 `NetworkTask` 中初始化日志:
1. `ETH init: gpio`
2. `ETH init: spi`
3. `ETH init: reset`
4. `ETH init: probe`
5. `ETH init: default`
6. `ETH init: mac`
7. `ETH init: done`
### 6.4 P3:确认 TCP 链路
1. lwIP `tcpip_thread` 是否正常运行
2. TCP Server 是否在指定端口监听
3. TCP Client 是否成功连接远端
---
## 7. MUX / NET / LINK[idx] 联调指导
### 7.1 协议总则
与裸机版本完全一致,参见 `AT固件使用手册.md`
### 7.2 推荐最小 MUX 联调顺序
1. 先在 `MUX=0` 下跑通原始透传
2. 再切换 `MUX=1`
3. 先发一个控制帧,确认 `DSTMASK=0x00` 路径可通
4. 再发一个单目标数据帧
5. 最后验证多目标位图转发
---
## 8. 异常、卡死与假死排查
### 8.1 看到 `TRAP:` 时怎么做
1. 先记录 RTT 中的 trap 标签
2. 立刻用调试器查看当前 PC / LR / 调用栈
3. 结合 `Core/Src/stm32f1xx_it.c` 中对应 handler 定位异常类型
### 8.2 FreeRTOS 任务卡死时怎么做
1. 使用 `vTaskList` 检查各任务状态
2. 如果某个任务始终 `B`(Blocked),检查其等待的队列/信号量
3. 检查是否有 Mutex 被持有但从未释放
4. 使用调试器暂停,查看各任务的调用栈
### 8.3 常见 FreeRTOS 陷阱
1. 在 ISR 中误调用阻塞 API(如 `xQueueSend` 而非 `xQueueSendFromISR`
2. 中断优先级低于 `configMAX_SYSCALL_INTERRUPT_PRIORITY` 但调用了 FreeRTOS API
3. Mutex 持有期间任务被删除导致 Mutex 永不释放
4. 栈溢出导致邻近变量被破坏
---
## 9. 常见误区
1. 不要继续沿用"CH390 恒为全 `0xFF`"过时结论
2. 不要在多个任务中直接访问 CH390 SPI(必须通过 Mutex 保护)
3. 不要在没有芯片脚侧证据前,只凭 GPIO 判断总线正常
4. 不要在基础寄存器读写尚不可信时,直接调高层业务
5. 不要在 ISR 中执行复杂 SPI 事务或调用阻塞 API
6. 不要忽视 `configCHECK_FOR_STACK_OVERFLOW` 报告
---
## 10. 推荐配套阅读
1. `AT固件使用手册.md`
2. `项目技术实现.md`
3. `项目需求说明.md`
4. `Keil工程配置说明.txt`
+430 -914
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+164 -38
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@@ -1,59 +1,185 @@
# TCP2UART 项目需求说明 # TCP2UART 项目需求说明
## 一、项目概述 ## 一、项目目标
基于 STM32F103 单片机和 FreeRTOS 开发一款具有双网口通信功能的 TCP 串口透传设备,实现网络数据与串口数据之间的双向透明传输 本项目基于 `STM32F103RCT6``CH390D` 实现一台多实例 TCP 与双串口数据透传设备
## 二、硬件平台 最终对外协议模型固定为:
| 项目 | 说明 | 1. `MUX`:控制串口侧是否采用 MUX 承载
2. `NET`:全局静态网络配置
3. `LINK[idx]`:按实例索引组织的链路配置
系统必须支持:
- `2` 路 TCP Server 实例
- `2` 路 TCP Client 实例
- `UART1` 作为 AT 配置口
- `UART2 / UART3` 作为业务数据口
## 二、硬件与软件边界
### 2.1 硬件边界
- 主控:`STM32F103RCT6`256KB Flash / 48KB SRAM
- 以太网芯片:`CH390D`
- 网卡数量:`1`
- 配置口:`UART1`
- 数据口:`UART2``UART3`
### 2.2 软件边界
- 执行模型:`FreeRTOS`
- 网络协议栈:`lwIP + NO_SYS=0`(支持 socket/netconn 线程安全 API
- 调试输出:`SEGGER RTT`
- 采用 `FreeRTOS` 任务调度
- 采用 `lwIP socket/netconn``RAW API` 实现多路 TCP 并发
- 不包含 DHCP 协议支持
## 三、最终协议需求
### 3.1 MUX 帧格式
所有 MUX 数据承载必须使用如下格式:
```text
SYNC | LEN_H | LEN_L | SRCID | DSTMASK | PAYLOAD | TAIL
```
要求:
- `DSTMASK != 0x00`:业务数据帧
- `DSTMASK = 0x00`:系统控制帧
- 系统控制帧承载 AT 文本命令
- AT 文本命令必须以 `\r\n` 结尾
### 3.2 统一端点编码
系统必须使用统一端点编码,同时覆盖 UART 与 TCP 逻辑实例:
| 端点 | 编码 |
|------|------| |------|------|
| 主控芯片 | STM32F103R8T6(后续大批量生产可用 GD32 替代) | | `C1` | `0x01` |
| 以太网芯片 | CH390D | | `C2` | `0x02` |
| PCB 设计工具 | 立创 EDA(避免 AD 版权纠纷) | | `UART2` | `0x04` |
| 串口通道 | 2 路 UART | | `UART3` | `0x08` |
| `S1` | `0x10` |
| `S2` | `0x20` |
## 三、软件平台 要求:
| 项目 | 说明 | - `SRCID` 为单值
|------|------| - `DSTMASK` 为位图
| 开发环境 | STM32CubeMX + HAL 库 | - `DSTMASK=0x00` 仅保留给系统控制帧
| 操作系统 | FreeRTOS |
| 协议栈 | 标准 TCP/IP 协议 |
## 四、核心功能需求 ## 四、AT 接口需求
### 4.1 双链路 TCP 通信 ### 4.1 命令分类
- **Server 链路**:设备作为 TCP Server,监听指定端口,等待外部客户端连接 AT 协议必须收敛为以下三类命令:
- **Client 链路**:设备作为 TCP Client,主动连接远程服务器
- 两条链路共享**同一个对外 IP 地址**
### 4.2 串口透传 1. `AT+MUX`
2. `AT+NET`
3. `AT+LINK`
- **Server 链路数据** <==> **UART2** 双向透传 不再保留历史展开式实例字段命令。
- **Client 链路数据** <==> **UART3** 双向透传
- 仅透传 TCP 数据区(Payload),无需解析串口协议
### 4.3 参数配置 ### 4.2 MUX 命令需求
- 支持通过 **UART1** 串口命令修改设备 IP 地址等网络参数 - `AT+MUX=0/1`:设置全局 MUX 模式
- 配置参数需掉电保存 - `AT+MUX?`:查询当前 MUX 模式
### 4.4 数据可靠性 ### 4.3 NET 命令需求
- 确保 TCP 数据与串口数据双向传输不丢包 `NET` 必须统一表达以下静态网络参数:
- 提供丢包率测试方案及测试数据
## 五、交付物 ```text
IP,MASK,GW,MAC
```
1. 原理图及 PCB 设计文件(立创 EDA 格式) 说明:
2. STM32 固件源码(CubeMX 工程 + HAL 库 + FreeRTOS
3. 丢包测试方案及测试工具/数据
4. 使用说明文档
## 六、约束条件 - 设备只有一张网卡,因此本地 IP 不按实例拆分
- DHCP 不属于协议需求范围
- 通信协议:标准 TCP/IP ### 4.4 LINK 命令需求
- 串口透传:纯数据透传,不解析上层协议
- 硬件尺寸及供电参数由甲方提供 `LINK[idx]` 必须统一表达如下字段:
```text
EN,LPORT,RIP,RPORT,UART
```
要求:
- `idx` 固定映射四个实例:`0=S1``1=S2``2=C1``3=C2`
- `Server``Client` 共用同一条 `LINK` 配置模型
- `LPORT` 必须可配置
- `RIP / RPORT` 必须可配置
- `UART` 必须可配置
## 五、功能需求
### 5.1 TCP 功能
- 支持 `2` 路 Server
- 支持 `2` 路 Client
- 每个实例通过 `LINK[idx]` 配置其本地端口、对端地址、对端端口和串口路由
### 5.2 串口透传功能
- `UART2 / UART3` 支持普通透传模式与 MUX 透传模式
- 当需要多实例共享数据口时,必须启用 MUX 模式
- 业务数据流向由 `SRCID / DSTMASK` 决定
### 5.3 系统控制功能
- 系统控制帧由 `DSTMASK=0x00` 表示
- 系统控制帧进入 AT 解析路径
- 控制文本必须以 `\r\n` 结束
### 5.4 参数保存功能
- 参数修改后支持 `SAVE`
- 支持 `RESET` 后按保存配置启动
- 支持恢复默认配置
## 六、FreeRTOS 任务架构需求
### 6.1 任务划分
系统至少应包含以下 FreeRTOS 任务:
| 任务 | 优先级 | 职责 |
|------|--------|------|
| NetworkTask | 高 | CH390 事件轮询 + lwIP tcpip 处理 |
| UartTask | 高 | UART DMA/IDLE 接收 + MUX 帧处理 |
| ConfigTask | 中 | AT 命令解析与响应 |
| RouteTask | 中 | SRCID/DSTMASK 数据路由 |
| DefaultTask | 低 | LED 心跳 + 看门狗 |
### 6.2 任务间通信
- 使用 `Queue` 传递 UART 接收数据帧
- 使用 `Semaphore` 同步 CH390 中断事件
- 使用 `Mutex` 保护 SPI/CH390 共享访问
- 使用 `StreamBuffer` 传递 TCP 数据到 UART 方向
## 七、非功能需求
1. 满足 `STM32F103RCT6``256KB Flash / 48KB SRAM` 约束
2. 工程可在 `MDK-ARM` 下构建
3. 调试输出统一使用 `SEGGER RTT`
4. 不引入 DHCP、DNS、UDP 等当前非目标协议
5. FreeRTOS 堆使用 `heap_4.c`,总堆大小建议 `10KB`
6. 所有任务栈通过 `uxTaskGetStackHighWaterMark` 监控
## 八、验收口径
验收时以下几点必须同时成立:
1. 文档只使用 `MUX / NET / LINK` 作为最终协议模型
2. 文档不再出现历史 `S1... / C1...` 外部字段
3. 串口控制文本统一规定为 `\r\n` 结束
4. MUX 帧格式与端点编码在需求、手册、技术实现三份文档中表述一致
5. FreeRTOS 任务无死锁、无栈溢出、无优先级反转