refactor: 清理UART调试代码并保留RTT诊断

.debug/uart-ch390-debug-handoff.md

@@ -0,0 +1,174 @@
+# TCP2UART Debug Handoff
+
+## Scope
+
+This log records the debugging work completed so far for:
+
+- UART1 config/debug path on `COM9`
+- UART2/UART3 transparent UART paths on `COM8`/`COM7`
+- CH390 and lwIP bring-up status
+
+The goal is to preserve the usable conclusions and avoid repeating invalid test paths after context cleanup.
+
+## Final State Summary
+
+### Confirmed working
+
+- HSE clock path is working on the current board/chip/crystal combination.
+- ST-Link + RTT debugging works.
+- Firmware boots and RTT shows stable startup output.
+- UART2 and UART3 TX paths were validated earlier by host-side observation:
+  - `COM8` receives UART2 debug output.
+  - `COM7` receives UART3 debug output.
+- UART1 config path is working in the current cleaned firmware when the host sends commands with a line ending that the parser actually consumes.
+- `AT+?` over UART1 was successfully validated when sent with `\n`.
+
+### Confirmed not yet working
+
+- CH390 is still not operating normally.
+- Current one-shot RTT report still shows abnormal values:
+  - `CH390 VID=0x3A3A PID=0xCCCC REV=0x00 NSR=0x00 LINK=0`
+- Therefore lwIP / Ethernet / TCP end-to-end validation remains blocked by CH390 low-level failure.
+
+## Most Important Lessons Learned
+
+### 1. UART1 config failures were partly test-method failures
+
+Several earlier negative conclusions about UART1 config were caused by the debug method rather than firmware defects.
+
+Examples:
+
+- Sending `AT+?` without the line ending expected by the current parser caused false negatives.
+- Frequent open/close cycles on the serial port changed timing and control-line behavior.
+- Breakpoints in RX callback / parser code prevented reply transmission and created false "no response" results.
+- Heavy RTT logging inside hot UART paths distorted timing and even corrupted RTT control state once.
+
+### 2. UART1 parser expects terminators
+
+`config_uart_rx_byte()` only dispatches a command when it sees `\r` or `\n`.
+
+Successful command form that was confirmed:
+
+```text
+AT+?\n
+```
+
+Do not assume `AT+?` without line ending is valid for this firmware.
+
+### 3. Cleaned firmware state is preferable for future work
+
+Temporary UART diagnostics were removed again after debugging:
+
+- removed boot markers like `BOOT_UARTx_OK`
+- removed periodic UART spam
+- removed UART1 byte echo
+- removed temporary `config_diag` counters
+
+Useful RTT remains:
+
+- `TCP2UART boot`
+- HSE fallback warning if used
+- CH390 one-shot status report
+
+## Relevant Code Changes Left In Place
+
+These are intentional and should remain unless there is a specific reason to change them.
+
+### UART1 config path
+
+- `App/config.c`
+  - config handle is back on `huart1`
+  - `config_uart_rx_byte()` assembles frames from UART1 bytes
+  - `config_poll()` dispatches a pending complete frame to `config_try_process_frame()`
+  - `config_try_process_frame()` calls `config_process_at_cmd()` and transmits the response on UART1
+
+- `Core/Src/stm32f1xx_it.c`
+  - `HAL_UART_RxCpltCallback()` for `huart1` feeds the received byte into `config_uart_rx_byte()` and rearms `HAL_UART_Receive_IT()`
+
+### RTT boot diagnostics
+
+- `Core/Src/main.c`
+  - retains RTT boot banner
+  - retains one-shot CH390 report
+  - no temporary UART spam remains
+
+## Current Firmware Behavior Worth Remembering
+
+### UART1
+
+- UART1 is used for config/debug interaction.
+- UART1 parser is line-oriented.
+- Use a terminal that sends `LF` or `CRLF` explicitly.
+
+### UART2 / UART3
+
+- UART2 and UART3 are for bridge channels, not the config path.
+- Earlier mapping observed during testing:
+  - `COM8` aligned with UART2 TX activity
+  - `COM7` aligned with UART3 TX activity
+
+### CH390
+
+- Still unresolved at the low level.
+- Do not spend time on lwIP / TCP behavior until CH390 register reads look sane.
+
+## Recommended Next Debug Order
+
+### Priority 1: Preserve UART1 config as known-good
+
+Before touching UART1 code again:
+
+1. Open `COM9` at `115200 8N1`
+2. Send:
+
+```text
+AT+?\n
+```
+
+3. Confirm a full config dump is returned.
+
+If this fails again, check the terminal's actual line ending first before changing code.
+
+### Priority 2: Re-verify UART2/UART3 only if needed
+
+If bridge debugging resumes, first confirm the host can actually open `COM7` and `COM8`.
+Host-side availability was inconsistent during the previous session and caused false negatives.
+
+### Priority 3: Resume CH390 low-level debugging
+
+This is the real remaining blocker.
+
+Suggested next steps:
+
+1. Focus on SPI-level sanity before lwIP.
+2. Re-check CH390 reset / CS / SPI timing and electrical path.
+3. Verify whether SPI mode is correct for the actual hardware.
+4. Confirm register reads from CH390 return plausible values before attempting link/TCP tests.
+
+## What Not To Repeat
+
+- Do not judge UART1 config by sending commands without a terminator.
+- Do not leave breakpoints inside UART RX callback or parser while expecting normal replies.
+- Do not flood RTT inside hot UART receive paths.
+- Do not conclude lwIP is broken before CH390 identity reads are sane.
+- Do not trust `Win32_SerialPort` alone for COM availability; sometimes `mode COMx` / `Get-PnpDevice -Class Ports` gives a different picture.
+
+## Known Useful Commands
+
+### UART1 config test
+
+```text
+AT+?\n
+```
+
+### Optional follow-ups
+
+```text
+AT+BAUD1=115200\n
+AT+SAVE\n
+AT+RESET\n
+```
+
+## One-Line Handoff
+
+UART1 config is working when tested correctly with a terminator; CH390 is still the unresolved core issue and should be the next serious debug target.

.gitignore

@@ -7,6 +7,7 @@
 *.map
 *.lst
 *.out
+*.log
 
 # IDE
 .vscode/
@@ -34,3 +35,6 @@ Desktop.ini
 
 # 项目文档
 项目计划.md
+
+# Local debug handoff logs
+.debug/

App/config.c

@@ -1,113 +1,65 @@
 /**
  * @file config.c
- * @brief AT command configuration module implementation
+ * @brief Bare-metal AT command configuration module implementation.
  */
 
 #include "config.h"
+
 #include "flash_param.h"
 #include "usart.h"
 
-#include "FreeRTOS.h"
-#include "task.h"
-
-#include <string.h>
+#include <stddef.h>
 #include <stdio.h>
 #include <stdlib.h>
-#include <stddef.h>
+#include <string.h>
 
-/*---------------------------------------------------------------------------
- * Private Definitions
- *---------------------------------------------------------------------------*/
+#include "SEGGER_RTT.h"
 
-#define CONFIG_RX_BUFFER_SIZE   128
-#define CONFIG_TX_BUFFER_SIZE   256
-#define CONFIG_CMD_MAX_LEN      128
+#define CONFIG_TX_BUFFER_SIZE   256u
+#define CONFIG_CMD_MAX_LEN      128u
 
-/* AT command prefixes */
-#define AT_PREFIX               "AT+"
-#define AT_QUERY                "AT+?"
+#define CONFIG_UART_HANDLE      huart1
 
-/*---------------------------------------------------------------------------
- * Private Variables
- *---------------------------------------------------------------------------*/
-
-/* Current device configuration */
 static device_config_t g_config;
+static volatile bool g_reset_requested;
+static char g_uart_cmd_buffer[CONFIG_CMD_MAX_LEN];
+static uint16_t g_uart_cmd_len;
+static char g_pending_cmd_buffer[CONFIG_CMD_MAX_LEN];
+static volatile uint16_t g_pending_cmd_len;
+static volatile bool g_pending_cmd_ready;
 
 static uint32_t config_calc_crc(const device_config_t *cfg)
 {
     return flash_param_crc32(cfg, offsetof(device_config_t, crc));
 }
 
-/* UART1 reception buffer */
-static uint8_t g_rx_buffer[CONFIG_RX_BUFFER_SIZE];
-static volatile uint16_t g_rx_index = 0;
-static volatile bool g_rx_complete = false;
-static volatile bool g_reset_requested = false;
-
-/*---------------------------------------------------------------------------
- * Private Functions - String Utilities
- *---------------------------------------------------------------------------*/
-
-/**
- * @brief Skip whitespace in string
- */
 static const char *skip_whitespace(const char *str)
 {
-    while (*str == ' ' || *str == '\t')
-    {
-        str++;
+    while (*str == ' ' || *str == '\t') {
+        ++str;
     }
     return str;
 }
 
-/**
- * @brief Trim trailing whitespace and newlines
- */
 static void trim_trailing(char *str)
 {
-    int len = strlen(str);
-    while (len > 0 && (str[len-1] == ' ' || str[len-1] == '\t' || 
-                       str[len-1] == '\r' || str[len-1] == '\n'))
-    {
+    int len = (int)strlen(str);
+
+    while (len > 0 && (str[len - 1] == ' ' || str[len - 1] == '\t' || str[len - 1] == '\r' || str[len - 1] == '\n')) {
         str[--len] = '\0';
     }
 }
 
-/**
- * @brief Compare string prefix (case-insensitive)
- */
-static bool starts_with(const char *str, const char *prefix)
-{
-    while (*prefix)
-    {
-        char c1 = *str++;
-        char c2 = *prefix++;
-        
-        /* Convert to uppercase for comparison */
-        if (c1 >= 'a' && c1 <= 'z') c1 -= 32;
-        if (c2 >= 'a' && c2 <= 'z') c2 -= 32;
-        
-        if (c1 != c2)
-        {
-            return false;
-        }
-    }
-    return true;
-}
-
 static bool equals_ignore_case(const char *a, const char *b)
 {
-    while (*a != '\0' && *b != '\0')
-    {
+    while (*a != '\0' && *b != '\0') {
         char c1 = *a++;
         char c2 = *b++;
 
         if (c1 >= 'a' && c1 <= 'z') c1 -= 32;
         if (c2 >= 'a' && c2 <= 'z') c2 -= 32;
 
-        if (c1 != c2)
-        {
+        if (c1 != c2) {
             return false;
         }
     }
@@ -115,237 +67,35 @@ static bool equals_ignore_case(const char *a, const char *b)
     return (*a == '\0' && *b == '\0');
 }
 
-/*---------------------------------------------------------------------------
- * Private Functions - AT Command Handlers
- *---------------------------------------------------------------------------*/
-
-/**
- * @brief Handle AT+IP command
- */
-static at_result_t handle_ip(const char *value, char *response, uint16_t max_len)
+static int parse_baudrate_value(const char *value, uint32_t *baudrate)
 {
-    uint8_t ip[4];
+    char *endptr;
+    unsigned long parsed;
 
-    if (config_str_to_ip(value, ip) != 0)
-    {
-        snprintf(response, max_len, "ERROR: Invalid IP format\r\n");
-        return AT_INVALID_PARAM;
+    if (value == NULL || baudrate == NULL) {
+        return -1;
     }
 
-    memcpy(g_config.ip, ip, 4);
-    snprintf(response, max_len, "OK\r\n");
-    return AT_NEED_REBOOT;
+    parsed = strtoul(value, &endptr, 10);
+    if (endptr == value || *skip_whitespace(endptr) != '\0') {
+        return -1;
     }
 
-/**
- * @brief Handle AT+MASK command
- */
-static at_result_t handle_mask(const char *value, char *response, uint16_t max_len)
-{
-    uint8_t mask[4];
-    
-    if (config_str_to_ip(value, mask) != 0)
-    {
-        snprintf(response, max_len, "ERROR: Invalid mask format\r\n");
-        return AT_INVALID_PARAM;
+    if (parsed < 1200ul || parsed > 921600ul) {
+        return -1;
     }
 
-    memcpy(g_config.mask, mask, 4);
-    snprintf(response, max_len, "OK\r\n");
-    return AT_NEED_REBOOT;
+    *baudrate = (uint32_t)parsed;
+    return 0;
 }
 
-/**
- * @brief Handle AT+GW command
- */
-static at_result_t handle_gw(const char *value, char *response, uint16_t max_len)
-{
-    uint8_t gw[4];
-    
-    if (config_str_to_ip(value, gw) != 0)
-    {
-        snprintf(response, max_len, "ERROR: Invalid gateway format\r\n");
-        return AT_INVALID_PARAM;
-    }
-    
-    memcpy(g_config.gw, gw, 4);
-    snprintf(response, max_len, "OK\r\n");
-    return AT_NEED_REBOOT;
-}
-
-/**
- * @brief Handle AT+PORT command
- */
-static at_result_t handle_port(const char *value, char *response, uint16_t max_len)
-{
-    int port = atoi(value);
-    
-    if (port < 1 || port > 65535)
-    {
-        snprintf(response, max_len, "ERROR: Invalid port (1-65535)\r\n");
-        return AT_INVALID_PARAM;
-    }
-    
-    g_config.server_port = (uint16_t)port;
-    snprintf(response, max_len, "OK\r\n");
-    return AT_NEED_REBOOT;
-}
-
-/**
- * @brief Handle AT+RIP command
- */
-static at_result_t handle_rip(const char *value, char *response, uint16_t max_len)
-{
-    uint8_t ip[4];
-    
-    if (config_str_to_ip(value, ip) != 0)
-    {
-        snprintf(response, max_len, "ERROR: Invalid remote IP format\r\n");
-        return AT_INVALID_PARAM;
-    }
-    
-    memcpy(g_config.remote_ip, ip, 4);
-    snprintf(response, max_len, "OK\r\n");
-    return AT_NEED_REBOOT;
-}
-
-/**
- * @brief Handle AT+RPORT command
- */
-static at_result_t handle_rport(const char *value, char *response, uint16_t max_len)
-{
-    int port = atoi(value);
-    
-    if (port < 1 || port > 65535)
-    {
-        snprintf(response, max_len, "ERROR: Invalid port (1-65535)\r\n");
-        return AT_INVALID_PARAM;
-    }
-    
-    g_config.remote_port = (uint16_t)port;
-    snprintf(response, max_len, "OK\r\n");
-    return AT_NEED_REBOOT;
-}
-
-/**
- * @brief Handle AT+BAUD1 command (UART2)
- */
-static at_result_t handle_baud1(const char *value, char *response, uint16_t max_len)
-{
-    int baud = atoi(value);
-    
-    /* Validate common baud rates */
-    if (baud != 9600 && baud != 19200 && baud != 38400 && 
-        baud != 57600 && baud != 115200 && baud != 230400 &&
-        baud != 460800 && baud != 921600)
-    {
-        snprintf(response, max_len, "ERROR: Invalid baud rate\r\n");
-        return AT_INVALID_PARAM;
-    }
-    
-    g_config.uart2_baudrate = (uint32_t)baud;
-    snprintf(response, max_len, "OK\r\n");
-    return AT_NEED_REBOOT;
-}
-
-/**
- * @brief Handle AT+BAUD2 command (UART3)
- */
-static at_result_t handle_baud2(const char *value, char *response, uint16_t max_len)
-{
-    int baud = atoi(value);
-    
-    /* Validate common baud rates */
-    if (baud != 9600 && baud != 19200 && baud != 38400 && 
-        baud != 57600 && baud != 115200 && baud != 230400 &&
-        baud != 460800 && baud != 921600)
-    {
-        snprintf(response, max_len, "ERROR: Invalid baud rate\r\n");
-        return AT_INVALID_PARAM;
-    }
-    
-    g_config.uart3_baudrate = (uint32_t)baud;
-    snprintf(response, max_len, "OK\r\n");
-    return AT_NEED_REBOOT;
-}
-
-/**
- * @brief Handle AT+MAC command
- */
-static at_result_t handle_mac(const char *value, char *response, uint16_t max_len)
-{
-    uint8_t mac[6];
-    
-    if (config_str_to_mac(value, mac) != 0)
-    {
-        snprintf(response, max_len, "ERROR: Invalid MAC format\r\n");
-        return AT_INVALID_PARAM;
-    }
-    
-    memcpy(g_config.mac, mac, 6);
-    snprintf(response, max_len, "OK\r\n");
-    return AT_NEED_REBOOT;
-}
-
-/**
- * @brief Handle AT+DHCP command
- */
-static at_result_t handle_dhcp(const char *value, char *response, uint16_t max_len)
-{
-    int dhcp = atoi(value);
-    
-    if (dhcp != 0 && dhcp != 1)
-    {
-        snprintf(response, max_len, "ERROR: Invalid value (0 or 1)\r\n");
-        return AT_INVALID_PARAM;
-    }
-    
-    g_config.dhcp_enable = (uint8_t)dhcp;
-    snprintf(response, max_len, "OK\r\n");
-    return AT_NEED_REBOOT;
-}
-
-/**
- * @brief Handle AT+SAVE command
- */
-static at_result_t handle_save(char *response, uint16_t max_len)
-{
-    if (config_save() != 0)
-    {
-        snprintf(response, max_len, "ERROR: Save failed\r\n");
-        return AT_SAVE_FAILED;
-    }
-    
-    snprintf(response, max_len, "OK: Configuration saved\r\n");
-    return AT_OK;
-}
-
-/**
- * @brief Handle AT+RESET command
- */
-static at_result_t handle_reset(char *response, uint16_t max_len)
-{
-    snprintf(response, max_len, "OK: Resetting...\r\n");
-    g_reset_requested = true;
-    return AT_OK;
-}
-
-/**
- * @brief Handle AT+DEFAULT command
- */
-static at_result_t handle_default(char *response, uint16_t max_len)
-{
-    config_set_defaults();
-    snprintf(response, max_len, "OK: Defaults restored. Use AT+SAVE to save.\r\n");
-    return AT_OK;
-}
-
-/**
- * @brief Handle AT+? query command
- */
 static at_result_t handle_query(char *response, uint16_t max_len)
 {
-    char ip_str[16], mask_str[16], gw_str[16], rip_str[16], mac_str[18];
+    char ip_str[16];
+    char mask_str[16];
+    char gw_str[16];
+    char rip_str[16];
+    char mac_str[18];
 
     config_ip_to_str(g_config.ip, ip_str);
     config_ip_to_str(g_config.mask, mask_str);
@@ -354,9 +104,8 @@ static at_result_t handle_query(char *response, uint16_t max_len)
     config_mac_to_str(g_config.mac, mac_str);
 
     snprintf(response, max_len,
-        "=== TCP2UART Configuration ===\r\n"
              "MAC: %s\r\n"
-        "DHCP:    %s\r\n"
+             "DHCP: %u\r\n"
              "IP: %s\r\n"
              "MASK: %s\r\n"
              "GW: %s\r\n"
@@ -364,10 +113,9 @@ static at_result_t handle_query(char *response, uint16_t max_len)
              "RIP: %s\r\n"
              "RPORT: %u\r\n"
              "BAUD1: %lu\r\n"
-        "BAUD2:   %lu\r\n"
-        "==============================\r\n",
+             "BAUD2: %lu\r\n",
              mac_str,
-        g_config.dhcp_enable ? "Enabled" : "Disabled",
+             g_config.dhcp_enable,
              ip_str,
              mask_str,
              gw_str,
@@ -375,40 +123,23 @@ static at_result_t handle_query(char *response, uint16_t max_len)
              rip_str,
              g_config.remote_port,
              g_config.uart2_baudrate,
-        g_config.uart3_baudrate
-    );
+             g_config.uart3_baudrate);
 
     return AT_OK;
 }
 
-/*---------------------------------------------------------------------------
- * Public Functions
- *---------------------------------------------------------------------------*/
-
-/**
- * @brief Initialize configuration module
- */
 int config_init(void)
 {
-    /* Load configuration from Flash */
+    flash_param_init();
     return config_load();
 }
 
-/**
- * @brief Load configuration from Flash
- */
 int config_load(void)
 {
-    int ret;
-    
-    ret = flash_param_read(&g_config, sizeof(device_config_t));
-    
-    if (ret != 0 ||
+    if (flash_param_read(&g_config, sizeof(g_config)) != 0 ||
         g_config.magic != CONFIG_MAGIC ||
         g_config.version != CONFIG_VERSION ||
-        g_config.crc != config_calc_crc(&g_config))
-    {
-        /* Invalid or corrupted configuration, use defaults */
+        g_config.crc != config_calc_crc(&g_config)) {
         config_set_defaults();
         return -1;
     }
@@ -416,47 +147,35 @@ int config_load(void)
     return 0;
 }
 
-/**
- * @brief Save configuration to Flash
- */
 int config_save(void)
 {
-    /* Update magic and CRC before saving */
     g_config.magic = CONFIG_MAGIC;
     g_config.version = CONFIG_VERSION;
     g_config.crc = config_calc_crc(&g_config);
-    
-    return flash_param_write(&g_config, sizeof(device_config_t));
+    return flash_param_write(&g_config, sizeof(g_config));
 }
 
-/**
- * @brief Reset configuration to factory defaults
- */
 void config_set_defaults(void)
 {
-    uint8_t default_ip[] = DEFAULT_IP;
-    uint8_t default_mask[] = DEFAULT_MASK;
-    uint8_t default_gw[] = DEFAULT_GW;
-    uint8_t default_mac[] = DEFAULT_MAC;
-    uint8_t default_rip[] = DEFAULT_REMOTE_IP;
-    
-    memset(&g_config, 0, sizeof(device_config_t));
+    const uint8_t default_ip[] = DEFAULT_IP;
+    const uint8_t default_mask[] = DEFAULT_MASK;
+    const uint8_t default_gw[] = DEFAULT_GW;
+    const uint8_t default_mac[] = DEFAULT_MAC;
+    const uint8_t default_rip[] = DEFAULT_REMOTE_IP;
 
+    memset(&g_config, 0, sizeof(g_config));
     g_config.magic = CONFIG_MAGIC;
     g_config.version = CONFIG_VERSION;
+    memcpy(g_config.mac, default_mac, sizeof(g_config.mac));
+    memcpy(g_config.ip, default_ip, sizeof(g_config.ip));
+    memcpy(g_config.mask, default_mask, sizeof(g_config.mask));
+    memcpy(g_config.gw, default_gw, sizeof(g_config.gw));
+    memcpy(g_config.remote_ip, default_rip, sizeof(g_config.remote_ip));
 
-    memcpy(g_config.mac, default_mac, 6);
     g_config.dhcp_enable = DEFAULT_DHCP_ENABLE;
-    memcpy(g_config.ip, default_ip, 4);
-    memcpy(g_config.mask, default_mask, 4);
-    memcpy(g_config.gw, default_gw, 4);
-    
     g_config.server_port = DEFAULT_SERVER_PORT;
-    
-    memcpy(g_config.remote_ip, default_rip, 4);
     g_config.remote_port = DEFAULT_REMOTE_PORT;
     g_config.reconnect_interval = DEFAULT_RECONNECT_MS;
-    
     g_config.uart2_baudrate = DEFAULT_UART_BAUDRATE;
     g_config.uart3_baudrate = DEFAULT_UART_BAUDRATE;
     g_config.uart2_databits = DEFAULT_UART_DATABITS;
@@ -468,161 +187,187 @@ void config_set_defaults(void)
     g_config.crc = config_calc_crc(&g_config);
 }
 
-/**
- * @brief Get current configuration (read-only)
- */
 const device_config_t *config_get(void)
 {
     return &g_config;
 }
 
-/**
- * @brief Get mutable configuration
- */
 device_config_t *config_get_mutable(void)
 {
     return &g_config;
 }
 
-/**
- * @brief Process AT command
- */
 at_result_t config_process_at_cmd(const char *cmd, char *response, uint16_t max_len)
 {
     char cmd_copy[CONFIG_CMD_MAX_LEN];
     char *cmd_name;
     char *value;
-    at_result_t result = AT_UNKNOWN_CMD;
+    const char *p;
 
-    if (cmd == NULL || response == NULL || max_len == 0)
-    {
+    if (cmd == NULL || response == NULL || max_len == 0u) {
         return AT_ERROR;
     }
 
-    /* Make a copy for modification */
-    strncpy(cmd_copy, cmd, CONFIG_CMD_MAX_LEN - 1);
-    cmd_copy[CONFIG_CMD_MAX_LEN - 1] = '\0';
+    strncpy(cmd_copy, cmd, CONFIG_CMD_MAX_LEN - 1u);
+    cmd_copy[CONFIG_CMD_MAX_LEN - 1u] = '\0';
     trim_trailing(cmd_copy);
+    p = skip_whitespace(cmd_copy);
 
-    /* Skip leading whitespace */
-    const char *p = skip_whitespace(cmd_copy);
-    
-    /* Check for AT+ prefix */
-    if (!starts_with(p, "AT+"))
-    {
-        if (equals_ignore_case(p, "AT"))
-        {
-            snprintf(response, max_len, "OK\r\n");
-            return AT_OK;
-        }
+    if ((p[0] != 'A' && p[0] != 'a') || (p[1] != 'T' && p[1] != 't')) {
         snprintf(response, max_len, "ERROR: Unknown command\r\n");
         return AT_UNKNOWN_CMD;
     }
 
-    /* Move past AT+ */
-    p += 3;
+    if (p[2] == '\0') {
+        snprintf(response, max_len, "OK\r\n");
+        return AT_OK;
+    }
 
-    /* Find '=' separator if present */
+    if (p[2] != '+') {
+        snprintf(response, max_len, "ERROR: Unknown command\r\n");
+        return AT_UNKNOWN_CMD;
+    }
+
+    p += 3;
     value = strchr((char *)p, '=');
-    if (value != NULL)
-    {
-        *value = '\0';  /* Terminate command part */
-        value++;        /* Point to value */
+    if (value != NULL) {
+        *value = '\0';
+        ++value;
         value = (char *)skip_whitespace(value);
     }
 
     cmd_name = (char *)p;
     trim_trailing(cmd_name);
 
-    /* Process commands */
-    if (equals_ignore_case(cmd_name, "IP") && value != NULL)
-    {
-        result = handle_ip(value, response, max_len);
+    if ((equals_ignore_case(cmd_name, "?") || equals_ignore_case(cmd_name, "QUERY")) && value == NULL) {
+        return handle_query(response, max_len);
     }
-    else if (equals_ignore_case(cmd_name, "MASK") && value != NULL)
-    {
-        result = handle_mask(value, response, max_len);
+    if (equals_ignore_case(cmd_name, "SAVE") && value == NULL) {
+        if (config_save() != 0) {
+            snprintf(response, max_len, "ERROR: Save failed\r\n");
+            return AT_SAVE_FAILED;
         }
-    else if (equals_ignore_case(cmd_name, "GW") && value != NULL)
-    {
-        result = handle_gw(value, response, max_len);
+        snprintf(response, max_len, "OK: Configuration saved\r\n");
+        return AT_OK;
     }
-    else if (equals_ignore_case(cmd_name, "PORT") && value != NULL)
-    {
-        result = handle_port(value, response, max_len);
+    if (equals_ignore_case(cmd_name, "RESET") && value == NULL) {
+        g_reset_requested = true;
+        snprintf(response, max_len, "OK: Resetting...\r\n");
+        return AT_OK;
     }
-    else if (equals_ignore_case(cmd_name, "RIP") && value != NULL)
-    {
-        result = handle_rip(value, response, max_len);
+    if (equals_ignore_case(cmd_name, "DEFAULT") && value == NULL) {
+        config_set_defaults();
+        snprintf(response, max_len, "OK: Defaults restored\r\n");
+        return AT_OK;
     }
-    else if (equals_ignore_case(cmd_name, "RPORT") && value != NULL)
-    {
-        result = handle_rport(value, response, max_len);
+    if (equals_ignore_case(cmd_name, "IP") && value != NULL) {
+        if (config_str_to_ip(value, g_config.ip) != 0) {
+            snprintf(response, max_len, "ERROR: Invalid IP format\r\n");
+            return AT_INVALID_PARAM;
         }
-    else if (equals_ignore_case(cmd_name, "BAUD1") && value != NULL)
-    {
-        result = handle_baud1(value, response, max_len);
+        snprintf(response, max_len, "OK\r\n");
+        return AT_NEED_REBOOT;
     }
-    else if (equals_ignore_case(cmd_name, "BAUD2") && value != NULL)
-    {
-        result = handle_baud2(value, response, max_len);
+    if (equals_ignore_case(cmd_name, "MASK") && value != NULL) {
+        if (config_str_to_ip(value, g_config.mask) != 0) {
+            snprintf(response, max_len, "ERROR: Invalid mask format\r\n");
+            return AT_INVALID_PARAM;
         }
-    else if (equals_ignore_case(cmd_name, "MAC") && value != NULL)
-    {
-        result = handle_mac(value, response, max_len);
+        snprintf(response, max_len, "OK\r\n");
+        return AT_NEED_REBOOT;
     }
-    else if (equals_ignore_case(cmd_name, "DHCP") && value != NULL)
-    {
-        result = handle_dhcp(value, response, max_len);
+    if (equals_ignore_case(cmd_name, "GW") && value != NULL) {
+        if (config_str_to_ip(value, g_config.gw) != 0) {
+            snprintf(response, max_len, "ERROR: Invalid gateway format\r\n");
+            return AT_INVALID_PARAM;
         }
-    else if (equals_ignore_case(cmd_name, "SAVE") && value == NULL)
-    {
-        result = handle_save(response, max_len);
+        snprintf(response, max_len, "OK\r\n");
+        return AT_NEED_REBOOT;
     }
-    else if (equals_ignore_case(cmd_name, "RESET") && value == NULL)
-    {
-        result = handle_reset(response, max_len);
+    if (equals_ignore_case(cmd_name, "RIP") && value != NULL) {
+        if (config_str_to_ip(value, g_config.remote_ip) != 0) {
+            snprintf(response, max_len, "ERROR: Invalid remote IP format\r\n");
+            return AT_INVALID_PARAM;
         }
-    else if (equals_ignore_case(cmd_name, "DEFAULT") && value == NULL)
-    {
-        result = handle_default(response, max_len);
+        snprintf(response, max_len, "OK\r\n");
+        return AT_NEED_REBOOT;
     }
-    else if ((equals_ignore_case(cmd_name, "?") || equals_ignore_case(cmd_name, "QUERY")) && value == NULL)
-    {
-        result = handle_query(response, max_len);
+    if (equals_ignore_case(cmd_name, "MAC") && value != NULL) {
+        if (config_str_to_mac(value, g_config.mac) != 0) {
+            snprintf(response, max_len, "ERROR: Invalid MAC format\r\n");
+            return AT_INVALID_PARAM;
         }
-    else
-    {
+        snprintf(response, max_len, "OK\r\n");
+        return AT_NEED_REBOOT;
+    }
+    if (equals_ignore_case(cmd_name, "PORT") && value != NULL) {
+        int port = atoi(value);
+        if (port < 1 || port > 65535) {
+            snprintf(response, max_len, "ERROR: Invalid port\r\n");
+            return AT_INVALID_PARAM;
+        }
+        g_config.server_port = (uint16_t)port;
+        snprintf(response, max_len, "OK\r\n");
+        return AT_NEED_REBOOT;
+    }
+    if (equals_ignore_case(cmd_name, "RPORT") && value != NULL) {
+        int port = atoi(value);
+        if (port < 1 || port > 65535) {
+            snprintf(response, max_len, "ERROR: Invalid port\r\n");
+            return AT_INVALID_PARAM;
+        }
+        g_config.remote_port = (uint16_t)port;
+        snprintf(response, max_len, "OK\r\n");
+        return AT_NEED_REBOOT;
+    }
+    if (equals_ignore_case(cmd_name, "BAUD1") && value != NULL) {
+        if (parse_baudrate_value(value, &g_config.uart2_baudrate) != 0) {
+            snprintf(response, max_len, "ERROR: Invalid baudrate\r\n");
+            return AT_INVALID_PARAM;
+        }
+        snprintf(response, max_len, "OK\r\n");
+        return AT_NEED_REBOOT;
+    }
+    if (equals_ignore_case(cmd_name, "BAUD2") && value != NULL) {
+        if (parse_baudrate_value(value, &g_config.uart3_baudrate) != 0) {
+            snprintf(response, max_len, "ERROR: Invalid baudrate\r\n");
+            return AT_INVALID_PARAM;
+        }
+        snprintf(response, max_len, "OK\r\n");
+        return AT_NEED_REBOOT;
+    }
+    if (equals_ignore_case(cmd_name, "DHCP") && value != NULL) {
+        int dhcp = atoi(value);
+        if (dhcp != 0 && dhcp != 1) {
+            snprintf(response, max_len, "ERROR: Invalid value\r\n");
+            return AT_INVALID_PARAM;
+        }
+        if (dhcp != 0) {
+            snprintf(response, max_len, "ERROR: DHCP disabled in this build\r\n");
+            return AT_INVALID_PARAM;
+        }
+        g_config.dhcp_enable = (uint8_t)dhcp;
+        snprintf(response, max_len, "OK\r\n");
+        return AT_NEED_REBOOT;
+    }
+
     snprintf(response, max_len, "ERROR: Unknown command\r\n");
-        result = AT_UNKNOWN_CMD;
+    return AT_UNKNOWN_CMD;
 }
 
-    return result;
-}
-
-/**
- * @brief Format IP address to string
- */
 void config_ip_to_str(const uint8_t *ip, char *str)
 {
-    sprintf(str, "%d.%d.%d.%d", ip[0], ip[1], ip[2], ip[3]);
+    sprintf(str, "%u.%u.%u.%u", ip[0], ip[1], ip[2], ip[3]);
 }
 
-/**
- * @brief Parse IP address from string
- */
 int config_str_to_ip(const char *str, uint8_t *ip)
 {
     int a, b, c, d;
 
-    if (sscanf(str, "%d.%d.%d.%d", &a, &b, &c, &d) != 4)
-    {
+    if (sscanf(str, "%d.%d.%d.%d", &a, &b, &c, &d) != 4) {
         return -1;
     }
-    
-    if (a < 0 || a > 255 || b < 0 || b > 255 || 
-        c < 0 || c > 255 || d < 0 || d > 255)
-    {
+    if (a < 0 || a > 255 || b < 0 || b > 255 || c < 0 || c > 255 || d < 0 || d > 255) {
         return -1;
     }
 
@@ -630,41 +375,25 @@ int config_str_to_ip(const char *str, uint8_t *ip)
     ip[1] = (uint8_t)b;
     ip[2] = (uint8_t)c;
     ip[3] = (uint8_t)d;
-    
     return 0;
 }
 
-/**
- * @brief Format MAC address to string
- */
 void config_mac_to_str(const uint8_t *mac, char *str)
 {
-    sprintf(str, "%02X:%02X:%02X:%02X:%02X:%02X", 
-            mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+    sprintf(str, "%02X:%02X:%02X:%02X:%02X:%02X", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 }
 
-/**
- * @brief Parse MAC address from string
- */
 int config_str_to_mac(const char *str, uint8_t *mac)
 {
     int a[6];
 
-    if (sscanf(str, "%x:%x:%x:%x:%x:%x", 
-               &a[0], &a[1], &a[2], &a[3], &a[4], &a[5]) != 6)
-    {
-        /* Try alternate format with dashes */
-        if (sscanf(str, "%x-%x-%x-%x-%x-%x", 
-                   &a[0], &a[1], &a[2], &a[3], &a[4], &a[5]) != 6)
-        {
+    if (sscanf(str, "%x:%x:%x:%x:%x:%x", &a[0], &a[1], &a[2], &a[3], &a[4], &a[5]) != 6 &&
+        sscanf(str, "%x-%x-%x-%x-%x-%x", &a[0], &a[1], &a[2], &a[3], &a[4], &a[5]) != 6) {
         return -1;
     }
-    }
 
-    for (int i = 0; i < 6; i++)
-    {
-        if (a[i] < 0 || a[i] > 255)
-        {
+    for (int i = 0; i < 6; ++i) {
+        if (a[i] < 0 || a[i] > 255) {
             return -1;
         }
         mac[i] = (uint8_t)a[i];
@@ -673,100 +402,80 @@ int config_str_to_mac(const char *str, uint8_t *mac)
     return 0;
 }
 
-/**
- * @brief UART1 IDLE interrupt handler
- */
-void config_uart_idle_handler(void)
+void config_poll(void)
 {
-    uint16_t dma_counter = __HAL_DMA_GET_COUNTER(huart1.hdmarx);
-    uint16_t len = CONFIG_RX_BUFFER_SIZE - dma_counter;
+    if (g_pending_cmd_ready) {
+        uint16_t len = g_pending_cmd_len;
 
-    if (len > 0)
-    {
-        g_rx_index = len;
-        g_rx_complete = true;
+        g_pending_cmd_ready = false;
+        g_pending_cmd_len = 0u;
+        (void)config_try_process_frame((const uint8_t *)g_pending_cmd_buffer, len);
+    }
 }
 
-    /* Stop DMA and restart */
-    HAL_UART_DMAStop(&huart1);
-    HAL_UART_Receive_DMA(&huart1, g_rx_buffer, CONFIG_RX_BUFFER_SIZE);
-}
-
-/**
- * @brief Start UART1 reception
- */
-void config_start_reception(void)
+void config_uart_rx_byte(uint8_t byte)
 {
-    /* Enable IDLE interrupt */
-    __HAL_UART_ENABLE_IT(&huart1, UART_IT_IDLE);
-    
-    /* Start DMA reception */
-    HAL_UART_Receive_DMA(&huart1, g_rx_buffer, CONFIG_RX_BUFFER_SIZE);
+    if (byte == '\r' || byte == '\n') {
+        if (g_uart_cmd_len > 0u) {
+            if (!g_pending_cmd_ready) {
+                memcpy(g_pending_cmd_buffer, g_uart_cmd_buffer, g_uart_cmd_len);
+                g_pending_cmd_buffer[g_uart_cmd_len] = '\0';
+                g_pending_cmd_len = g_uart_cmd_len;
+                g_pending_cmd_ready = true;
+            }
+            g_uart_cmd_len = 0u;
+        }
+        return;
     }
 
-/**
- * @brief Configuration task
- */
-void config_task(void *argument)
+    if (g_uart_cmd_len < (CONFIG_CMD_MAX_LEN - 1u)) {
+        g_uart_cmd_buffer[g_uart_cmd_len++] = (char)byte;
+        g_uart_cmd_buffer[g_uart_cmd_len] = '\0';
+    } else {
+        g_uart_cmd_len = 0u;
+    }
+}
+
+bool config_try_process_frame(const uint8_t *data, uint16_t len)
 {
     char response[CONFIG_TX_BUFFER_SIZE];
     char cmd_buffer[CONFIG_CMD_MAX_LEN];
     at_result_t result;
+    HAL_StatusTypeDef tx_status;
 
-    (void)argument;
-    
-    /* Initialize configuration */
-    config_init();
-    
-    /* Start UART1 reception */
-    config_start_reception();
-    
-    /* Send startup message */
-    snprintf(response, sizeof(response), 
-             "\r\n=== TCP2UART v1.0 ===\r\n"
-             "Type AT+? for configuration\r\n\r\n");
-    HAL_UART_Transmit(&huart1, (uint8_t *)response, strlen(response), 1000);
-    
-    while (1)
-    {
-        /* Wait for command */
-        if (g_rx_complete)
-        {
-            /* Copy command and null-terminate */
-            uint16_t len = g_rx_index;
-            if (len >= CONFIG_CMD_MAX_LEN)
-            {
-                len = CONFIG_CMD_MAX_LEN - 1;
+    if (data == NULL || len < 2u) {
+        return false;
     }
-            memcpy(cmd_buffer, g_rx_buffer, len);
+
+    if (len >= CONFIG_CMD_MAX_LEN) {
+        len = CONFIG_CMD_MAX_LEN - 1u;
+    }
+
+    memcpy(cmd_buffer, data, len);
     cmd_buffer[len] = '\0';
 
-            /* Reset reception state */
-            g_rx_complete = false;
-            g_rx_index = 0;
+    if (((cmd_buffer[0] != 'A') && (cmd_buffer[0] != 'a')) ||
+        ((cmd_buffer[1] != 'T') && (cmd_buffer[1] != 't'))) {
+        return false;
+    }
 
-            /* Process command */
     result = config_process_at_cmd(cmd_buffer, response, sizeof(response));
+    tx_status = HAL_UART_Transmit(&CONFIG_UART_HANDLE, (uint8_t *)response, (uint16_t)strlen(response), 1000u);
 
-            /* Send response */
-            HAL_UART_Transmit(&huart1, (uint8_t *)response, strlen(response), 1000);
+    if (result == AT_NEED_REBOOT) {
+        static const char hint[] = "Note: Use AT+SAVE then AT+RESET to apply changes\r\n";
+        tx_status = HAL_UART_Transmit(&CONFIG_UART_HANDLE, (uint8_t *)hint, sizeof(hint) - 1u, 1000u);
+    }
 
-            if (g_reset_requested)
+    return true;
+}
+
+bool config_is_reset_requested(void)
+{
+    return g_reset_requested;
+}
+
+void config_clear_reset_requested(void)
 {
     g_reset_requested = false;
-                vTaskDelay(pdMS_TO_TICKS(100));
-                NVIC_SystemReset();
-            }
-            
-            /* Handle reboot needed */
-            if (result == AT_NEED_REBOOT)
-            {
-                HAL_UART_Transmit(&huart1, 
-                    (uint8_t *)"Note: Use AT+SAVE then AT+RESET to apply changes\r\n", 
-                    51, 1000);
-            }
-        }
-        
-        vTaskDelay(pdMS_TO_TICKS(10));
-    }
 }

App/config.h

@@ -145,21 +145,33 @@ device_config_t *config_get_mutable(void);
 at_result_t config_process_at_cmd(const char *cmd, char *response, uint16_t max_len);
 
 /**
- * @brief Configuration task (for FreeRTOS)
- * Handles UART1 reception and AT command processing
- * @param argument Task argument (unused)
+ * @brief Poll configuration UART and process pending AT commands
  */
-void config_task(void *argument);
+void config_poll(void);
 
 /**
- * @brief UART1 IDLE interrupt handler for config module
+ * @brief Feed one byte received from the config UART.
+ * @param byte Received byte.
  */
-void config_uart_idle_handler(void);
+void config_uart_rx_byte(uint8_t byte);
 
 /**
- * @brief Start UART1 reception for configuration
+ * @brief Try to process one AT command frame from an external UART source.
+ * @param data Input bytes.
+ * @param len Input length.
+ * @return true if the frame was recognized as an AT/config command.
  */
-void config_start_reception(void);
+bool config_try_process_frame(const uint8_t *data, uint16_t len);
+
+/**
+ * @brief Check whether AT+RESET requested a system reset
+ */
+bool config_is_reset_requested(void);
+
+/**
+ * @brief Clear the pending reset request flag
+ */
+void config_clear_reset_requested(void);
 
 /**
  * @brief Format IP address to string

App/tcp_client.c

@@ -1,431 +1,283 @@
 /**
  * @file tcp_client.c
- * @brief TCP Client module implementation for transparent transmission with UART3
+ * @brief lwIP RAW TCP client for the UART3 bridge.
  */
 
 #include "tcp_client.h"
-#include "config.h"
-#include "lwip/opt.h"
-#include "lwip/tcp.h"
-#include "lwip/sys.h"
-#include "lwip/sockets.h"
 
-#include "FreeRTOS.h"
-#include "task.h"
-#include "stream_buffer.h"
+#include "main.h"
+
+#include "lwip/ip_addr.h"
+#include "lwip/pbuf.h"
+#include "lwip/tcp.h"
 
 #include <string.h>
 
-/*---------------------------------------------------------------------------
- * Private Variables
- *---------------------------------------------------------------------------*/
+typedef struct {
+    struct tcp_pcb *pcb;
+    uint8_t rx_ring[TCP_CLIENT_RX_BUFFER_SIZE];
+    uint16_t rx_head;
+    uint16_t rx_tail;
+    uint32_t next_retry_ms;
+    tcp_client_config_t config;
+    tcp_client_status_t status;
+} tcp_client_ctx_t;
 
-/* Client configuration */
-static tcp_client_config_t client_config = {
-    .server_ip = {192, 168, 1, 100},
-    .server_port = TCP_CLIENT_DEFAULT_PORT,
-    .auto_reconnect = true,
-    .reconnect_interval_ms = TCP_CLIENT_RECONNECT_DELAY_MS
-};
+static tcp_client_ctx_t g_client;
 
-/* Client status */
-static tcp_client_status_t client_status = {
-    .state = TCP_CLIENT_STATE_IDLE,
-    .rx_bytes = 0,
-    .tx_bytes = 0,
-    .reconnect_count = 0,
-    .errors = 0
-};
-
-/* Socket descriptor */
-static int client_socket = -1;
-
-/* Stream buffers for UART integration */
-static StreamBufferHandle_t rx_stream = NULL;  /* TCP RX -> UART TX */
-static StreamBufferHandle_t tx_stream = NULL;  /* UART RX -> TCP TX */
-
-/*---------------------------------------------------------------------------
- * Private Functions
- *---------------------------------------------------------------------------*/
-
-static int tcp_client_send_all(int sock, const uint8_t *data, uint16_t len)
+static uint16_t ring_free(uint16_t head, uint16_t tail, uint16_t size)
 {
-    uint16_t total = 0;
-
-    while (total < len)
-    {
-        int sent = send(sock, data + total, len - total, 0);
-        if (sent > 0)
-        {
-            total += (uint16_t)sent;
+    return (head >= tail) ? (uint16_t)(size - head + tail - 1u) : (uint16_t)(tail - head - 1u);
 }
-        else
+
+static err_t tcp_client_on_recv(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
 {
-            return -1;
+    tcp_client_ctx_t *ctx = (tcp_client_ctx_t *)arg;
+    struct pbuf *q;
+
+    if (err != ERR_OK) {
+        if (p != NULL) {
+            pbuf_free(p);
+        }
+        return err;
+    }
+
+    if (p == NULL) {
+        tcp_arg(pcb, NULL);
+        tcp_recv(pcb, NULL);
+        tcp_sent(pcb, NULL);
+        tcp_err(pcb, NULL);
+        if (tcp_close(pcb) != ERR_OK) {
+            tcp_abort(pcb);
+        }
+        ctx->pcb = NULL;
+        ctx->status.state = TCP_CLIENT_STATE_DISCONNECTED;
+        ctx->next_retry_ms = HAL_GetTick() + ctx->config.reconnect_interval_ms;
+        return ERR_OK;
+    }
+
+    for (q = p; q != NULL; q = q->next) {
+        const uint8_t *src = (const uint8_t *)q->payload;
+        for (uint16_t i = 0; i < q->len; ++i) {
+            if (ring_free(ctx->rx_head, ctx->rx_tail, TCP_CLIENT_RX_BUFFER_SIZE) == 0u) {
+                ctx->status.errors++;
+                break;
+            }
+            ctx->rx_ring[ctx->rx_head] = src[i];
+            ctx->rx_head = (uint16_t)((ctx->rx_head + 1u) % TCP_CLIENT_RX_BUFFER_SIZE);
+            ctx->status.rx_bytes++;
         }
     }
 
-    return (int)total;
+    tcp_recved(pcb, p->tot_len);
+    pbuf_free(p);
+    return ERR_OK;
 }
 
-/**
- * @brief Internal connect function
- */
-static int tcp_client_do_connect(void)
+static err_t tcp_client_on_sent(void *arg, struct tcp_pcb *pcb, u16_t len)
 {
-    struct sockaddr_in server_addr;
-    int ret;
+    tcp_client_ctx_t *ctx = (tcp_client_ctx_t *)arg;
+    (void)pcb;
+    ctx->status.tx_bytes += len;
+    return ERR_OK;
+}
 
-    if (client_socket >= 0)
+static void tcp_client_on_err(void *arg, err_t err)
 {
-        /* Already connected */
-        return 0;
+    tcp_client_ctx_t *ctx = (tcp_client_ctx_t *)arg;
+    (void)err;
+    ctx->pcb = NULL;
+    ctx->status.state = TCP_CLIENT_STATE_DISCONNECTED;
+    ctx->status.errors++;
+    ctx->next_retry_ms = HAL_GetTick() + ctx->config.reconnect_interval_ms;
 }
 
-    client_status.state = TCP_CLIENT_STATE_CONNECTING;
-    
-    /* Create socket */
-    client_socket = socket(AF_INET, SOCK_STREAM, 0);
-    if (client_socket < 0)
+static err_t tcp_client_on_connected(void *arg, struct tcp_pcb *pcb, err_t err)
 {
-        client_status.state = TCP_CLIENT_STATE_ERROR;
-        client_status.errors++;
-        return -1;
+    tcp_client_ctx_t *ctx = (tcp_client_ctx_t *)arg;
+
+    if (err != ERR_OK) {
+        ctx->pcb = NULL;
+        ctx->status.state = TCP_CLIENT_STATE_DISCONNECTED;
+        ctx->status.errors++;
+        ctx->next_retry_ms = HAL_GetTick() + ctx->config.reconnect_interval_ms;
+        return err;
     }
 
-    /* Prepare server address */
-    memset(&server_addr, 0, sizeof(server_addr));
-    server_addr.sin_family = AF_INET;
-    server_addr.sin_port = htons(client_config.server_port);
-    server_addr.sin_addr.s_addr = ((uint32_t)client_config.server_ip[0]) |
-                                  ((uint32_t)client_config.server_ip[1] << 8) |
-                                  ((uint32_t)client_config.server_ip[2] << 16) |
-                                  ((uint32_t)client_config.server_ip[3] << 24);
-    
-    /* Connect to server */
-    ret = connect(client_socket, (struct sockaddr *)&server_addr, sizeof(server_addr));
-    if (ret < 0)
-    {
-        close(client_socket);
-        client_socket = -1;
-        client_status.state = TCP_CLIENT_STATE_DISCONNECTED;
-        client_status.errors++;
-        return -1;
+    ctx->pcb = pcb;
+    ctx->status.state = TCP_CLIENT_STATE_CONNECTED;
+    tcp_arg(pcb, ctx);
+    tcp_recv(pcb, tcp_client_on_recv);
+    tcp_sent(pcb, tcp_client_on_sent);
+    tcp_err(pcb, tcp_client_on_err);
+    return ERR_OK;
 }
 
-    client_status.state = TCP_CLIENT_STATE_CONNECTED;
-    
-    return 0;
-}
-
-/*---------------------------------------------------------------------------
- * Public Functions
- *---------------------------------------------------------------------------*/
-
-/**
- * @brief Initialize TCP Client module
- */
 int tcp_client_init(const tcp_client_config_t *config)
 {
-    if (config != NULL)
-    {
-        memcpy(&client_config, config, sizeof(tcp_client_config_t));
-    }
+    memset(&g_client, 0, sizeof(g_client));
+    g_client.config.server_ip[0] = 192u;
+    g_client.config.server_ip[1] = 168u;
+    g_client.config.server_ip[2] = 1u;
+    g_client.config.server_ip[3] = 100u;
+    g_client.config.server_port = TCP_CLIENT_DEFAULT_PORT;
+    g_client.config.auto_reconnect = true;
+    g_client.config.reconnect_interval_ms = TCP_CLIENT_RECONNECT_DELAY_MS;
+    g_client.status.state = TCP_CLIENT_STATE_IDLE;
 
-    /* Create stream buffers */
-    if (rx_stream == NULL)
-    {
-        rx_stream = xStreamBufferCreate(TCP_CLIENT_RX_BUFFER_SIZE, 1);
-        if (rx_stream == NULL)
-        {
-            return -1;
+    if (config != NULL) {
+        g_client.config = *config;
     }
-    }
-    
-    if (tx_stream == NULL)
-    {
-        tx_stream = xStreamBufferCreate(TCP_CLIENT_TX_BUFFER_SIZE, 1);
-        if (tx_stream == NULL)
-        {
-            return -1;
-        }
-    }
-    
-    client_status.state = TCP_CLIENT_STATE_IDLE;
 
     return 0;
 }
 
-/**
- * @brief Connect to remote server
- */
 int tcp_client_connect(void)
 {
-    return tcp_client_do_connect();
+    struct tcp_pcb *pcb;
+    ip_addr_t remote_addr;
+    err_t err;
+
+    if (g_client.pcb != NULL) {
+        return 0;
+    }
+
+    pcb = tcp_new_ip_type(IPADDR_TYPE_V4);
+    if (pcb == NULL) {
+        g_client.status.errors++;
+        return -1;
+    }
+
+    IP_ADDR4(&remote_addr,
+             g_client.config.server_ip[0],
+             g_client.config.server_ip[1],
+             g_client.config.server_ip[2],
+             g_client.config.server_ip[3]);
+
+    g_client.status.state = TCP_CLIENT_STATE_CONNECTING;
+    tcp_arg(pcb, &g_client);
+    err = tcp_connect(pcb, &remote_addr, g_client.config.server_port, tcp_client_on_connected);
+    if (err != ERR_OK) {
+        tcp_abort(pcb);
+        g_client.status.state = TCP_CLIENT_STATE_DISCONNECTED;
+        g_client.status.errors++;
+        g_client.next_retry_ms = HAL_GetTick() + g_client.config.reconnect_interval_ms;
+        return -1;
+    }
+
+    g_client.pcb = pcb;
+    return 0;
 }
 
-/**
- * @brief Disconnect from server
- */
 int tcp_client_disconnect(void)
 {
-    if (client_socket >= 0)
-    {
-        close(client_socket);
-        client_socket = -1;
+    if (g_client.pcb != NULL) {
+        tcp_arg(g_client.pcb, NULL);
+        tcp_recv(g_client.pcb, NULL);
+        tcp_sent(g_client.pcb, NULL);
+        tcp_err(g_client.pcb, NULL);
+        tcp_abort(g_client.pcb);
+        g_client.pcb = NULL;
     }
 
-    client_status.state = TCP_CLIENT_STATE_DISCONNECTED;
-    
+    g_client.status.state = TCP_CLIENT_STATE_DISCONNECTED;
     return 0;
 }
 
-/**
- * @brief Send data to server
- */
 int tcp_client_send(const uint8_t *data, uint16_t len)
 {
-    int sent;
+    err_t err;
 
-    if (client_socket < 0)
-    {
+    if (g_client.pcb == NULL || data == NULL || len == 0u) {
         return -1;
     }
 
-    sent = tcp_client_send_all(client_socket, data, len);
-    if (sent > 0)
-    {
-        client_status.tx_bytes += sent;
-    }
-    else if (sent < 0)
-    {
-        /* Connection error */
-        close(client_socket);
-        client_socket = -1;
-        client_status.state = TCP_CLIENT_STATE_DISCONNECTED;
-        client_status.errors++;
-    }
-    
-    return sent;
-}
-
-/**
- * @brief Receive data from server
- */
-int tcp_client_recv(uint8_t *data, uint16_t max_len, uint32_t timeout_ms)
-{
-    int received;
-    struct timeval tv;
-    
-    if (client_socket < 0)
-    {
-        return -1;
-    }
-    
-    /* Set receive timeout */
-    tv.tv_sec = timeout_ms / 1000;
-    tv.tv_usec = (timeout_ms % 1000) * 1000;
-    setsockopt(client_socket, SOL_SOCKET, SO_RCVTIMEO, &tv, sizeof(tv));
-    
-    received = recv(client_socket, data, max_len, 0);
-    if (received > 0)
-    {
-        client_status.rx_bytes += received;
-    }
-    else if (received == 0)
-    {
-        /* Connection closed by server */
-        close(client_socket);
-        client_socket = -1;
-        client_status.state = TCP_CLIENT_STATE_DISCONNECTED;
-    }
-    
-    return received;
-}
-
-/**
- * @brief Check if connected to server
- */
-bool tcp_client_is_connected(void)
-{
-    return (client_socket >= 0);
-}
-
-/**
- * @brief Update server configuration
- */
-int tcp_client_set_server(const uint8_t *ip, uint16_t port)
-{
-    if (ip == NULL)
-    {
-        return -1;
-    }
-    
-    /* Disconnect if connected */
-    if (client_socket >= 0)
-    {
-        tcp_client_disconnect();
-    }
-    
-    memcpy(client_config.server_ip, ip, 4);
-    client_config.server_port = port;
-    
+    if (tcp_sndbuf(g_client.pcb) < len) {
+        return 0;
+    }
+
+    err = tcp_write(g_client.pcb, data, len, TCP_WRITE_FLAG_COPY);
+    if (err != ERR_OK) {
+        g_client.status.errors++;
+        return -1;
+    }
+
+    err = tcp_output(g_client.pcb);
+    if (err != ERR_OK) {
+        g_client.status.errors++;
+        return -1;
+    }
+
+    return (int)len;
+}
+
+int tcp_client_recv(uint8_t *data, uint16_t max_len, uint32_t timeout_ms)
+{
+    uint16_t copied = 0u;
+    (void)timeout_ms;
+
+    if (data == NULL || max_len == 0u) {
+        return -1;
+    }
+
+    while (copied < max_len && g_client.rx_tail != g_client.rx_head) {
+        data[copied++] = g_client.rx_ring[g_client.rx_tail];
+        g_client.rx_tail = (uint16_t)((g_client.rx_tail + 1u) % TCP_CLIENT_RX_BUFFER_SIZE);
+    }
+
+    return (int)copied;
+}
+
+bool tcp_client_is_connected(void)
+{
+    return (g_client.pcb != NULL) && (g_client.status.state == TCP_CLIENT_STATE_CONNECTED);
+}
+
+int tcp_client_set_server(const uint8_t *ip, uint16_t port)
+{
+    if (ip == NULL || port == 0u) {
+        return -1;
+    }
+
+    memcpy(g_client.config.server_ip, ip, 4u);
+    g_client.config.server_port = port;
     return 0;
 }
 
-/**
- * @brief Get TCP Client status
- */
 void tcp_client_get_status(tcp_client_status_t *status)
 {
-    if (status != NULL)
-    {
-        memcpy(status, &client_status, sizeof(tcp_client_status_t));
+    if (status != NULL) {
+        *status = g_client.status;
     }
 }
 
-/**
- * @brief Get RX StreamBuffer handle
- */
 void *tcp_client_get_rx_stream(void)
 {
-    return rx_stream;
+    return NULL;
 }
 
-/**
- * @brief Get TX StreamBuffer handle
- */
 void *tcp_client_get_tx_stream(void)
 {
-    return tx_stream;
+    return NULL;
 }
 
-/**
- * @brief TCP Client task
- */
 void tcp_client_task(void *argument)
 {
-    const device_config_t *cfg;
-    tcp_client_config_t task_cfg;
-    uint8_t rx_buffer[256];
-    uint8_t tx_buffer[256];
-    int received;
-    size_t tx_len;
-    fd_set read_fds;
-    struct timeval tv;
-    uint32_t reconnect_timer = 0;
-    
     (void)argument;
-    
-    /* Initialize client */
-    task_cfg.server_ip[0] = 192;
-    task_cfg.server_ip[1] = 168;
-    task_cfg.server_ip[2] = 1;
-    task_cfg.server_ip[3] = 100;
-    task_cfg.server_port = TCP_CLIENT_DEFAULT_PORT;
-    task_cfg.auto_reconnect = true;
-    task_cfg.reconnect_interval_ms = TCP_CLIENT_RECONNECT_DELAY_MS;
-
-    cfg = config_get();
-    if (cfg != NULL)
-    {
-        memcpy(task_cfg.server_ip, cfg->remote_ip, sizeof(task_cfg.server_ip));
-        if (cfg->remote_port > 0)
-        {
-            task_cfg.server_port = cfg->remote_port;
-        }
-        if (cfg->reconnect_interval > 0)
-        {
-            task_cfg.reconnect_interval_ms = cfg->reconnect_interval;
-        }
 }
 
-    tcp_client_init(&task_cfg);
+void tcp_client_poll(void)
+{
+    uint32_t now;
 
-    while (1)
-    {
-        /* Handle connection state */
-        if (client_socket < 0)
-        {
-            /* Not connected - try to reconnect */
-            if (client_config.auto_reconnect)
-            {
-                if (xTaskGetTickCount() - reconnect_timer >= pdMS_TO_TICKS(client_config.reconnect_interval_ms))
-                {
-                    if (tcp_client_do_connect() == 0)
-                    {
-                        /* Connected successfully */
-                        client_status.reconnect_count++;
-                    }
-                    reconnect_timer = xTaskGetTickCount();
-                }
+    if (!g_client.config.auto_reconnect || g_client.pcb != NULL) {
+        return;
     }
 
-            /* Wait before retry */
-            vTaskDelay(pdMS_TO_TICKS(100));
-            continue;
-        }
-        
-        /* Handle data transfer if connected */
-        
-        /* Check for data from TCP server */
-        FD_ZERO(&read_fds);
-        FD_SET(client_socket, &read_fds);
-        tv.tv_sec = 0;
-        tv.tv_usec = 10000;  /* 10ms timeout */
-        
-        if (select(client_socket + 1, &read_fds, NULL, NULL, &tv) > 0)
-        {
-            if (FD_ISSET(client_socket, &read_fds))
-            {
-                received = recv(client_socket, rx_buffer, sizeof(rx_buffer), 0);
-                if (received > 0)
-                {
-                    /* Forward to UART via stream buffer */
-                    xStreamBufferSend(rx_stream, rx_buffer, received, pdMS_TO_TICKS(10));
-                    client_status.rx_bytes += received;
-                }
-                else if (received == 0)
-                {
-                    /* Connection closed */
-                    close(client_socket);
-                    client_socket = -1;
-                    client_status.state = TCP_CLIENT_STATE_DISCONNECTED;
-                    reconnect_timer = xTaskGetTickCount();
-                }
-                else
-                {
-                    /* Error */
-                    close(client_socket);
-                    client_socket = -1;
-                    client_status.state = TCP_CLIENT_STATE_DISCONNECTED;
-                    client_status.errors++;
-                    reconnect_timer = xTaskGetTickCount();
-                }
-            }
-        }
-        
-        /* Check for data from UART to send to TCP */
-        tx_len = xStreamBufferReceive(tx_stream, tx_buffer, sizeof(tx_buffer), 0);
-        if (tx_len > 0)
-        {
-            int sent = tcp_client_send_all(client_socket, tx_buffer, (uint16_t)tx_len);
-            if (sent > 0)
-            {
-                client_status.tx_bytes += sent;
-            }
-            else if (sent < 0)
-            {
-                /* Send error */
-                close(client_socket);
-                client_socket = -1;
-                client_status.state = TCP_CLIENT_STATE_DISCONNECTED;
-                client_status.errors++;
-                reconnect_timer = xTaskGetTickCount();
-            }
-        }
-        
-        /* Small delay to prevent tight loop */
-        vTaskDelay(pdMS_TO_TICKS(1));
+    now = HAL_GetTick();
+    if (now >= g_client.next_retry_ms) {
+        g_client.status.reconnect_count++;
+        g_client.next_retry_ms = now + g_client.config.reconnect_interval_ms;
+        (void)tcp_client_connect();
     }
 }

App/tcp_client.h

@@ -125,6 +125,8 @@ void *tcp_client_get_tx_stream(void);
  */
 void tcp_client_task(void *argument);
 
+void tcp_client_poll(void);
+
 #ifdef __cplusplus
 }
 #endif

App/tcp_server.c

@@ -1,405 +1,253 @@
 /**
  * @file tcp_server.c
- * @brief TCP Server module implementation for transparent transmission with UART2
+ * @brief lwIP RAW TCP server for the UART2 bridge.
  */
 
 #include "tcp_server.h"
-#include "config.h"
-#include "lwip/opt.h"
-#include "lwip/tcp.h"
-#include "lwip/sys.h"
-#include "lwip/sockets.h"
 
-#include "FreeRTOS.h"
-#include "task.h"
-#include "stream_buffer.h"
+#include "lwip/pbuf.h"
+#include "lwip/tcp.h"
 
 #include <string.h>
 
-/*---------------------------------------------------------------------------
- * Private Variables
- *---------------------------------------------------------------------------*/
+typedef struct {
+    struct tcp_pcb *listen_pcb;
+    struct tcp_pcb *client_pcb;
+    uint8_t rx_ring[TCP_SERVER_RX_BUFFER_SIZE];
+    uint16_t rx_head;
+    uint16_t rx_tail;
+    tcp_server_config_t config;
+    tcp_server_status_t status;
+} tcp_server_ctx_t;
 
-/* Server configuration */
-static tcp_server_config_t server_config = {
-    .port = TCP_SERVER_DEFAULT_PORT,
-    .auto_reconnect = true
-};
+static tcp_server_ctx_t g_server;
 
-/* Server status */
-static tcp_server_status_t server_status = {
-    .state = TCP_SERVER_STATE_IDLE,
-    .rx_bytes = 0,
-    .tx_bytes = 0,
-    .connections = 0,
-    .errors = 0
-};
-
-/* Socket descriptors */
-static int listen_socket = -1;
-static int client_socket = -1;
-
-/* Stream buffers for UART integration */
-static StreamBufferHandle_t rx_stream = NULL;  /* TCP RX -> UART TX */
-static StreamBufferHandle_t tx_stream = NULL;  /* UART RX -> TCP TX */
-
-/*---------------------------------------------------------------------------
- * Public Functions
- *---------------------------------------------------------------------------*/
-
-static int tcp_server_send_all(int sock, const uint8_t *data, uint16_t len)
+static uint16_t ring_free(uint16_t head, uint16_t tail, uint16_t size)
 {
-    uint16_t total = 0;
-
-    while (total < len)
-    {
-        int sent = send(sock, data + total, len - total, 0);
-        if (sent > 0)
-        {
-            total += (uint16_t)sent;
+    return (head >= tail) ? (uint16_t)(size - head + tail - 1u) : (uint16_t)(tail - head - 1u);
 }
-        else
+
+static err_t tcp_server_on_recv(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
 {
-            return -1;
+    tcp_server_ctx_t *ctx = (tcp_server_ctx_t *)arg;
+    struct pbuf *q;
+
+    if (err != ERR_OK) {
+        if (p != NULL) {
+            pbuf_free(p);
+        }
+        return err;
+    }
+
+    if (p == NULL) {
+        tcp_arg(pcb, NULL);
+        tcp_recv(pcb, NULL);
+        tcp_sent(pcb, NULL);
+        tcp_err(pcb, NULL);
+        if (tcp_close(pcb) != ERR_OK) {
+            tcp_abort(pcb);
+        }
+        ctx->client_pcb = NULL;
+        ctx->status.state = TCP_SERVER_STATE_LISTENING;
+        return ERR_OK;
+    }
+
+    for (q = p; q != NULL; q = q->next) {
+        const uint8_t *src = (const uint8_t *)q->payload;
+        for (uint16_t i = 0; i < q->len; ++i) {
+            if (ring_free(ctx->rx_head, ctx->rx_tail, TCP_SERVER_RX_BUFFER_SIZE) == 0u) {
+                ctx->status.errors++;
+                break;
+            }
+            ctx->rx_ring[ctx->rx_head] = src[i];
+            ctx->rx_head = (uint16_t)((ctx->rx_head + 1u) % TCP_SERVER_RX_BUFFER_SIZE);
+            ctx->status.rx_bytes++;
         }
     }
 
-    return (int)total;
+    tcp_recved(pcb, p->tot_len);
+    pbuf_free(p);
+    return ERR_OK;
+}
+
+static err_t tcp_server_on_sent(void *arg, struct tcp_pcb *pcb, u16_t len)
+{
+    tcp_server_ctx_t *ctx = (tcp_server_ctx_t *)arg;
+    (void)pcb;
+    ctx->status.tx_bytes += len;
+    return ERR_OK;
+}
+
+static void tcp_server_on_err(void *arg, err_t err)
+{
+    tcp_server_ctx_t *ctx = (tcp_server_ctx_t *)arg;
+    (void)err;
+    ctx->client_pcb = NULL;
+    ctx->status.state = TCP_SERVER_STATE_LISTENING;
+    ctx->status.errors++;
+}
+
+static err_t tcp_server_on_accept(void *arg, struct tcp_pcb *newpcb, err_t err)
+{
+    tcp_server_ctx_t *ctx = (tcp_server_ctx_t *)arg;
+
+    if (err != ERR_OK) {
+        return err;
+    }
+
+    if (ctx->client_pcb != NULL) {
+        tcp_abort(newpcb);
+        return ERR_ABRT;
+    }
+
+    ctx->client_pcb = newpcb;
+    ctx->status.state = TCP_SERVER_STATE_CONNECTED;
+    ctx->status.connections++;
+
+    tcp_arg(newpcb, ctx);
+    tcp_recv(newpcb, tcp_server_on_recv);
+    tcp_sent(newpcb, tcp_server_on_sent);
+    tcp_err(newpcb, tcp_server_on_err);
+    return ERR_OK;
 }
 
-/**
- * @brief Initialize TCP Server module
- */
 int tcp_server_init(const tcp_server_config_t *config)
 {
-    if (config != NULL)
-    {
-        memcpy(&server_config, config, sizeof(tcp_server_config_t));
-    }
+    memset(&g_server, 0, sizeof(g_server));
+    g_server.config.port = TCP_SERVER_DEFAULT_PORT;
+    g_server.config.auto_reconnect = true;
+    g_server.status.state = TCP_SERVER_STATE_IDLE;
 
-    /* Create stream buffers */
-    if (rx_stream == NULL)
-    {
-        rx_stream = xStreamBufferCreate(TCP_SERVER_RX_BUFFER_SIZE, 1);
-        if (rx_stream == NULL)
-        {
-            return -1;
+    if (config != NULL) {
+        g_server.config = *config;
     }
-    }
-    
-    if (tx_stream == NULL)
-    {
-        tx_stream = xStreamBufferCreate(TCP_SERVER_TX_BUFFER_SIZE, 1);
-        if (tx_stream == NULL)
-        {
-            return -1;
-        }
-    }
-    
-    server_status.state = TCP_SERVER_STATE_IDLE;
 
     return 0;
 }
 
-/**
- * @brief Start TCP Server
- */
 int tcp_server_start(void)
 {
-    struct sockaddr_in server_addr;
-    int opt = 1;
+    struct tcp_pcb *pcb;
+    err_t err;
 
-    if (listen_socket >= 0)
-    {
-        /* Already started */
+    if (g_server.listen_pcb != NULL) {
         return 0;
     }
 
-    /* Create socket */
-    listen_socket = socket(AF_INET, SOCK_STREAM, 0);
-    if (listen_socket < 0)
-    {
-        server_status.state = TCP_SERVER_STATE_ERROR;
-        server_status.errors++;
+    pcb = tcp_new_ip_type(IPADDR_TYPE_V4);
+    if (pcb == NULL) {
+        g_server.status.errors++;
         return -1;
     }
 
-    /* Set socket options */
-    setsockopt(listen_socket, SOL_SOCKET, SO_REUSEADDR, &opt, sizeof(opt));
-    
-    /* Bind to port */
-    memset(&server_addr, 0, sizeof(server_addr));
-    server_addr.sin_family = AF_INET;
-    server_addr.sin_addr.s_addr = INADDR_ANY;
-    server_addr.sin_port = htons(server_config.port);
-    
-    if (bind(listen_socket, (struct sockaddr *)&server_addr, sizeof(server_addr)) < 0)
-    {
-        close(listen_socket);
-        listen_socket = -1;
-        server_status.state = TCP_SERVER_STATE_ERROR;
-        server_status.errors++;
+    err = tcp_bind(pcb, IP_ANY_TYPE, g_server.config.port);
+    if (err != ERR_OK) {
+        tcp_abort(pcb);
+        g_server.status.errors++;
         return -1;
     }
 
-    /* Start listening */
-    if (listen(listen_socket, TCP_SERVER_MAX_CONNECTIONS) < 0)
-    {
-        close(listen_socket);
-        listen_socket = -1;
-        server_status.state = TCP_SERVER_STATE_ERROR;
-        server_status.errors++;
+    g_server.listen_pcb = tcp_listen_with_backlog(pcb, 1);
+    if (g_server.listen_pcb == NULL) {
+        g_server.status.errors++;
         return -1;
     }
 
-    server_status.state = TCP_SERVER_STATE_LISTENING;
-    
+    tcp_arg(g_server.listen_pcb, &g_server);
+    tcp_accept(g_server.listen_pcb, tcp_server_on_accept);
+    g_server.status.state = TCP_SERVER_STATE_LISTENING;
     return 0;
 }
 
-/**
- * @brief Stop TCP Server
- */
 int tcp_server_stop(void)
 {
-    if (client_socket >= 0)
-    {
-        close(client_socket);
-        client_socket = -1;
+    if (g_server.client_pcb != NULL) {
+        tcp_arg(g_server.client_pcb, NULL);
+        tcp_recv(g_server.client_pcb, NULL);
+        tcp_sent(g_server.client_pcb, NULL);
+        tcp_err(g_server.client_pcb, NULL);
+        tcp_abort(g_server.client_pcb);
+        g_server.client_pcb = NULL;
     }
 
-    if (listen_socket >= 0)
-    {
-        close(listen_socket);
-        listen_socket = -1;
+    if (g_server.listen_pcb != NULL) {
+        tcp_arg(g_server.listen_pcb, NULL);
+        tcp_accept(g_server.listen_pcb, NULL);
+        tcp_close(g_server.listen_pcb);
+        g_server.listen_pcb = NULL;
     }
 
-    server_status.state = TCP_SERVER_STATE_IDLE;
-    
+    g_server.status.state = TCP_SERVER_STATE_IDLE;
     return 0;
 }
 
-/**
- * @brief Send data to connected client
- */
 int tcp_server_send(const uint8_t *data, uint16_t len)
 {
-    int sent;
+    err_t err;
 
-    if (client_socket < 0)
-    {
+    if (g_server.client_pcb == NULL || data == NULL || len == 0u) {
         return -1;
     }
 
-    sent = tcp_server_send_all(client_socket, data, len);
-    if (sent > 0)
-    {
-        server_status.tx_bytes += sent;
-    }
-    else if (sent < 0)
-    {
-        /* Connection error */
-        close(client_socket);
-        client_socket = -1;
-        server_status.state = TCP_SERVER_STATE_LISTENING;
-        server_status.errors++;
+    if (tcp_sndbuf(g_server.client_pcb) < len) {
+        return 0;
     }
 
-    return sent;
+    err = tcp_write(g_server.client_pcb, data, len, TCP_WRITE_FLAG_COPY);
+    if (err != ERR_OK) {
+        g_server.status.errors++;
+        return -1;
+    }
+
+    err = tcp_output(g_server.client_pcb);
+    if (err != ERR_OK) {
+        g_server.status.errors++;
+        return -1;
+    }
+
+    return (int)len;
 }
 
-/**
- * @brief Receive data from connected client
- */
 int tcp_server_recv(uint8_t *data, uint16_t max_len, uint32_t timeout_ms)
 {
-    int received;
-    struct timeval tv;
+    uint16_t copied = 0u;
+    (void)timeout_ms;
 
-    if (client_socket < 0)
-    {
+    if (data == NULL || max_len == 0u) {
         return -1;
     }
 
-    /* Set receive timeout */
-    tv.tv_sec = timeout_ms / 1000;
-    tv.tv_usec = (timeout_ms % 1000) * 1000;
-    setsockopt(client_socket, SOL_SOCKET, SO_RCVTIMEO, &tv, sizeof(tv));
-    
-    received = recv(client_socket, data, max_len, 0);
-    if (received > 0)
-    {
-        server_status.rx_bytes += received;
-    }
-    else if (received == 0)
-    {
-        /* Connection closed by client */
-        close(client_socket);
-        client_socket = -1;
-        server_status.state = TCP_SERVER_STATE_LISTENING;
-    }
-    else if (received < 0)
-    {
-        /* Timeout or error - check errno */
-        /* For timeout, just return 0 */
+    while (copied < max_len && g_server.rx_tail != g_server.rx_head) {
+        data[copied++] = g_server.rx_ring[g_server.rx_tail];
+        g_server.rx_tail = (uint16_t)((g_server.rx_tail + 1u) % TCP_SERVER_RX_BUFFER_SIZE);
     }
 
-    return received;
+    return (int)copied;
 }
 
-/**
- * @brief Check if client is connected
- */
 bool tcp_server_is_connected(void)
 {
-    return (client_socket >= 0);
+    return g_server.client_pcb != NULL;
 }
 
-/**
- * @brief Get TCP Server status
- */
 void tcp_server_get_status(tcp_server_status_t *status)
 {
-    if (status != NULL)
-    {
-        memcpy(status, &server_status, sizeof(tcp_server_status_t));
+    if (status != NULL) {
+        *status = g_server.status;
     }
 }
 
-/**
- * @brief Get RX StreamBuffer handle
- */
 void *tcp_server_get_rx_stream(void)
 {
-    return rx_stream;
+    return NULL;
 }
 
-/**
- * @brief Get TX StreamBuffer handle
- */
 void *tcp_server_get_tx_stream(void)
 {
-    return tx_stream;
+    return NULL;
 }
 
-/**
- * @brief TCP Server task
- */
 void tcp_server_task(void *argument)
 {
-    const device_config_t *cfg;
-    tcp_server_config_t task_cfg;
-    struct sockaddr_in client_addr;
-    socklen_t addr_len;
-    uint8_t rx_buffer[256];
-    uint8_t tx_buffer[256];
-    int received;
-    size_t tx_len;
-    fd_set read_fds;
-    struct timeval tv;
-    int max_fd;
-    
     (void)argument;
-    
-    /* Initialize server */
-    task_cfg.port = TCP_SERVER_DEFAULT_PORT;
-    task_cfg.auto_reconnect = true;
-    cfg = config_get();
-    if (cfg != NULL && cfg->server_port > 0)
-    {
-        task_cfg.port = cfg->server_port;
-    }
-    tcp_server_init(&task_cfg);
-    
-    /* Start server */
-    while (tcp_server_start() != 0)
-    {
-        vTaskDelay(pdMS_TO_TICKS(1000));
-    }
-    
-    while (1)
-    {
-        /* Check if we need to accept a new connection */
-        if (client_socket < 0 && listen_socket >= 0)
-        {
-            /* Use select with timeout to check for incoming connections */
-            FD_ZERO(&read_fds);
-            FD_SET(listen_socket, &read_fds);
-            tv.tv_sec = 0;
-            tv.tv_usec = 100000;  /* 100ms timeout */
-            
-            if (select(listen_socket + 1, &read_fds, NULL, NULL, &tv) > 0)
-            {
-                addr_len = sizeof(client_addr);
-                client_socket = accept(listen_socket, (struct sockaddr *)&client_addr, &addr_len);
-                if (client_socket >= 0)
-                {
-                    server_status.state = TCP_SERVER_STATE_CONNECTED;
-                    server_status.connections++;
-                }
-            }
-        }
-        
-        /* Handle data transfer if connected */
-        if (client_socket >= 0)
-        {
-            /* Check for data from TCP client */
-            FD_ZERO(&read_fds);
-            FD_SET(client_socket, &read_fds);
-            max_fd = client_socket;
-            tv.tv_sec = 0;
-            tv.tv_usec = 10000;  /* 10ms timeout */
-            
-            if (select(max_fd + 1, &read_fds, NULL, NULL, &tv) > 0)
-            {
-                if (FD_ISSET(client_socket, &read_fds))
-                {
-                    received = recv(client_socket, rx_buffer, sizeof(rx_buffer), 0);
-                    if (received > 0)
-                    {
-                        /* Forward to UART via stream buffer */
-                        xStreamBufferSend(rx_stream, rx_buffer, received, pdMS_TO_TICKS(10));
-                        server_status.rx_bytes += received;
-                    }
-                    else if (received == 0)
-                    {
-                        /* Connection closed */
-                        close(client_socket);
-                        client_socket = -1;
-                        server_status.state = TCP_SERVER_STATE_LISTENING;
-                    }
-                    else
-                    {
-                        /* Error */
-                        close(client_socket);
-                        client_socket = -1;
-                        server_status.state = TCP_SERVER_STATE_LISTENING;
-                        server_status.errors++;
-                    }
-                }
-            }
-            
-            /* Check for data from UART to send to TCP */
-            tx_len = xStreamBufferReceive(tx_stream, tx_buffer, sizeof(tx_buffer), 0);
-            if (tx_len > 0)
-            {
-                int sent = tcp_server_send_all(client_socket, tx_buffer, (uint16_t)tx_len);
-                if (sent > 0)
-                {
-                    server_status.tx_bytes += sent;
-                }
-                else if (sent < 0)
-                {
-                    /* Send error */
-                    close(client_socket);
-                    client_socket = -1;
-                    server_status.state = TCP_SERVER_STATE_LISTENING;
-                    server_status.errors++;
-                }
-            }
-        }
-        
-        /* Small delay to prevent tight loop */
-        vTaskDelay(pdMS_TO_TICKS(1));
-    }
 }

App/uart_trans.c

@@ -1,528 +1,345 @@
 /**
  * @file uart_trans.c
- * @brief UART transparent transmission module implementation
- * 
- * Uses DMA + IDLE interrupt for efficient variable-length data reception.
- * Integrates with TCP modules via FreeRTOS StreamBuffers.
+ * @brief Bare-metal UART DMA/IDLE transport layer.
  */
 
 #include "uart_trans.h"
-#include "usart.h"
 
-#include "FreeRTOS.h"
-#include "task.h"
-#include "stream_buffer.h"
+#include "usart.h"
 
 #include <string.h>
 
-/*---------------------------------------------------------------------------
- * Private Definitions
- *---------------------------------------------------------------------------*/
-
-/* Channel context structure */
 typedef struct {
-    UART_HandleTypeDef *huart;          /* HAL UART handle */
-    DMA_HandleTypeDef  *hdma_rx;        /* DMA RX handle */
-    
-    uint8_t  rx_dma_buffer[UART_RX_DMA_BUFFER_SIZE];  /* DMA RX buffer */
-    uint8_t  tx_dma_buffer[UART_TX_DMA_BUFFER_SIZE];  /* DMA TX buffer */
-    
-    volatile uint16_t rx_read_index;    /* Last read position */
-    volatile bool     tx_busy;          /* TX in progress flag */
-    
-    StreamBufferHandle_t rx_stream;     /* From TCP (for UART TX) */
-    StreamBufferHandle_t tx_stream;     /* To TCP (from UART RX) */
-    
-    uart_config_t config;               /* UART configuration */
-    uart_stats_t  stats;                /* Statistics */
-    
+    UART_HandleTypeDef *huart;
+    uint8_t rx_dma_buffer[UART_RX_DMA_BUFFER_SIZE];
+    uint8_t tx_dma_buffer[UART_TX_DMA_BUFFER_SIZE];
+    uint8_t rx_ring[UART_RX_RING_BUFFER_SIZE];
+    uint8_t tx_ring[UART_TX_RING_BUFFER_SIZE];
+    volatile uint16_t rx_dma_read_index;
+    volatile uint16_t rx_head;
+    volatile uint16_t rx_tail;
+    volatile uint16_t tx_head;
+    volatile uint16_t tx_tail;
+    volatile uint16_t tx_dma_len;
+    volatile bool tx_busy;
+    uart_config_t config;
+    uart_stats_t stats;
     bool initialized;
     bool running;
 } uart_channel_ctx_t;
 
-/*---------------------------------------------------------------------------
- * Private Variables
- *---------------------------------------------------------------------------*/
-
 static uart_channel_ctx_t g_channels[UART_CHANNEL_MAX];
 
-/*---------------------------------------------------------------------------
- * Private Functions
- *---------------------------------------------------------------------------*/
+static uint16_t ring_used(uint16_t head, uint16_t tail, uint16_t size)
+{
+    return (head >= tail) ? (head - tail) : (size - tail + head);
+}
+
+static uint16_t ring_free(uint16_t head, uint16_t tail, uint16_t size)
+{
+    return (uint16_t)(size - ring_used(head, tail, size) - 1u);
+}
+
+static void apply_default_config(uart_channel_ctx_t *ctx)
+{
+    ctx->config.baudrate = UART_DEFAULT_BAUDRATE;
+    ctx->config.data_bits = UART_DEFAULT_DATA_BITS;
+    ctx->config.stop_bits = UART_DEFAULT_STOP_BITS;
+    ctx->config.parity = UART_DEFAULT_PARITY;
+}
 
-/**
- * @brief Apply UART configuration
- */
 static int apply_uart_config(uart_channel_t channel)
 {
     uart_channel_ctx_t *ctx = &g_channels[channel];
     UART_HandleTypeDef *huart = ctx->huart;
+    uint32_t word_length;
+    uint32_t parity;
 
-    if (huart == NULL)
-    {
+    if (huart == NULL) {
         return -1;
     }
 
-    /* Stop UART if running */
-    if (ctx->running)
-    {
+    if (ctx->running) {
         HAL_UART_DMAStop(huart);
+        ctx->running = false;
     }
 
-    /* Update UART parameters */
     huart->Init.BaudRate = ctx->config.baudrate;
+    huart->Init.StopBits = (ctx->config.stop_bits == 2u) ? UART_STOPBITS_2 : UART_STOPBITS_1;
 
-    /* Data bits */
-    if (ctx->config.data_bits == 9)
-    {
-        huart->Init.WordLength = UART_WORDLENGTH_9B;
-    }
-    else
-    {
-        huart->Init.WordLength = UART_WORDLENGTH_8B;
-    }
-    
-    /* Stop bits */
-    if (ctx->config.stop_bits == 2)
-    {
-        huart->Init.StopBits = UART_STOPBITS_2;
-    }
-    else
-    {
-        huart->Init.StopBits = UART_STOPBITS_1;
-    }
-    
-    /* Parity */
-    switch (ctx->config.parity)
-    {
+    switch (ctx->config.parity) {
     case 1:
-            huart->Init.Parity = UART_PARITY_ODD;
+        parity = UART_PARITY_ODD;
         break;
     case 2:
-            huart->Init.Parity = UART_PARITY_EVEN;
+        parity = UART_PARITY_EVEN;
         break;
     default:
-            huart->Init.Parity = UART_PARITY_NONE;
+        parity = UART_PARITY_NONE;
         break;
     }
 
-    /* Reinitialize UART */
-    if (HAL_UART_Init(huart) != HAL_OK)
-    {
-        return -1;
+    if (parity == UART_PARITY_NONE) {
+        word_length = (ctx->config.data_bits == 9u) ? UART_WORDLENGTH_9B : UART_WORDLENGTH_8B;
+    } else {
+        word_length = (ctx->config.data_bits >= 8u) ? UART_WORDLENGTH_9B : UART_WORDLENGTH_8B;
     }
 
-    return 0;
+    huart->Init.WordLength = word_length;
+    huart->Init.Parity = parity;
+
+    return (HAL_UART_Init(huart) == HAL_OK) ? 0 : -1;
 }
 
-static void process_rx_data_from_isr(uart_channel_t channel, uint16_t end_index)
+static void process_rx_snapshot(uart_channel_t channel, uint16_t dma_write_index)
 {
     uart_channel_ctx_t *ctx = &g_channels[channel];
-    uint16_t start = ctx->rx_read_index;
-    uint16_t end = end_index;
-    uint16_t len;
-    BaseType_t xHigherPriorityTaskWoken = pdFALSE;
 
-    if (start >= UART_RX_DMA_BUFFER_SIZE)
-    {
-        start = 0;
+    while (ctx->rx_dma_read_index != dma_write_index) {
+        uint16_t next_head;
+
+        next_head = (uint16_t)((ctx->rx_head + 1u) % UART_RX_RING_BUFFER_SIZE);
+        if (next_head == ctx->rx_tail) {
+            ctx->stats.errors++;
+            break;
         }
 
-    if (end > UART_RX_DMA_BUFFER_SIZE)
-    {
-        end = UART_RX_DMA_BUFFER_SIZE;
+        ctx->rx_ring[ctx->rx_head] = ctx->rx_dma_buffer[ctx->rx_dma_read_index];
+        ctx->rx_head = next_head;
+        ctx->rx_dma_read_index = (uint16_t)((ctx->rx_dma_read_index + 1u) % UART_RX_DMA_BUFFER_SIZE);
+        ctx->stats.rx_bytes++;
+    }
 }
 
-    if (end >= start)
+static void kick_tx(uart_channel_t channel)
 {
-        len = end - start;
-        if (len > 0 && ctx->tx_stream != NULL)
-        {
-            xStreamBufferSendFromISR(ctx->tx_stream,
-                                     &ctx->rx_dma_buffer[start],
-                                     len,
-                                     &xHigherPriorityTaskWoken);
-            ctx->stats.rx_bytes += len;
-            ctx->stats.rx_packets++;
-        }
-    }
-    else
-    {
-        len = UART_RX_DMA_BUFFER_SIZE - start;
-        if (len > 0 && ctx->tx_stream != NULL)
-        {
-            xStreamBufferSendFromISR(ctx->tx_stream,
-                                     &ctx->rx_dma_buffer[start],
-                                     len,
-                                     &xHigherPriorityTaskWoken);
-            ctx->stats.rx_bytes += len;
+    uart_channel_ctx_t *ctx = &g_channels[channel];
+    uint16_t available;
+    uint16_t chunk;
+
+    if (!ctx->running || ctx->tx_busy) {
+        return;
     }
 
-        if (end > 0 && ctx->tx_stream != NULL)
-        {
-            xStreamBufferSendFromISR(ctx->tx_stream,
-                                     ctx->rx_dma_buffer,
-                                     end,
-                                     &xHigherPriorityTaskWoken);
-            ctx->stats.rx_bytes += end;
-        }
-        ctx->stats.rx_packets++;
+    available = ring_used(ctx->tx_head, ctx->tx_tail, UART_TX_RING_BUFFER_SIZE);
+    if (available == 0u) {
+        return;
     }
 
-    ctx->rx_read_index = (end == UART_RX_DMA_BUFFER_SIZE) ? 0 : end;
-    portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
+    chunk = available;
+    if (chunk > UART_TX_DMA_BUFFER_SIZE) {
+        chunk = UART_TX_DMA_BUFFER_SIZE;
     }
 
-/*---------------------------------------------------------------------------
- * Public Functions
- *---------------------------------------------------------------------------*/
+    for (uint16_t i = 0; i < chunk; ++i) {
+        ctx->tx_dma_buffer[i] = ctx->tx_ring[ctx->tx_tail];
+        ctx->tx_tail = (uint16_t)((ctx->tx_tail + 1u) % UART_TX_RING_BUFFER_SIZE);
+    }
+
+    ctx->tx_dma_len = chunk;
+    ctx->tx_busy = true;
+    ctx->stats.tx_packets++;
+
+    if (HAL_UART_Transmit_DMA(ctx->huart, ctx->tx_dma_buffer, chunk) != HAL_OK) {
+        ctx->tx_busy = false;
+        ctx->stats.errors++;
+    }
+}
 
-/**
- * @brief Initialize UART transparent transmission module
- */
 int uart_trans_init(void)
 {
-    /* Initialize Server channel (UART2) */
-    memset(&g_channels[UART_CHANNEL_SERVER], 0, sizeof(uart_channel_ctx_t));
-    g_channels[UART_CHANNEL_SERVER].huart = &huart2;
-    g_channels[UART_CHANNEL_SERVER].config.baudrate = UART_DEFAULT_BAUDRATE;
-    g_channels[UART_CHANNEL_SERVER].config.data_bits = UART_DEFAULT_DATA_BITS;
-    g_channels[UART_CHANNEL_SERVER].config.stop_bits = UART_DEFAULT_STOP_BITS;
-    g_channels[UART_CHANNEL_SERVER].config.parity = UART_DEFAULT_PARITY;
-    g_channels[UART_CHANNEL_SERVER].initialized = true;
+    memset(g_channels, 0, sizeof(g_channels));
 
-    /* Initialize Client channel (UART3) */
-    memset(&g_channels[UART_CHANNEL_CLIENT], 0, sizeof(uart_channel_ctx_t));
+    g_channels[UART_CHANNEL_SERVER].huart = &huart2;
     g_channels[UART_CHANNEL_CLIENT].huart = &huart3;
-    g_channels[UART_CHANNEL_CLIENT].config.baudrate = UART_DEFAULT_BAUDRATE;
-    g_channels[UART_CHANNEL_CLIENT].config.data_bits = UART_DEFAULT_DATA_BITS;
-    g_channels[UART_CHANNEL_CLIENT].config.stop_bits = UART_DEFAULT_STOP_BITS;
-    g_channels[UART_CHANNEL_CLIENT].config.parity = UART_DEFAULT_PARITY;
+
+    apply_default_config(&g_channels[UART_CHANNEL_SERVER]);
+    apply_default_config(&g_channels[UART_CHANNEL_CLIENT]);
+
+    g_channels[UART_CHANNEL_SERVER].initialized = true;
     g_channels[UART_CHANNEL_CLIENT].initialized = true;
 
     return 0;
 }
 
-/**
- * @brief Configure UART channel parameters
- */
 int uart_trans_config(uart_channel_t channel, const uart_config_t *config)
 {
-    if (channel >= UART_CHANNEL_MAX || config == NULL)
-    {
+    if (channel >= UART_CHANNEL_MAX || config == NULL) {
         return -1;
     }
 
-    uart_channel_ctx_t *ctx = &g_channels[channel];
-    
-    memcpy(&ctx->config, config, sizeof(uart_config_t));
-    
-    /* Apply configuration if already initialized */
-    if (ctx->initialized)
-    {
+    g_channels[channel].config = *config;
     return apply_uart_config(channel);
 }
 
-    return 0;
-}
-
-/**
- * @brief Start UART reception
- */
 int uart_trans_start(uart_channel_t channel)
 {
-    if (channel >= UART_CHANNEL_MAX)
-    {
+    uart_channel_ctx_t *ctx;
+
+    if (channel >= UART_CHANNEL_MAX) {
         return -1;
     }
 
-    uart_channel_ctx_t *ctx = &g_channels[channel];
-    
-    if (!ctx->initialized || ctx->huart == NULL)
-    {
+    ctx = &g_channels[channel];
+    if (!ctx->initialized || ctx->huart == NULL) {
         return -1;
     }
 
-    /* Reset read index */
-    ctx->rx_read_index = 0;
+    ctx->rx_dma_read_index = 0u;
+    ctx->rx_head = 0u;
+    ctx->rx_tail = 0u;
+    ctx->tx_head = 0u;
+    ctx->tx_tail = 0u;
+    ctx->tx_dma_len = 0u;
     ctx->tx_busy = false;
+    memset(&ctx->stats, 0, sizeof(ctx->stats));
 
-    /* Enable IDLE interrupt */
     __HAL_UART_ENABLE_IT(ctx->huart, UART_IT_IDLE);
-    
-    /* Start DMA reception (circular mode) */
-    HAL_UART_Receive_DMA(ctx->huart, ctx->rx_dma_buffer, UART_RX_DMA_BUFFER_SIZE);
+    if (HAL_UART_Receive_DMA(ctx->huart, ctx->rx_dma_buffer, UART_RX_DMA_BUFFER_SIZE) != HAL_OK) {
+        return -1;
+    }
 
     ctx->running = true;
-    
     return 0;
 }
 
-/**
- * @brief Stop UART reception
- */
 int uart_trans_stop(uart_channel_t channel)
 {
-    if (channel >= UART_CHANNEL_MAX)
-    {
+    if (channel >= UART_CHANNEL_MAX) {
         return -1;
     }
 
-    uart_channel_ctx_t *ctx = &g_channels[channel];
-    
-    if (ctx->huart == NULL)
-    {
-        return -1;
-    }
-    
-    /* Disable IDLE interrupt */
-    __HAL_UART_DISABLE_IT(ctx->huart, UART_IT_IDLE);
-    
-    /* Stop DMA */
-    HAL_UART_DMAStop(ctx->huart);
-    
-    ctx->running = false;
-    
+    HAL_UART_DMAStop(g_channels[channel].huart);
+    g_channels[channel].running = false;
+    g_channels[channel].tx_busy = false;
     return 0;
 }
 
-/**
- * @brief Set StreamBuffer handles
- */
-void uart_trans_set_streams(uart_channel_t channel, 
-                            void *rx_stream, 
-                            void *tx_stream)
-{
-    if (channel >= UART_CHANNEL_MAX)
-    {
-        return;
-    }
-    
-    g_channels[channel].rx_stream = (StreamBufferHandle_t)rx_stream;
-    g_channels[channel].tx_stream = (StreamBufferHandle_t)tx_stream;
-}
-
-/**
- * @brief Get UART statistics
- */
 void uart_trans_get_stats(uart_channel_t channel, uart_stats_t *stats)
 {
-    if (channel >= UART_CHANNEL_MAX || stats == NULL)
-    {
+    if (channel >= UART_CHANNEL_MAX || stats == NULL) {
         return;
     }
 
-    memcpy(stats, &g_channels[channel].stats, sizeof(uart_stats_t));
+    *stats = g_channels[channel].stats;
 }
 
-/**
- * @brief Reset UART statistics
- */
 void uart_trans_reset_stats(uart_channel_t channel)
 {
-    if (channel >= UART_CHANNEL_MAX)
-    {
+    if (channel >= UART_CHANNEL_MAX) {
         return;
     }
 
-    memset(&g_channels[channel].stats, 0, sizeof(uart_stats_t));
+    memset(&g_channels[channel].stats, 0, sizeof(g_channels[channel].stats));
+}
+
+uint16_t uart_trans_rx_available(uart_channel_t channel)
+{
+    if (channel >= UART_CHANNEL_MAX) {
+        return 0u;
+    }
+
+    return ring_used(g_channels[channel].rx_head, g_channels[channel].rx_tail, UART_RX_RING_BUFFER_SIZE);
+}
+
+uint16_t uart_trans_read(uart_channel_t channel, uint8_t *data, uint16_t max_len)
+{
+    uart_channel_ctx_t *ctx;
+    uint16_t copied = 0u;
+
+    if (channel >= UART_CHANNEL_MAX || data == NULL || max_len == 0u) {
+        return 0u;
+    }
+
+    ctx = &g_channels[channel];
+    while (copied < max_len && ctx->rx_tail != ctx->rx_head) {
+        data[copied++] = ctx->rx_ring[ctx->rx_tail];
+        ctx->rx_tail = (uint16_t)((ctx->rx_tail + 1u) % UART_RX_RING_BUFFER_SIZE);
+    }
+
+    if (copied > 0u) {
+        ctx->stats.rx_packets++;
+    }
+
+    return copied;
+}
+
+uint16_t uart_trans_write(uart_channel_t channel, const uint8_t *data, uint16_t len)
+{
+    uart_channel_ctx_t *ctx;
+    uint16_t written = 0u;
+
+    if (channel >= UART_CHANNEL_MAX || data == NULL || len == 0u) {
+        return 0u;
+    }
+
+    ctx = &g_channels[channel];
+    while (written < len && ring_free(ctx->tx_head, ctx->tx_tail, UART_TX_RING_BUFFER_SIZE) > 0u) {
+        ctx->tx_ring[ctx->tx_head] = data[written++];
+        ctx->tx_head = (uint16_t)((ctx->tx_head + 1u) % UART_TX_RING_BUFFER_SIZE);
+    }
+
+    if (written < len) {
+        ctx->stats.errors++;
+    }
+
+    kick_tx(channel);
+    return written;
+}
+
+void uart_trans_poll(void)
+{
+    kick_tx(UART_CHANNEL_SERVER);
+    kick_tx(UART_CHANNEL_CLIENT);
 }
 
-/**
- * @brief UART IDLE interrupt handler
- */
 void uart_trans_idle_handler(uart_channel_t channel)
 {
-    if (channel >= UART_CHANNEL_MAX)
-    {
+    UART_HandleTypeDef *huart;
+    uint16_t dma_write_index;
+
+    if (channel >= UART_CHANNEL_MAX) {
         return;
     }
 
-    uart_channel_ctx_t *ctx = &g_channels[channel];
-    
-    if (!ctx->running || ctx->huart == NULL)
-    {
-        return;
+    huart = g_channels[channel].huart;
+    g_channels[channel].stats.idle_events++;
+    dma_write_index = (uint16_t)(UART_RX_DMA_BUFFER_SIZE - __HAL_DMA_GET_COUNTER(huart->hdmarx));
+    if (dma_write_index >= UART_RX_DMA_BUFFER_SIZE) {
+        dma_write_index = 0u;
     }
 
-    /* Get current DMA position */
-    uint16_t dma_counter = __HAL_DMA_GET_COUNTER(ctx->huart->hdmarx);
-    uint16_t current_pos = UART_RX_DMA_BUFFER_SIZE - dma_counter;
-    
-    /* Process received data */
-    if (current_pos != ctx->rx_read_index)
-    {
-        process_rx_data_from_isr(channel, current_pos);
-    }
+    process_rx_snapshot(channel, dma_write_index);
 }
 
 void uart_trans_rx_half_cplt_handler(uart_channel_t channel)
 {
-    if (channel >= UART_CHANNEL_MAX)
-    {
+    if (channel >= UART_CHANNEL_MAX) {
         return;
     }
 
-    uart_channel_ctx_t *ctx = &g_channels[channel];
-    if (!ctx->running || ctx->huart == NULL)
-    {
-        return;
+    g_channels[channel].stats.rx_half_events++;
+    process_rx_snapshot(channel, UART_RX_DMA_BUFFER_SIZE / 2u);
 }
 
-    uint16_t dma_counter = __HAL_DMA_GET_COUNTER(ctx->huart->hdmarx);
-    uint16_t current_pos = UART_RX_DMA_BUFFER_SIZE - dma_counter;
-
-    if (current_pos != ctx->rx_read_index)
-    {
-        process_rx_data_from_isr(channel, current_pos);
-    }
-}
-
-/**
- * @brief UART DMA RX complete callback (buffer half/full)
- */
 void uart_trans_rx_cplt_handler(uart_channel_t channel)
 {
-    /* In circular mode, this is called when buffer is full */
-    /* The IDLE handler already processes data continuously */
-    /* This is a safety handler for high-speed continuous data */
-    
-    if (channel >= UART_CHANNEL_MAX)
-    {
+    if (channel >= UART_CHANNEL_MAX) {
         return;
     }
 
-    uart_channel_ctx_t *ctx = &g_channels[channel];
-    
-    if (!ctx->running)
-    {
-        return;
+    g_channels[channel].stats.rx_full_events++;
+    process_rx_snapshot(channel, 0u);
 }
 
-    uint16_t dma_counter = __HAL_DMA_GET_COUNTER(ctx->huart->hdmarx);
-    uint16_t current_pos = UART_RX_DMA_BUFFER_SIZE - dma_counter;
-
-    if (current_pos != ctx->rx_read_index)
-    {
-        process_rx_data_from_isr(channel, current_pos);
-    }
-}
-
-/**
- * @brief UART DMA TX complete callback
- */
 void uart_trans_tx_cplt_handler(uart_channel_t channel)
 {
-    if (channel >= UART_CHANNEL_MAX)
-    {
+    if (channel >= UART_CHANNEL_MAX) {
         return;
     }
 
     g_channels[channel].tx_busy = false;
-}
-
-/**
- * @brief Server transparent transmission task (UART2 <-> TCP Server)
- */
-void uart_server_trans_task(void *argument)
-{
-    uart_channel_ctx_t *ctx = &g_channels[UART_CHANNEL_SERVER];
-    uint8_t tx_buffer[128];
-    size_t len;
-    
-    (void)argument;
-    
-    /* Wait for streams to be set */
-    while (ctx->rx_stream == NULL || ctx->tx_stream == NULL)
-    {
-        vTaskDelay(pdMS_TO_TICKS(100));
-    }
-    
-    /* Start UART reception */
-    uart_trans_start(UART_CHANNEL_SERVER);
-    
-    while (1)
-    {
-        /* Check for data from TCP to send to UART */
-        if (!ctx->tx_busy && ctx->rx_stream != NULL)
-        {
-            len = xStreamBufferReceive(ctx->rx_stream, tx_buffer, 
-                                       sizeof(tx_buffer), pdMS_TO_TICKS(10));
-            if (len > 0)
-            {
-                /* Copy to DMA buffer and send */
-                memcpy(ctx->tx_dma_buffer, tx_buffer, len);
-                ctx->tx_busy = true;
-                
-                if (HAL_UART_Transmit_DMA(ctx->huart, ctx->tx_dma_buffer, len) != HAL_OK)
-                {
-                    ctx->tx_busy = false;
-                    ctx->stats.errors++;
-                }
-                else
-                {
-                    ctx->stats.tx_bytes += len;
-                    ctx->stats.tx_packets++;
-                }
-            }
-        }
-        else
-        {
-            /* TX busy or no stream, wait a bit */
-            vTaskDelay(pdMS_TO_TICKS(1));
-        }
-    }
-}
-
-/**
- * @brief Client transparent transmission task (UART3 <-> TCP Client)
- */
-void uart_client_trans_task(void *argument)
-{
-    uart_channel_ctx_t *ctx = &g_channels[UART_CHANNEL_CLIENT];
-    uint8_t tx_buffer[128];
-    size_t len;
-    
-    (void)argument;
-    
-    /* Wait for streams to be set */
-    while (ctx->rx_stream == NULL || ctx->tx_stream == NULL)
-    {
-        vTaskDelay(pdMS_TO_TICKS(100));
-    }
-    
-    /* Start UART reception */
-    uart_trans_start(UART_CHANNEL_CLIENT);
-    
-    while (1)
-    {
-        /* Check for data from TCP to send to UART */
-        if (!ctx->tx_busy && ctx->rx_stream != NULL)
-        {
-            len = xStreamBufferReceive(ctx->rx_stream, tx_buffer, 
-                                       sizeof(tx_buffer), pdMS_TO_TICKS(10));
-            if (len > 0)
-            {
-                /* Copy to DMA buffer and send */
-                memcpy(ctx->tx_dma_buffer, tx_buffer, len);
-                ctx->tx_busy = true;
-                
-                if (HAL_UART_Transmit_DMA(ctx->huart, ctx->tx_dma_buffer, len) != HAL_OK)
-                {
-                    ctx->tx_busy = false;
-                    ctx->stats.errors++;
-                }
-                else
-                {
-                    ctx->stats.tx_bytes += len;
-                    ctx->stats.tx_packets++;
-                }
-            }
-        }
-        else
-        {
-            /* TX busy or no stream, wait a bit */
-            vTaskDelay(pdMS_TO_TICKS(1));
-        }
-    }
+    g_channels[channel].stats.tx_bytes += g_channels[channel].tx_dma_len;
+    g_channels[channel].tx_dma_len = 0u;
+    kick_tx(channel);
 }

App/uart_trans.h

@@ -1,151 +1,69 @@
 /**
  * @file uart_trans.h
- * @brief UART transparent transmission module for TCP2UART
- * 
- * - UART2 <-> TCP Server (via StreamBuffer)
- * - UART3 <-> TCP Client (via StreamBuffer)
- * - DMA + IDLE interrupt for efficient reception
+ * @brief Bare-metal UART DMA/IDLE transport layer.
  */
 
 #ifndef __UART_TRANS_H__
 #define __UART_TRANS_H__
 
-#include <stdint.h>
 #include <stdbool.h>
+#include <stdint.h>
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-/* UART channel definitions */
 typedef enum {
-    UART_CHANNEL_SERVER = 0,    /* UART2 - TCP Server channel */
-    UART_CHANNEL_CLIENT = 1,    /* UART3 - TCP Client channel */
+    UART_CHANNEL_SERVER = 0,
+    UART_CHANNEL_CLIENT = 1,
     UART_CHANNEL_MAX
 } uart_channel_t;
 
-/* DMA buffer sizes */
-#define UART_RX_DMA_BUFFER_SIZE     128
-#define UART_TX_DMA_BUFFER_SIZE     128
+#define UART_RX_DMA_BUFFER_SIZE   128u
+#define UART_TX_DMA_BUFFER_SIZE   128u
+#define UART_RX_RING_BUFFER_SIZE  512u
+#define UART_TX_RING_BUFFER_SIZE  512u
 
-/* UART configuration */
 typedef struct {
     uint32_t baudrate;
-    uint8_t  data_bits;     /* 8 or 9 */
-    uint8_t  stop_bits;     /* 1 or 2 */
-    uint8_t  parity;        /* 0=None, 1=Odd, 2=Even */
+    uint8_t data_bits;
+    uint8_t stop_bits;
+    uint8_t parity;
 } uart_config_t;
 
-/* Default configurations */
-#define UART_DEFAULT_BAUDRATE       115200
-#define UART_DEFAULT_DATA_BITS      8
-#define UART_DEFAULT_STOP_BITS      1
-#define UART_DEFAULT_PARITY         0
+#define UART_DEFAULT_BAUDRATE   115200u
+#define UART_DEFAULT_DATA_BITS  8u
+#define UART_DEFAULT_STOP_BITS  1u
+#define UART_DEFAULT_PARITY     0u
 
-/* UART statistics */
 typedef struct {
     uint32_t rx_bytes;
     uint32_t tx_bytes;
     uint32_t rx_packets;
     uint32_t tx_packets;
+    uint32_t idle_events;
+    uint32_t rx_half_events;
+    uint32_t rx_full_events;
     uint32_t errors;
 } uart_stats_t;
 
-/**
- * @brief Initialize UART transparent transmission module
- * @return 0 on success, negative on error
- */
 int uart_trans_init(void);
-
-/**
- * @brief Configure UART channel parameters
- * @param channel UART channel (SERVER or CLIENT)
- * @param config UART configuration
- * @return 0 on success, negative on error
- */
 int uart_trans_config(uart_channel_t channel, const uart_config_t *config);
-
-/**
- * @brief Start UART reception (enable DMA + IDLE interrupt)
- * @param channel UART channel
- * @return 0 on success, negative on error
- */
 int uart_trans_start(uart_channel_t channel);
-
-/**
- * @brief Stop UART reception
- * @param channel UART channel
- * @return 0 on success, negative on error
- */
 int uart_trans_stop(uart_channel_t channel);
-
-/**
- * @brief Set StreamBuffer handles for TCP integration
- * @param channel UART channel
- * @param rx_stream StreamBuffer to receive data from TCP (for UART TX)
- * @param tx_stream StreamBuffer to send data to TCP (from UART RX)
- */
-void uart_trans_set_streams(uart_channel_t channel, 
-                            void *rx_stream, 
-                            void *tx_stream);
-
-/**
- * @brief Get UART statistics
- * @param channel UART channel
- * @param stats Pointer to statistics structure
- */
+void uart_trans_poll(void);
+uint16_t uart_trans_rx_available(uart_channel_t channel);
+uint16_t uart_trans_read(uart_channel_t channel, uint8_t *data, uint16_t max_len);
+uint16_t uart_trans_write(uart_channel_t channel, const uint8_t *data, uint16_t len);
 void uart_trans_get_stats(uart_channel_t channel, uart_stats_t *stats);
-
-/**
- * @brief Reset UART statistics
- * @param channel UART channel
- */
 void uart_trans_reset_stats(uart_channel_t channel);
-
-/**
- * @brief UART IDLE interrupt handler - call from stm32f1xx_it.c
- * @param channel UART channel
- * 
- * Usage in stm32f1xx_it.c USART2_IRQHandler:
- *   if (__HAL_UART_GET_FLAG(&huart2, UART_FLAG_IDLE)) {
- *       __HAL_UART_CLEAR_IDLEFLAG(&huart2);
- *       uart_trans_idle_handler(UART_CHANNEL_SERVER);
- *   }
- */
 void uart_trans_idle_handler(uart_channel_t channel);
-
-/**
- * @brief UART DMA RX half complete callback - call from HAL callback
- * @param channel UART channel
- */
 void uart_trans_rx_half_cplt_handler(uart_channel_t channel);
-
-/**
- * @brief UART DMA RX complete callback - call from HAL callback
- * @param channel UART channel
- */
 void uart_trans_rx_cplt_handler(uart_channel_t channel);
-
-/**
- * @brief UART DMA TX complete callback - call from HAL callback
- * @param channel UART channel
- */
 void uart_trans_tx_cplt_handler(uart_channel_t channel);
 
-/**
- * @brief Server transparent transmission task (UART2 <-> TCP Server)
- * @param argument Task argument (unused)
- */
-void uart_server_trans_task(void *argument);
-
-/**
- * @brief Client transparent transmission task (UART3 <-> TCP Client)
- * @param argument Task argument (unused)
- */
-void uart_client_trans_task(void *argument);
-
 #ifdef __cplusplus
 }
 #endif
 
-#endif /* __UART_TRANS_H__ */
+#endif

CMakeLists.txt

@@ -0,0 +1,68 @@
+cmake_minimum_required(VERSION 3.22)
+
+#
+# This file is generated only once,
+# and is not re-generated if converter is called multiple times.
+#
+# User is free to modify the file as much as necessary
+#
+
+# Setup compiler settings
+set(CMAKE_C_STANDARD 11)
+set(CMAKE_C_STANDARD_REQUIRED ON)
+set(CMAKE_C_EXTENSIONS ON)
+
+
+# Define the build type
+if(NOT CMAKE_BUILD_TYPE)
+    set(CMAKE_BUILD_TYPE "Debug")
+endif()
+
+# Set the project name
+set(CMAKE_PROJECT_NAME TCP2UART)
+
+# Enable compile command to ease indexing with e.g. clangd
+set(CMAKE_EXPORT_COMPILE_COMMANDS TRUE)
+
+# Core project settings
+project(${CMAKE_PROJECT_NAME})
+message("Build type: " ${CMAKE_BUILD_TYPE})
+
+# Enable CMake support for ASM and C languages
+enable_language(C ASM)
+
+# Create an executable object type
+add_executable(${CMAKE_PROJECT_NAME})
+
+# Add STM32CubeMX generated sources
+add_subdirectory(cmake/stm32cubemx)
+
+# Link directories setup
+target_link_directories(${CMAKE_PROJECT_NAME} PRIVATE
+    # Add user defined library search paths
+)
+
+# Add sources to executable
+target_sources(${CMAKE_PROJECT_NAME} PRIVATE
+    # Add user sources here
+)
+
+# Add include paths
+target_include_directories(${CMAKE_PROJECT_NAME} PRIVATE
+    # Add user defined include paths
+)
+
+# Add project symbols (macros)
+target_compile_definitions(${CMAKE_PROJECT_NAME} PRIVATE
+    # Add user defined symbols
+)
+
+# Remove wrong libob.a library dependency when using cpp files
+list(REMOVE_ITEM CMAKE_C_IMPLICIT_LINK_LIBRARIES ob)
+
+# Add linked libraries
+target_link_libraries(${CMAKE_PROJECT_NAME}
+    stm32cubemx
+
+    # Add user defined libraries
+)

CMakePresets.json

@@ -0,0 +1,38 @@
+{
+    "version": 3,
+    "configurePresets": [
+        {
+            "name": "default",
+            "hidden": true,
+            "generator": "Ninja",
+            "binaryDir": "${sourceDir}/build/${presetName}",
+		    "toolchainFile": "${sourceDir}/cmake/gcc-arm-none-eabi.cmake",
+            "cacheVariables": {
+            }
+        },
+        {
+            "name": "Debug",
+            "inherits": "default",
+            "cacheVariables": {
+                "CMAKE_BUILD_TYPE": "Debug"
+            }
+        },
+        {
+            "name": "Release",
+            "inherits": "default",
+            "cacheVariables": {
+                "CMAKE_BUILD_TYPE": "Release"
+            }
+        }
+    ],
+    "buildPresets": [
+        {
+            "name": "Debug",
+            "configurePreset": "Debug"
+        },
+        {
+            "name": "Release",
+            "configurePreset": "Release"
+        }
+    ]
+}

Core/Inc/main.h

@@ -53,6 +53,7 @@ extern "C" {
 void Error_Handler(void);
 
 /* USER CODE BEGIN EFP */
+void Debug_TrapWithRttHint(const char *tag);
 
 /* USER CODE END EFP */
 

Core/Inc/stm32f1xx_hal_conf.h

@@ -64,7 +64,7 @@
 /*#define HAL_SMARTCARD_MODULE_ENABLED   */
 #define HAL_SPI_MODULE_ENABLED
 /*#define HAL_SRAM_MODULE_ENABLED   */
-/*#define HAL_TIM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
 #define HAL_UART_MODULE_ENABLED
 /*#define HAL_USART_MODULE_ENABLED   */
 /*#define HAL_WWDG_MODULE_ENABLED   */

Core/Inc/stm32f1xx_it.h

@@ -59,6 +59,7 @@ void DMA1_Channel4_IRQHandler(void);
 void DMA1_Channel5_IRQHandler(void);
 void DMA1_Channel6_IRQHandler(void);
 void DMA1_Channel7_IRQHandler(void);
+void TIM4_IRQHandler(void);
 void SPI1_IRQHandler(void);
 void USART1_IRQHandler(void);
 void USART2_IRQHandler(void);

Core/Inc/tim.h

@@ -0,0 +1,41 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    tim.h
+  * @brief   This file contains all the function prototypes for the tim.c file
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __TIM_H__
+#define __TIM_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern TIM_HandleTypeDef htim4;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_TIM4_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __TIM_H__ */
+

Core/Src/freertos.c

@@ -1,370 +0,0 @@
-/* USER CODE BEGIN Header */
-/**
-  ******************************************************************************
-  * File Name          : freertos.c
-  * Description        : Code for freertos applications
-  ******************************************************************************
-  * @attention
-  *
-  * Copyright (c) 2026 STMicroelectronics.
-  * All rights reserved.
-  *
-  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *
-  ******************************************************************************
-  */
-/* USER CODE END Header */
-
-/* Includes ------------------------------------------------------------------*/
-#include "FreeRTOS.h"
-#include "task.h"
-#include "main.h"
-#include "cmsis_os.h"
-
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
-#include "semphr.h"
-#include "stream_buffer.h"
-
-/* Application modules */
-#include "tcp_server.h"
-#include "tcp_client.h"
-#include "uart_trans.h"
-#include "config.h"
-#include "ethernetif.h"
-
-/* LwIP includes */
-#include "lwip/tcpip.h"
-#include "lwip/ip4_addr.h"
-#include "lwip/dhcp.h"
-#include "lwip/timeouts.h"
-/* USER CODE END Includes */
-
-/* Private typedef -----------------------------------------------------------*/
-/* USER CODE BEGIN PTD */
-
-/* USER CODE END PTD */
-
-/* Private define ------------------------------------------------------------*/
-/* USER CODE BEGIN PD */
-/* Task stack sizes (words, not bytes) */
-#define LWIP_TASK_STACK_SIZE        384
-#define TCP_SERVER_TASK_STACK_SIZE  320
-#define TCP_CLIENT_TASK_STACK_SIZE  320
-#define UART_TRANS_TASK_STACK_SIZE  192
-#define CONFIG_TASK_STACK_SIZE      256
-#define DEFAULT_TASK_STACK_SIZE     128
-
-/* Task priorities */
-#define LWIP_TASK_PRIORITY          (osPriorityAboveNormal)
-#define TCP_SERVER_TASK_PRIORITY    (osPriorityNormal)
-#define TCP_CLIENT_TASK_PRIORITY    (osPriorityNormal)
-#define UART_TRANS_TASK_PRIORITY    (osPriorityNormal)
-#define CONFIG_TASK_PRIORITY        (osPriorityBelowNormal)
-#define DEFAULT_TASK_PRIORITY       (osPriorityLow)
-/* USER CODE END PD */
-
-/* Private macro -------------------------------------------------------------*/
-/* USER CODE BEGIN PM */
-
-/* USER CODE END PM */
-
-/* Private variables ---------------------------------------------------------*/
-/* USER CODE BEGIN Variables */
-/* Task handles */
-TaskHandle_t lwipTaskHandle = NULL;
-TaskHandle_t tcpServerTaskHandle = NULL;
-TaskHandle_t tcpClientTaskHandle = NULL;
-TaskHandle_t uartServerTransTaskHandle = NULL;
-TaskHandle_t uartClientTransTaskHandle = NULL;
-TaskHandle_t configTaskHandle = NULL;
-
-/* SPI mutex for CH390 access */
-SemaphoreHandle_t ch390SpiMutex = NULL;
-
-/* CH390 interrupt notification semaphore */
-SemaphoreHandle_t ch390IntSemaphore = NULL;
-/* USER CODE END Variables */
-
-/* Definitions for defaultTask */
-osThreadId_t defaultTaskHandle;
-const osThreadAttr_t defaultTask_attributes = {
-  .name = "defaultTask",
-  .stack_size = DEFAULT_TASK_STACK_SIZE * 4,
-  .priority = (osPriority_t) DEFAULT_TASK_PRIORITY,
-};
-
-/* Private function prototypes -----------------------------------------------*/
-/* USER CODE BEGIN FunctionPrototypes */
-void LwIPTask(void *argument);
-/* USER CODE END FunctionPrototypes */
-
-void StartDefaultTask(void *argument);
-
-void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */
-
-/**
-  * @brief  FreeRTOS initialization
-  * @param  None
-  * @retval None
-  */
-void MX_FREERTOS_Init(void) {
-  /* USER CODE BEGIN Init */
-
-  /* USER CODE END Init */
-
-  /* USER CODE BEGIN RTOS_MUTEX */
-  /* Create SPI mutex for CH390 access */
-  ch390SpiMutex = xSemaphoreCreateMutex();
-  configASSERT(ch390SpiMutex != NULL);
-  /* USER CODE END RTOS_MUTEX */
-
-  /* USER CODE BEGIN RTOS_SEMAPHORES */
-  /* Create CH390 interrupt notification semaphore */
-  ch390IntSemaphore = xSemaphoreCreateBinary();
-  configASSERT(ch390IntSemaphore != NULL);
-  /* USER CODE END RTOS_SEMAPHORES */
-
-  /* USER CODE BEGIN RTOS_TIMERS */
-  /* start timers, add new ones, ... */
-  /* USER CODE END RTOS_TIMERS */
-
-  /* USER CODE BEGIN RTOS_QUEUES */
-  /* add queues, ... */
-  /* USER CODE END RTOS_QUEUES */
-
-  /* Create the thread(s) */
-  /* creation of defaultTask */
-  defaultTaskHandle = osThreadNew(StartDefaultTask, NULL, &defaultTask_attributes);
-
-  /* USER CODE BEGIN RTOS_THREADS */
-  BaseType_t task_created;
-
-  /* Create LwIP task (handles network stack + TCP server/client) */
-  task_created = xTaskCreate(LwIPTask, "LwIP", LWIP_TASK_STACK_SIZE, NULL,
-                             tskIDLE_PRIORITY + 3, &lwipTaskHandle);
-  configASSERT(task_created == pdPASS);
-  
-  /* Create TCP Server task */
-  task_created = xTaskCreate(tcp_server_task, "TCPServer", TCP_SERVER_TASK_STACK_SIZE, NULL,
-                             tskIDLE_PRIORITY + 2, &tcpServerTaskHandle);
-  configASSERT(task_created == pdPASS);
-  
-  /* Create TCP Client task */
-  task_created = xTaskCreate(tcp_client_task, "TCPClient", TCP_CLIENT_TASK_STACK_SIZE, NULL,
-                             tskIDLE_PRIORITY + 2, &tcpClientTaskHandle);
-  configASSERT(task_created == pdPASS);
-  
-  /* Create UART Server transparent transmission task */
-  task_created = xTaskCreate(uart_server_trans_task, "UartSrvTx", UART_TRANS_TASK_STACK_SIZE, NULL,
-                             tskIDLE_PRIORITY + 2, &uartServerTransTaskHandle);
-  configASSERT(task_created == pdPASS);
-  
-  /* Create UART Client transparent transmission task */
-  task_created = xTaskCreate(uart_client_trans_task, "UartCliTx", UART_TRANS_TASK_STACK_SIZE, NULL,
-                             tskIDLE_PRIORITY + 2, &uartClientTransTaskHandle);
-  configASSERT(task_created == pdPASS);
-  
-  /* Create Configuration task (AT commands via UART1) */
-  task_created = xTaskCreate(config_task, "Config", CONFIG_TASK_STACK_SIZE, NULL,
-                             tskIDLE_PRIORITY + 1, &configTaskHandle);
-  configASSERT(task_created == pdPASS);
-  /* USER CODE END RTOS_THREADS */
-
-  /* USER CODE BEGIN RTOS_EVENTS */
-  /* add events, ... */
-  /* USER CODE END RTOS_EVENTS */
-
-}
-
-/* USER CODE BEGIN Header_StartDefaultTask */
-/**
-  * @brief  Function implementing the defaultTask thread.
-  *         LED blinking for system status indication.
-  * @param  argument: Not used
-  * @retval None
-  */
-/* USER CODE END Header_StartDefaultTask */
-void StartDefaultTask(void *argument)
-{
-  /* USER CODE BEGIN StartDefaultTask */
-  (void)argument;
-  
-  /* Infinite loop - LED heartbeat */
-  for(;;)
-  {
-    /* Toggle LED (PC13, active low) */
-    HAL_GPIO_TogglePin(GPIOC, GPIO_PIN_13);
-    
-    /* 500ms toggle = 1Hz blink rate */
-    osDelay(500);
-  }
-  /* USER CODE END StartDefaultTask */
-}
-
-/* Private application code --------------------------------------------------*/
-/* USER CODE BEGIN Application */
-
-/**
- * @brief LwIP task - handles network stack initialization and processing
- */
-void LwIPTask(void *argument)
-{
-    (void)argument;
-    
-    ip4_addr_t ipaddr, netmask, gw;
-    uart_config_t uart_server_cfg;
-    uart_config_t uart_client_cfg;
-    uint8_t use_dhcp = 0;
-    const device_config_t *cfg;
-    
-    /* Wait for configuration to be loaded */
-    vTaskDelay(pdMS_TO_TICKS(100));
-    
-    /* Get device configuration */
-    cfg = config_get();
-    
-    /* Initialize UART transparent transmission module */
-    uart_trans_init();
-
-    /* Apply UART settings from configuration */
-    uart_server_cfg.baudrate = UART_DEFAULT_BAUDRATE;
-    uart_server_cfg.data_bits = UART_DEFAULT_DATA_BITS;
-    uart_server_cfg.stop_bits = UART_DEFAULT_STOP_BITS;
-    uart_server_cfg.parity = UART_DEFAULT_PARITY;
-
-    uart_client_cfg.baudrate = UART_DEFAULT_BAUDRATE;
-    uart_client_cfg.data_bits = UART_DEFAULT_DATA_BITS;
-    uart_client_cfg.stop_bits = UART_DEFAULT_STOP_BITS;
-    uart_client_cfg.parity = UART_DEFAULT_PARITY;
-
-    if (cfg != NULL)
-    {
-        uart_server_cfg.baudrate = cfg->uart2_baudrate;
-        uart_server_cfg.data_bits = cfg->uart2_databits;
-        uart_server_cfg.stop_bits = cfg->uart2_stopbits;
-        uart_server_cfg.parity = cfg->uart2_parity;
-
-        uart_client_cfg.baudrate = cfg->uart3_baudrate;
-        uart_client_cfg.data_bits = cfg->uart3_databits;
-        uart_client_cfg.stop_bits = cfg->uart3_stopbits;
-        uart_client_cfg.parity = cfg->uart3_parity;
-    }
-
-    (void)uart_trans_config(UART_CHANNEL_SERVER, &uart_server_cfg);
-    (void)uart_trans_config(UART_CHANNEL_CLIENT, &uart_client_cfg);
-    
-    /* Wait for TCP tasks to initialize their StreamBuffers */
-    /* TCP Server and TCP Client tasks call tcp_server_init() / tcp_client_init() */
-    /* which create the StreamBuffers. We need to wait until they're ready. */
-    while (tcp_server_get_rx_stream() == NULL ||
-           tcp_server_get_tx_stream() == NULL ||
-           tcp_client_get_rx_stream() == NULL ||
-           tcp_client_get_tx_stream() == NULL)
-    {
-        vTaskDelay(pdMS_TO_TICKS(50));
-    }
-    
-    /* Connect StreamBuffers between TCP and UART modules */
-    /* Server: TCP Server RX -> UART2 TX, UART2 RX -> TCP Server TX */
-    uart_trans_set_streams(UART_CHANNEL_SERVER,
-                           tcp_server_get_rx_stream(),  /* TCP RX -> UART TX */
-                           tcp_server_get_tx_stream()); /* UART RX -> TCP TX */
-    
-    /* Client: TCP Client RX -> UART3 TX, UART3 RX -> TCP Client TX */
-    uart_trans_set_streams(UART_CHANNEL_CLIENT,
-                           tcp_client_get_rx_stream(),  /* TCP RX -> UART TX */
-                           tcp_client_get_tx_stream()); /* UART RX -> TCP TX */
-    
-    /* Initialize LwIP stack (calls tcpip_init internally) */
-    tcpip_init(NULL, NULL);
-    
-    /* Wait for tcpip thread to initialize */
-    vTaskDelay(pdMS_TO_TICKS(100));
-    
-    /* Set IP addresses */
-    if (cfg != NULL && cfg->dhcp_enable != 0)
-    {
-        use_dhcp = 1;
-        IP4_ADDR(&ipaddr, 0, 0, 0, 0);
-        IP4_ADDR(&netmask, 0, 0, 0, 0);
-        IP4_ADDR(&gw, 0, 0, 0, 0);
-    }
-    else if (cfg != NULL)
-    {
-        IP4_ADDR(&ipaddr, cfg->ip[0], cfg->ip[1], cfg->ip[2], cfg->ip[3]);
-        IP4_ADDR(&netmask, cfg->mask[0], cfg->mask[1], cfg->mask[2], cfg->mask[3]);
-        IP4_ADDR(&gw, cfg->gw[0], cfg->gw[1], cfg->gw[2], cfg->gw[3]);
-    }
-    else
-    {
-        /* Default IP if no config */
-        IP4_ADDR(&ipaddr, 192, 168, 1, 200);
-        IP4_ADDR(&netmask, 255, 255, 255, 0);
-        IP4_ADDR(&gw, 192, 168, 1, 1);
-    }
-    
-    /* Initialize network interface */
-    lwip_netif_init(&ipaddr, &netmask, &gw);
-
-    if (use_dhcp)
-    {
-        dhcp_start(&ch390_netif);
-    }
-    
-    /* Main loop - handle network events */
-    for (;;)
-    {
-        /* Wait for CH390 interrupt or timeout */
-        if (xSemaphoreTake(ch390IntSemaphore, pdMS_TO_TICKS(10)) == pdTRUE)
-        {
-            /* Process network input - poll all pending packets */
-            ethernetif_poll();
-        }
-        
-        /* Check link status periodically */
-        ethernetif_check_link();
-    }
-}
-
-/**
- * @brief Get SPI mutex handle for CH390 driver
- */
-SemaphoreHandle_t get_ch390_spi_mutex(void)
-{
-    return ch390SpiMutex;
-}
-
-/**
- * @brief Notify LwIP task of CH390 interrupt (call from ISR)
- */
-void notify_ch390_interrupt_from_isr(void)
-{
-    BaseType_t xHigherPriorityTaskWoken = pdFALSE;
-    
-    if (ch390IntSemaphore != NULL)
-    {
-        xSemaphoreGiveFromISR(ch390IntSemaphore, &xHigherPriorityTaskWoken);
-        portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
-    }
-}
-
-/**
- * @brief Get UART Server transparent task handle
- */
-TaskHandle_t get_uart_server_task_handle(void)
-{
-    return uartServerTransTaskHandle;
-}
-
-/**
- * @brief Get UART Client transparent task handle
- */
-TaskHandle_t get_uart_client_task_handle(void)
-{
-    return uartClientTransTaskHandle;
-}
-
-/* USER CODE END Application */

Core/Src/gpio.c

@@ -56,6 +56,9 @@ void MX_GPIO_Init(void)
   /*Configure GPIO pin Output Level */
   HAL_GPIO_WritePin(GPIOB, GPIO_PIN_1, GPIO_PIN_RESET);
 
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_SET);
+
   /*Configure GPIO pin : PC13 */
   GPIO_InitStruct.Pin = GPIO_PIN_13;
   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
@@ -65,7 +68,7 @@ void MX_GPIO_Init(void)
 
   /*Configure GPIO pin : PB0 */
   GPIO_InitStruct.Pin = GPIO_PIN_0;
-  GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
+  GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
   GPIO_InitStruct.Pull = GPIO_NOPULL;
   HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 
@@ -76,6 +79,17 @@ void MX_GPIO_Init(void)
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
   HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 
+  /*Configure GPIO pin : PA4 */
+  GPIO_InitStruct.Pin = GPIO_PIN_4;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* EXTI interrupt init*/
+  HAL_NVIC_SetPriority(EXTI0_IRQn, 6, 0);
+  HAL_NVIC_EnableIRQ(EXTI0_IRQn);
+
 }
 
 /* USER CODE BEGIN 2 */

Core/Src/main.c

@@ -18,20 +18,28 @@
 /* USER CODE END Header */
 /* Includes ------------------------------------------------------------------*/
 #include "main.h"
-#include "cmsis_os.h"
 #include "dma.h"
 #include "iwdg.h"
 #include "spi.h"
+#include "tim.h"
 #include "usart.h"
 #include "gpio.h"
 
 /* Private includes ----------------------------------------------------------*/
 /* USER CODE BEGIN Includes */
 #include <stdio.h>
+#include <string.h>
 
 #include "CH390.h"
+#include "CH390_Interface.h"
+#include "SEGGER_RTT.h"
 #include "config.h"
 #include "flash_param.h"
+#include "ethernetif.h"
+#include "lwip/init.h"
+#include "lwip/timeouts.h"
+#include "tcp_client.h"
+#include "tcp_server.h"
 #include "uart_trans.h"
 /* USER CODE END Includes */
 
@@ -61,15 +69,22 @@
 /* Private variables ---------------------------------------------------------*/
 
 /* USER CODE BEGIN PV */
+static volatile uint16_t g_led_blink_ticks = 0;
+static uint8_t g_clock_fallback_to_hsi = 0u;
+volatile uint8_t g_uart1_rx_probe_byte = 0u;
 
 /* USER CODE END PV */
 
 /* Private function prototypes -----------------------------------------------*/
 void SystemClock_Config(void);
-void MX_FREERTOS_Init(void);
 /* USER CODE BEGIN PFP */
 static void CH390_HardwareReset(void);
 static void LED_Init(void);
+static void LED_StartBlink(void);
+static void BootDiag_ReportCh390(void);
+static void App_PollUart1ConfigRx(void);
+static void App_Init(void);
+static void App_Poll(void);
 /* USER CODE END PFP */
 
 /* Private user code ---------------------------------------------------------*/
@@ -102,6 +117,13 @@ static void LED_Init(void)
     HAL_GPIO_WritePin(LED_PORT, LED_PIN, GPIO_PIN_SET);
 }
 
+static void LED_StartBlink(void)
+{
+    if (HAL_TIM_Base_Start_IT(&htim4) != HAL_OK) {
+        Error_Handler();
+    }
+}
+
 /**
  * @brief LED 闪烁（用于指示系统运行状态）
  */
@@ -110,6 +132,190 @@ void LED_Toggle(void)
     HAL_GPIO_TogglePin(LED_PORT, LED_PIN);
 }
 
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+    if (htim->Instance == TIM4) {
+        g_led_blink_ticks++;
+        if (g_led_blink_ticks >= 1000u) {
+            g_led_blink_ticks = 0u;
+            LED_Toggle();
+        }
+    }
+}
+
+static void BootDiag_ReportCh390(void)
+{
+    uint16_t vendor_id;
+    uint16_t product_id;
+    uint8_t revision;
+    uint8_t nsr;
+    uint8_t ncr;
+    uint8_t rcr;
+    uint8_t imr;
+    uint8_t intcr;
+    uint8_t gpr;
+    uint8_t isr;
+    uint8_t ncr_before;
+    uint8_t ncr_after;
+    uint8_t intcr_before;
+    uint8_t intcr_after;
+    int link_status;
+
+    vendor_id = ch390_get_vendor_id();
+    product_id = ch390_get_product_id();
+    revision = ch390_get_revision();
+    nsr = ch390_read_reg(CH390_NSR);
+    ncr = ch390_read_reg(CH390_NCR);
+    rcr = ch390_read_reg(CH390_RCR);
+    imr = ch390_read_reg(CH390_IMR);
+    intcr = ch390_read_reg(CH390_INTCR);
+    gpr = ch390_read_reg(CH390_GPR);
+    isr = ch390_read_reg(CH390_ISR);
+    link_status = ch390_get_link_status();
+
+    ncr_before = ncr;
+    ch390_write_reg(CH390_NCR, (uint8_t)(ncr_before ^ NCR_FDX));
+    ncr_after = ch390_read_reg(CH390_NCR);
+    ch390_write_reg(CH390_NCR, ncr_before);
+
+    intcr_before = intcr;
+    ch390_write_reg(CH390_INTCR, (uint8_t)(INCR_TYPE_OD | INCR_POL_L));
+    intcr_after = ch390_read_reg(CH390_INTCR);
+    ch390_write_reg(CH390_INTCR, intcr_before);
+
+    SEGGER_RTT_printf(0,
+                      "CH390 VID=0x%04X PID=0x%04X REV=0x%02X NSR=0x%02X LINK=%d\r\n",
+                      vendor_id,
+                      product_id,
+                      revision,
+                      nsr,
+                      link_status);
+    SEGGER_RTT_printf(0,
+                      "CH390 NCR=0x%02X RCR=0x%02X IMR=0x%02X INTCR=0x%02X GPR=0x%02X ISR=0x%02X\r\n",
+                      ncr,
+                      rcr,
+                      imr,
+                      intcr,
+                      gpr,
+                      isr);
+    SEGGER_RTT_printf(0,
+                      "CH390 WRCHK NCR:0x%02X->0x%02X INTCR:0x%02X->0x%02X\r\n",
+                      ncr_before,
+                      ncr_after,
+                      intcr_before,
+                      intcr_after);
+}
+
+static void App_PollUart1ConfigRx(void)
+{
+    while (__HAL_UART_GET_FLAG(&huart1, UART_FLAG_RXNE) != RESET) {
+        uint8_t byte = (uint8_t)(huart1.Instance->DR & 0xFFu);
+        config_uart_rx_byte(byte);
+    }
+}
+
+static void App_Init(void)
+{
+    const device_config_t *cfg;
+    ip4_addr_t ipaddr;
+    ip4_addr_t netmask;
+    ip4_addr_t gateway;
+    uart_config_t uart_cfg;
+    tcp_server_config_t server_cfg;
+    tcp_client_config_t client_cfg;
+
+    config_init();
+    cfg = config_get();
+
+    uart_trans_init();
+
+    uart_cfg.baudrate = cfg->uart2_baudrate;
+    uart_cfg.data_bits = cfg->uart2_databits;
+    uart_cfg.stop_bits = cfg->uart2_stopbits;
+    uart_cfg.parity = cfg->uart2_parity;
+    uart_trans_config(UART_CHANNEL_SERVER, &uart_cfg);
+
+    uart_cfg.baudrate = cfg->uart3_baudrate;
+    uart_cfg.data_bits = cfg->uart3_databits;
+    uart_cfg.stop_bits = cfg->uart3_stopbits;
+    uart_cfg.parity = cfg->uart3_parity;
+    uart_trans_config(UART_CHANNEL_CLIENT, &uart_cfg);
+
+    uart_trans_start(UART_CHANNEL_SERVER);
+    uart_trans_start(UART_CHANNEL_CLIENT);
+
+    SEGGER_RTT_Init();
+    SEGGER_RTT_WriteString(0, "\r\nTCP2UART boot\r\n");
+    if (g_clock_fallback_to_hsi != 0u) {
+        SEGGER_RTT_WriteString(0, "WARN: HSE start failed, fallback to HSI PLL\r\n");
+    }
+
+    lwip_init();
+    IP4_ADDR(&ipaddr, cfg->ip[0], cfg->ip[1], cfg->ip[2], cfg->ip[3]);
+    IP4_ADDR(&netmask, cfg->mask[0], cfg->mask[1], cfg->mask[2], cfg->mask[3]);
+    IP4_ADDR(&gateway, cfg->gw[0], cfg->gw[1], cfg->gw[2], cfg->gw[3]);
+    lwip_netif_init(&ipaddr, &netmask, &gateway);
+    BootDiag_ReportCh390();
+
+    server_cfg.port = cfg->server_port;
+    server_cfg.auto_reconnect = true;
+    tcp_server_init(&server_cfg);
+    tcp_server_start();
+
+    memcpy(client_cfg.server_ip, cfg->remote_ip, sizeof(client_cfg.server_ip));
+    client_cfg.server_port = cfg->remote_port;
+    client_cfg.auto_reconnect = true;
+    client_cfg.reconnect_interval_ms = cfg->reconnect_interval;
+    tcp_client_init(&client_cfg);
+    tcp_client_connect();
+
+    /* Arm UART1 RX interrupt path so config commands can enter via USART1. */
+    if (HAL_UART_Receive_IT(&huart1, (uint8_t *)&g_uart1_rx_probe_byte, 1u) != HAL_OK) {
+        Error_Handler();
+    }
+}
+
+static void App_Poll(void)
+{
+    uint8_t buffer[128];
+    int len;
+
+    ethernetif_poll();
+    ethernetif_check_link();
+    sys_check_timeouts();
+    tcp_client_poll();
+    uart_trans_poll();
+    App_PollUart1ConfigRx();
+    config_poll();
+
+    len = tcp_server_recv(buffer, sizeof(buffer), 0u);
+    if (len > 0) {
+        uart_trans_write(UART_CHANNEL_SERVER, buffer, (uint16_t)len);
+    }
+
+    len = tcp_client_recv(buffer, sizeof(buffer), 0u);
+    if (len > 0) {
+        uart_trans_write(UART_CHANNEL_CLIENT, buffer, (uint16_t)len);
+    }
+
+    len = (int)uart_trans_read(UART_CHANNEL_SERVER, buffer, sizeof(buffer));
+    if (len > 0) {
+        tcp_server_send(buffer, (uint16_t)len);
+    }
+
+    len = (int)uart_trans_read(UART_CHANNEL_CLIENT, buffer, sizeof(buffer));
+    if (len > 0) {
+        tcp_client_send(buffer, (uint16_t)len);
+    }
+
+    if (config_is_reset_requested()) {
+        config_clear_reset_requested();
+        NVIC_SystemReset();
+    }
+
+    HAL_IWDG_Refresh(&hiwdg);
+}
+
 /* USER CODE END 0 */
 
 /**
@@ -147,28 +353,17 @@ int main(void)
   MX_USART2_UART_Init();
   MX_USART3_UART_Init();
   MX_SPI1_Init();
+  MX_TIM4_Init();
   /* USER CODE BEGIN 2 */
   
   /* LED 初始化 */
   LED_Init();
+  LED_StartBlink();
   
-  /* CH390 硬件复位 */
-  CH390_HardwareReset();
-  
-  /* Initialize configuration from Flash (fallback to defaults on invalid data) */
-  config_init();
+  App_Init();
   
   /* USER CODE END 2 */
 
-  /* Init scheduler */
-  osKernelInitialize();  /* Call init function for freertos objects (in cmsis_os2.c) */
-  MX_FREERTOS_Init();
-
-  /* Start scheduler */
-  osKernelStart();
-
-  /* We should never get here as control is now taken by the scheduler */
-
   /* Infinite loop */
   /* USER CODE BEGIN WHILE */
   while (1)
@@ -176,6 +371,7 @@ int main(void)
     /* USER CODE END WHILE */
 
     /* USER CODE BEGIN 3 */
+    App_Poll();
   }
   /* USER CODE END 3 */
 }
@@ -189,6 +385,8 @@ void SystemClock_Config(void)
   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 
+  g_clock_fallback_to_hsi = 0u;
+
   /** Initializes the RCC Oscillators according to the specified parameters
   * in the RCC_OscInitTypeDef structure.
   */
@@ -200,10 +398,24 @@ void SystemClock_Config(void)
   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
   RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
-  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
-  {
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+    /*
+     * Some bring-up boards fail to start the external crystal cleanly.
+     * Fall back to HSI-based PLL so the firmware can still boot and expose
+     * RTT / debugger evidence instead of trapping during clock init.
+     */
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_HSI;
+    RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
+    RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+    RCC_OscInitStruct.LSIState = RCC_LSI_ON;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
+    RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16;
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
       Error_Handler();
     }
+    g_clock_fallback_to_hsi = 1u;
+  }
 
   /** Initializes the CPU, AHB and APB buses clocks
   */
@@ -228,17 +440,30 @@ void SystemClock_Config(void)
 #ifdef __GNUC__
 int _write(int file, char *ptr, int len)
 {
-    HAL_UART_Transmit(&huart1, (uint8_t *)ptr, len, HAL_MAX_DELAY);
-    return len;
+    (void)file;
+    return (int)SEGGER_RTT_Write(0, ptr, (unsigned)len);
 }
 #else
 int fputc(int ch, FILE *f)
 {
-    HAL_UART_Transmit(&huart1, (uint8_t *)&ch, 1, HAL_MAX_DELAY);
+    (void)f;
+    SEGGER_RTT_PutChar(0, (char)ch);
     return ch;
 }
 #endif
 
+void Debug_TrapWithRttHint(const char *tag)
+{
+    SEGGER_RTT_WriteString(0, "\r\nTRAP: ");
+    SEGGER_RTT_WriteString(0, tag);
+    SEGGER_RTT_WriteString(0, "\r\n");
+    __disable_irq();
+    __BKPT(0);
+    while (1)
+    {
+    }
+}
+
 /* USER CODE END 4 */
 
 /**
@@ -249,10 +474,7 @@ void Error_Handler(void)
 {
   /* USER CODE BEGIN Error_Handler_Debug */
   /* User can add his own implementation to report the HAL error return state */
-  __disable_irq();
-  while (1)
-  {
-  }
+  Debug_TrapWithRttHint("Error_Handler");
   /* USER CODE END Error_Handler_Debug */
 }
 #ifdef USE_FULL_ASSERT
@@ -266,6 +488,9 @@ void Error_Handler(void)
 void assert_failed(uint8_t *file, uint32_t line)
 {
   /* USER CODE BEGIN 6 */
+  (void)file;
+  (void)line;
+  Debug_TrapWithRttHint("assert_failed");
   /* User can add his own implementation to report the file name and line number,
      ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
   /* USER CODE END 6 */

Core/Src/spi.c

@@ -73,7 +73,7 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
 
     __HAL_RCC_GPIOA_CLK_ENABLE();
     /**SPI1 GPIO Configuration
-    PA4     ------> CH390 CS (GPIO Output, controlled by CH390_Interface.c)
+    PA4     ------> GPIO_Output
     PA5     ------> SPI1_SCK
     PA6     ------> SPI1_MISO
     PA7     ------> SPI1_MOSI
@@ -90,7 +90,11 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
     GPIO_InitStruct.Pull = GPIO_NOPULL;
     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
     
-    /* PA4 (CS) is configured as GPIO output in CH390_Interface.c */
+    GPIO_InitStruct.Pin = GPIO_PIN_4;
+    GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
     /* SPI1 interrupt Init */
     HAL_NVIC_SetPriority(SPI1_IRQn, 5, 0);
@@ -113,12 +117,12 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle)
     __HAL_RCC_SPI1_CLK_DISABLE();
 
     /**SPI1 GPIO Configuration
-    PA4     ------> CH390 CS (handled by CH390_Interface.c)
+    PA4     ------> GPIO_Output
     PA5     ------> SPI1_SCK
     PA6     ------> SPI1_MISO
     PA7     ------> SPI1_MOSI
     */
-    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7);
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7);
 
     /* SPI1 interrupt Deinit */
     HAL_NVIC_DisableIRQ(SPI1_IRQn);

Core/Src/stm32f1xx_hal_msp.c

@@ -71,8 +71,6 @@ void HAL_MspInit(void)
   __HAL_RCC_PWR_CLK_ENABLE();
 
   /* System interrupt init*/
-  /* PendSV_IRQn interrupt configuration */
-  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
 
   /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
   */

Core/Src/stm32f1xx_it.c

@@ -20,15 +20,12 @@
 /* Includes ------------------------------------------------------------------*/
 #include "main.h"
 #include "stm32f1xx_it.h"
-#include "FreeRTOS.h"
-#include "task.h"
 /* Private includes ----------------------------------------------------------*/
 /* USER CODE BEGIN Includes */
+#include "ethernetif.h"
+#include "SEGGER_RTT.h"
 #include "uart_trans.h"
 #include "config.h"
-
-/* External functions from freertos.c */
-extern void notify_ch390_interrupt_from_isr(void);
 /* USER CODE END Includes */
 
 /* Private typedef -----------------------------------------------------------*/
@@ -63,6 +60,7 @@ extern void notify_ch390_interrupt_from_isr(void);
 
 /* External variables --------------------------------------------------------*/
 extern SPI_HandleTypeDef hspi1;
+extern TIM_HandleTypeDef htim4;
 extern DMA_HandleTypeDef hdma_usart1_rx;
 extern DMA_HandleTypeDef hdma_usart1_tx;
 extern DMA_HandleTypeDef hdma_usart2_rx;
@@ -88,9 +86,7 @@ void NMI_Handler(void)
 
   /* USER CODE END NonMaskableInt_IRQn 0 */
   /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
-   while (1)
-  {
-  }
+  Debug_TrapWithRttHint("NMI_Handler");
   /* USER CODE END NonMaskableInt_IRQn 1 */
 }
 
@@ -102,11 +98,7 @@ void HardFault_Handler(void)
   /* USER CODE BEGIN HardFault_IRQn 0 */
 
   /* USER CODE END HardFault_IRQn 0 */
-  while (1)
-  {
-    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
-    /* USER CODE END W1_HardFault_IRQn 0 */
-  }
+  Debug_TrapWithRttHint("HardFault_Handler");
 }
 
 /**
@@ -117,11 +109,7 @@ void MemManage_Handler(void)
   /* USER CODE BEGIN MemoryManagement_IRQn 0 */
 
   /* USER CODE END MemoryManagement_IRQn 0 */
-  while (1)
-  {
-    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
-    /* USER CODE END W1_MemoryManagement_IRQn 0 */
-  }
+  Debug_TrapWithRttHint("MemManage_Handler");
 }
 
 /**
@@ -132,11 +120,7 @@ void BusFault_Handler(void)
   /* USER CODE BEGIN BusFault_IRQn 0 */
 
   /* USER CODE END BusFault_IRQn 0 */
-  while (1)
-  {
-    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
-    /* USER CODE END W1_BusFault_IRQn 0 */
-  }
+  Debug_TrapWithRttHint("BusFault_Handler");
 }
 
 /**
@@ -147,11 +131,7 @@ void UsageFault_Handler(void)
   /* USER CODE BEGIN UsageFault_IRQn 0 */
 
   /* USER CODE END UsageFault_IRQn 0 */
-  while (1)
-  {
-    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
-    /* USER CODE END W1_UsageFault_IRQn 0 */
-  }
+  Debug_TrapWithRttHint("UsageFault_Handler");
 }
 
 /**
@@ -176,14 +156,6 @@ void SysTick_Handler(void)
 
   /* USER CODE END SysTick_IRQn 0 */
   HAL_IncTick();
-#if (INCLUDE_xTaskGetSchedulerState == 1 )
-  if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED)
-  {
-#endif /* INCLUDE_xTaskGetSchedulerState */
-  xPortSysTickHandler();
-#if (INCLUDE_xTaskGetSchedulerState == 1 )
-  }
-#endif /* INCLUDE_xTaskGetSchedulerState */
   /* USER CODE BEGIN SysTick_IRQn 1 */
 
   /* USER CODE END SysTick_IRQn 1 */
@@ -280,6 +252,20 @@ void DMA1_Channel7_IRQHandler(void)
   /* USER CODE END DMA1_Channel7_IRQn 1 */
 }
 
+/**
+  * @brief This function handles TIM4 global interrupt.
+  */
+void TIM4_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM4_IRQn 0 */
+
+  /* USER CODE END TIM4_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim4);
+  /* USER CODE BEGIN TIM4_IRQn 1 */
+
+  /* USER CODE END TIM4_IRQn 1 */
+}
+
 /**
   * @brief This function handles SPI1 global interrupt.
   */
@@ -300,12 +286,6 @@ void SPI1_IRQHandler(void)
 void USART1_IRQHandler(void)
 {
   /* USER CODE BEGIN USART1_IRQn 0 */
-  /* Handle IDLE interrupt for configuration */
-  if (__HAL_UART_GET_FLAG(&huart1, UART_FLAG_IDLE))
-  {
-    __HAL_UART_CLEAR_IDLEFLAG(&huart1);
-    config_uart_idle_handler();
-  }
   /* USER CODE END USART1_IRQn 0 */
   HAL_UART_IRQHandler(&huart1);
   /* USER CODE BEGIN USART1_IRQn 1 */
@@ -352,6 +332,8 @@ void USART3_IRQHandler(void)
 }
 
 /* USER CODE BEGIN 1 */
+extern volatile uint8_t g_uart1_rx_probe_byte;
+
 /**
  * @brief This function handles EXTI0 interrupt (CH390D INT pin).
  */
@@ -362,8 +344,8 @@ void EXTI0_IRQHandler(void)
   {
     __HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_0);
 
-    /* Notify LwIP task */
-    notify_ch390_interrupt_from_isr();
+    /* Defer CH390 processing to main loop */
+    ethernetif_set_irq_pending();
   }
 }
 
@@ -387,7 +369,12 @@ void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
   */
 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
 {
-  if (huart == &huart2)
+  if (huart == &huart1)
+  {
+    config_uart_rx_byte(g_uart1_rx_probe_byte);
+    HAL_UART_Receive_IT(&huart1, (uint8_t *)&g_uart1_rx_probe_byte, 1u);
+  }
+  else if (huart == &huart2)
   {
     uart_trans_rx_cplt_handler(UART_CHANNEL_SERVER);
   }

Core/Src/syscalls.c

@@ -0,0 +1,245 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeMX
+ * @brief     Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib or Picolibc libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include "main.h"
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  Debug_TrapWithRttHint("_exit");
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+clock_t _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(const char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}
+
+// --- Picolibc Specific Section ---
+#if defined(__PICOLIBC__)
+
+/**
+ * @brief Picolibc helper function to output a character to a FILE stream.
+ *        This redirects the output to the low-level __io_putchar function.
+ * @param c Character to write.
+ * @param file FILE stream pointer (ignored).
+ * @retval int The character written.
+ */
+static int starm_putc(char c, FILE *file)
+{
+	(void) file;
+  __io_putchar(c);
+	return c;
+}
+
+/**
+ * @brief Picolibc helper function to input a character from a FILE stream.
+ *        This redirects the input from the low-level __io_getchar function.
+ * @param file FILE stream pointer (ignored).
+ * @retval int The character read, cast to an unsigned char then int.
+ */
+static int starm_getc(FILE *file)
+{
+	unsigned char c;
+	(void) file;
+  c = __io_getchar();
+	return c;
+}
+
+// Define and initialize the standard I/O streams for Picolibc.
+// FDEV_SETUP_STREAM connects the starm_putc and starm_getc helper functions to a FILE structure.
+// _FDEV_SETUP_RW indicates the stream is for reading and writing.
+static FILE __stdio = FDEV_SETUP_STREAM(starm_putc,
+					starm_getc,
+					NULL,
+					_FDEV_SETUP_RW);
+
+// Assign the standard stream pointers (stdin, stdout, stderr) to the initialized stream.
+// Picolibc uses these pointers for standard I/O operations (printf, scanf, etc.).
+FILE *const stdin = &__stdio;
+__strong_reference(stdin, stdout);
+__strong_reference(stdin, stderr);
+
+// Create strong aliases mapping standard C library function names (without underscore)
+// to the implemented system call stubs (with underscore). Picolibc uses these
+// standard names internally, so this linking is required.
+__strong_reference(_read, read);
+__strong_reference(_write, write);
+__strong_reference(_times, times);
+__strong_reference(_execve, execve);
+__strong_reference(_fork, fork);
+__strong_reference(_link, link);
+__strong_reference(_unlink, unlink);
+__strong_reference(_stat, stat);
+__strong_reference(_wait, wait);
+__strong_reference(_open, open);
+__strong_reference(_close, close);
+__strong_reference(_lseek, lseek);
+__strong_reference(_isatty, isatty);
+__strong_reference(_fstat, fstat);
+__strong_reference(_exit, exit);
+__strong_reference(_kill, kill);
+__strong_reference(_getpid, getpid);
+
+#endif //__PICOLIBC__

Core/Src/sysmem.c

@@ -0,0 +1,87 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeMX
+ * @brief     System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib or Picolibc libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+#include <stddef.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}
+
+#if defined(__PICOLIBC__)
+  // Picolibc expects syscalls without the leading underscore.
+  // This creates a strong alias so that
+  // calls to `sbrk()` are resolved to our `_sbrk()` implementation.
+  __strong_reference(_sbrk, sbrk);
+#endif

Core/Src/tim.c

@@ -0,0 +1,100 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    tim.c
+  * @brief   This file provides code for the configuration of the TIM instances.
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "tim.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+TIM_HandleTypeDef htim4;
+
+/* TIM4 init function */
+void MX_TIM4_Init(void)
+{
+
+  /* USER CODE BEGIN TIM4_Init 0 */
+
+  /* USER CODE END TIM4_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+  /* USER CODE BEGIN TIM4_Init 1 */
+
+  /* USER CODE END TIM4_Init 1 */
+  htim4.Instance = TIM4;
+  htim4.Init.Prescaler = 7199;
+  htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim4.Init.Period = 9;
+  htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM4_Init 2 */
+
+  /* USER CODE END TIM4_Init 2 */
+
+}
+
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
+{
+
+  if(tim_baseHandle->Instance==TIM4)
+  {
+  /* USER CODE BEGIN TIM4_MspInit 0 */
+
+  /* USER CODE END TIM4_MspInit 0 */
+    /* TIM4 clock enable */
+    __HAL_RCC_TIM4_CLK_ENABLE();
+
+    /* TIM4 interrupt Init */
+    HAL_NVIC_SetPriority(TIM4_IRQn, 6, 0);
+    HAL_NVIC_EnableIRQ(TIM4_IRQn);
+  /* USER CODE BEGIN TIM4_MspInit 1 */
+
+  /* USER CODE END TIM4_MspInit 1 */
+  }
+}
+
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
+{
+
+  if(tim_baseHandle->Instance==TIM4)
+  {
+  /* USER CODE BEGIN TIM4_MspDeInit 0 */
+
+  /* USER CODE END TIM4_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM4_CLK_DISABLE();
+
+    /* TIM4 interrupt Deinit */
+    HAL_NVIC_DisableIRQ(TIM4_IRQn);
+  /* USER CODE BEGIN TIM4_MspDeInit 1 */
+
+  /* USER CODE END TIM4_MspDeInit 1 */
+  }
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */

Drivers/CH390/CH390_Interface.c

@@ -12,6 +12,7 @@
  * Modified for STM32F103 HAL Library with FreeRTOS support.
  ******************************************************************************/
 #include "stm32f1xx_hal.h"
+#include "main.h"
 #include "CH390.h"
 #include "CH390_Interface.h"
 

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f100xb.s

@@ -1,313 +0,0 @@
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
-;* File Name          : startup_stm32f100xb.s
-;* Author             : MCD Application Team
-;* Description        : STM32F100xB Devices vector table for MDK-ARM toolchain. 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Configure the clock system
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;******************************************************************************
-;* @attention
-;*
-;* Copyright (c) 2017-2021 STMicroelectronics.
-;* All rights reserved.
-;*
-;* This software is licensed under terms that can be found in the LICENSE file
-;* in the root directory of this software component.
-;* If no LICENSE file comes with this software, it is provided AS-IS.
-;*
-;******************************************************************************
-
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp                    ; Top of Stack
-                DCD     Reset_Handler                   ; Reset Handler
-                DCD     NMI_Handler                     ; NMI Handler
-                DCD     HardFault_Handler               ; Hard Fault Handler
-                DCD     MemManage_Handler               ; MPU Fault Handler
-                DCD     BusFault_Handler                ; Bus Fault Handler
-                DCD     UsageFault_Handler              ; Usage Fault Handler
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved
-                DCD     SVC_Handler                     ; SVCall Handler
-                DCD     DebugMon_Handler                ; Debug Monitor Handler
-                DCD     0                               ; Reserved
-                DCD     PendSV_Handler                  ; PendSV Handler
-                DCD     SysTick_Handler                 ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler                 ; Window Watchdog
-                DCD     PVD_IRQHandler                  ; PVD through EXTI Line detect
-                DCD     TAMPER_IRQHandler               ; Tamper
-                DCD     RTC_IRQHandler                  ; RTC
-                DCD     FLASH_IRQHandler                ; Flash
-                DCD     RCC_IRQHandler                  ; RCC
-                DCD     EXTI0_IRQHandler                ; EXTI Line 0
-                DCD     EXTI1_IRQHandler                ; EXTI Line 1
-                DCD     EXTI2_IRQHandler                ; EXTI Line 2
-                DCD     EXTI3_IRQHandler                ; EXTI Line 3
-                DCD     EXTI4_IRQHandler                ; EXTI Line 4
-                DCD     DMA1_Channel1_IRQHandler        ; DMA1 Channel 1
-                DCD     DMA1_Channel2_IRQHandler        ; DMA1 Channel 2
-                DCD     DMA1_Channel3_IRQHandler        ; DMA1 Channel 3
-                DCD     DMA1_Channel4_IRQHandler        ; DMA1 Channel 4
-                DCD     DMA1_Channel5_IRQHandler        ; DMA1 Channel 5
-                DCD     DMA1_Channel6_IRQHandler        ; DMA1 Channel 6
-                DCD     DMA1_Channel7_IRQHandler        ; DMA1 Channel 7
-                DCD     ADC1_IRQHandler                 ; ADC1
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved
-                DCD     EXTI9_5_IRQHandler              ; EXTI Line 9..5
-                DCD     TIM1_BRK_TIM15_IRQHandler       ; TIM1 Break and TIM15
-                DCD     TIM1_UP_TIM16_IRQHandler        ; TIM1 Update and TIM16
-                DCD     TIM1_TRG_COM_TIM17_IRQHandler   ; TIM1 Trigger and Commutation and TIM17
-                DCD     TIM1_CC_IRQHandler              ; TIM1 Capture Compare
-                DCD     TIM2_IRQHandler                 ; TIM2
-                DCD     TIM3_IRQHandler                 ; TIM3
-                DCD     TIM4_IRQHandler                 ; TIM4
-                DCD     I2C1_EV_IRQHandler              ; I2C1 Event
-                DCD     I2C1_ER_IRQHandler              ; I2C1 Error
-                DCD     I2C2_EV_IRQHandler              ; I2C2 Event
-                DCD     I2C2_ER_IRQHandler              ; I2C2 Error
-                DCD     SPI1_IRQHandler                 ; SPI1
-                DCD     SPI2_IRQHandler                 ; SPI2
-                DCD     USART1_IRQHandler               ; USART1
-                DCD     USART2_IRQHandler               ; USART2
-                DCD     USART3_IRQHandler               ; USART3
-                DCD     EXTI15_10_IRQHandler            ; EXTI Line 15..10
-                DCD     RTC_Alarm_IRQHandler             ; RTC Alarm through EXTI Line
-                DCD     CEC_IRQHandler                  ; HDMI-CEC
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved 
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved 
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved
-                DCD     TIM6_DAC_IRQHandler             ; TIM6 and DAC underrun
-                DCD     TIM7_IRQHandler                 ; TIM7
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler             [WEAK]
-     IMPORT  __main
-     IMPORT  SystemInit
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                      [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler                [WEAK]
-                B       .
-                ENDP
-MemManage_Handler\
-                PROC
-                EXPORT  MemManage_Handler                [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler                 [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler               [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                      [WEAK]
-                B       .
-                ENDP
-DebugMon_Handler\
-                PROC
-                EXPORT  DebugMon_Handler                 [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler                   [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler                  [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler                  [WEAK]
-                EXPORT  PVD_IRQHandler                   [WEAK]
-                EXPORT  TAMPER_IRQHandler                [WEAK]
-                EXPORT  RTC_IRQHandler                   [WEAK]
-                EXPORT  FLASH_IRQHandler                 [WEAK]
-                EXPORT  RCC_IRQHandler                   [WEAK]
-                EXPORT  EXTI0_IRQHandler                 [WEAK]
-                EXPORT  EXTI1_IRQHandler                 [WEAK]
-                EXPORT  EXTI2_IRQHandler                 [WEAK]
-                EXPORT  EXTI3_IRQHandler                 [WEAK]
-                EXPORT  EXTI4_IRQHandler                 [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler         [WEAK]
-                EXPORT  DMA1_Channel2_IRQHandler         [WEAK]
-                EXPORT  DMA1_Channel3_IRQHandler         [WEAK]
-                EXPORT  DMA1_Channel4_IRQHandler         [WEAK]
-                EXPORT  DMA1_Channel5_IRQHandler         [WEAK]
-                EXPORT  DMA1_Channel6_IRQHandler         [WEAK]
-                EXPORT  DMA1_Channel7_IRQHandler         [WEAK]
-                EXPORT  ADC1_IRQHandler                  [WEAK]
-                EXPORT  EXTI9_5_IRQHandler               [WEAK]
-                EXPORT  TIM1_BRK_TIM15_IRQHandler        [WEAK]
-                EXPORT  TIM1_UP_TIM16_IRQHandler         [WEAK]
-                EXPORT  TIM1_TRG_COM_TIM17_IRQHandler    [WEAK]
-                EXPORT  TIM1_CC_IRQHandler               [WEAK]
-                EXPORT  TIM2_IRQHandler                  [WEAK]
-                EXPORT  TIM3_IRQHandler                  [WEAK]
-                EXPORT  TIM4_IRQHandler                  [WEAK]
-                EXPORT  I2C1_EV_IRQHandler               [WEAK]
-                EXPORT  I2C1_ER_IRQHandler               [WEAK]
-                EXPORT  I2C2_EV_IRQHandler               [WEAK]
-                EXPORT  I2C2_ER_IRQHandler               [WEAK]
-                EXPORT  SPI1_IRQHandler                  [WEAK]
-                EXPORT  SPI2_IRQHandler                  [WEAK]
-                EXPORT  USART1_IRQHandler                [WEAK]
-                EXPORT  USART2_IRQHandler                [WEAK]
-                EXPORT  USART3_IRQHandler                [WEAK]
-                EXPORT  EXTI15_10_IRQHandler             [WEAK]
-                EXPORT  RTC_Alarm_IRQHandler              [WEAK]
-                EXPORT  CEC_IRQHandler                   [WEAK]
-                EXPORT  TIM6_DAC_IRQHandler              [WEAK]
-                EXPORT  TIM7_IRQHandler                  [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-TAMPER_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_IRQHandler
-EXTI1_IRQHandler
-EXTI2_IRQHandler
-EXTI3_IRQHandler
-EXTI4_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_IRQHandler
-DMA1_Channel3_IRQHandler
-DMA1_Channel4_IRQHandler
-DMA1_Channel5_IRQHandler
-DMA1_Channel6_IRQHandler
-DMA1_Channel7_IRQHandler
-ADC1_IRQHandler
-EXTI9_5_IRQHandler
-TIM1_BRK_TIM15_IRQHandler
-TIM1_UP_TIM16_IRQHandler
-TIM1_TRG_COM_TIM17_IRQHandler
-TIM1_CC_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-TIM4_IRQHandler
-I2C1_EV_IRQHandler
-I2C1_ER_IRQHandler
-I2C2_EV_IRQHandler
-I2C2_ER_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-USART3_IRQHandler
-EXTI15_10_IRQHandler
-RTC_Alarm_IRQHandler
-CEC_IRQHandler
-TIM6_DAC_IRQHandler
-TIM7_IRQHandler
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB           
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f100xe.s

@@ -1,344 +0,0 @@
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
-;* File Name          : startup_stm32f100xe.s
-;* Author             : MCD Application Team
-;* Description        : STM32F100xE Devices vector table for MDK-ARM toolchain. 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Configure the clock system and also configure the external 
-;*                        SRAM mounted on STM32100E-EVAL board to be used as data 
-;*                        memory (optional, to be enabled by user)
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;******************************************************************************
-;* @attention
-;*
-;* Copyright (c) 2017-2021 STMicroelectronics.
-;* All rights reserved.
-;*
-;* This software is licensed under terms that can be found in the LICENSE file
-;* in the root directory of this software component.
-;* If no LICENSE file comes with this software, it is provided AS-IS.
-;*
-;******************************************************************************
-
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp                    ; Top of Stack
-                DCD     Reset_Handler                   ; Reset Handler
-                DCD     NMI_Handler                     ; NMI Handler
-                DCD     HardFault_Handler               ; Hard Fault Handler
-                DCD     MemManage_Handler               ; MPU Fault Handler
-                DCD     BusFault_Handler                ; Bus Fault Handler
-                DCD     UsageFault_Handler              ; Usage Fault Handler
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved
-                DCD     SVC_Handler                     ; SVCall Handler
-                DCD     DebugMon_Handler                ; Debug Monitor Handler
-                DCD     0                               ; Reserved
-                DCD     PendSV_Handler                  ; PendSV Handler
-                DCD     SysTick_Handler                 ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler                 ; Window Watchdog
-                DCD     PVD_IRQHandler                  ; PVD through EXTI Line detect
-                DCD     TAMPER_IRQHandler               ; Tamper
-                DCD     RTC_IRQHandler                  ; RTC
-                DCD     FLASH_IRQHandler                ; Flash
-                DCD     RCC_IRQHandler                  ; RCC
-                DCD     EXTI0_IRQHandler                ; EXTI Line 0
-                DCD     EXTI1_IRQHandler                ; EXTI Line 1
-                DCD     EXTI2_IRQHandler                ; EXTI Line 2
-                DCD     EXTI3_IRQHandler                ; EXTI Line 3
-                DCD     EXTI4_IRQHandler                ; EXTI Line 4
-                DCD     DMA1_Channel1_IRQHandler        ; DMA1 Channel 1
-                DCD     DMA1_Channel2_IRQHandler        ; DMA1 Channel 2
-                DCD     DMA1_Channel3_IRQHandler        ; DMA1 Channel 3
-                DCD     DMA1_Channel4_IRQHandler        ; DMA1 Channel 4
-                DCD     DMA1_Channel5_IRQHandler        ; DMA1 Channel 5
-                DCD     DMA1_Channel6_IRQHandler        ; DMA1 Channel 6
-                DCD     DMA1_Channel7_IRQHandler        ; DMA1 Channel 7
-                DCD     ADC1_IRQHandler                 ; ADC1
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved
-                DCD     EXTI9_5_IRQHandler              ; EXTI Line 9..5
-                DCD     TIM1_BRK_TIM15_IRQHandler       ; TIM1 Break and TIM15
-                DCD     TIM1_UP_TIM16_IRQHandler        ; TIM1 Update and TIM16
-                DCD     TIM1_TRG_COM_TIM17_IRQHandler   ; TIM1 Trigger and Commutation and TIM17
-                DCD     TIM1_CC_IRQHandler              ; TIM1 Capture Compare
-                DCD     TIM2_IRQHandler                 ; TIM2
-                DCD     TIM3_IRQHandler                 ; TIM3
-                DCD     TIM4_IRQHandler                 ; TIM4
-                DCD     I2C1_EV_IRQHandler              ; I2C1 Event
-                DCD     I2C1_ER_IRQHandler              ; I2C1 Error
-                DCD     I2C2_EV_IRQHandler              ; I2C2 Event
-                DCD     I2C2_ER_IRQHandler              ; I2C2 Error
-                DCD     SPI1_IRQHandler                 ; SPI1
-                DCD     SPI2_IRQHandler                 ; SPI2
-                DCD     USART1_IRQHandler               ; USART1
-                DCD     USART2_IRQHandler               ; USART2
-                DCD     USART3_IRQHandler               ; USART3
-                DCD     EXTI15_10_IRQHandler            ; EXTI Line 15..10
-                DCD     RTC_Alarm_IRQHandler             ; RTC Alarm through EXTI Line
-                DCD     CEC_IRQHandler                  ; HDMI CEC
-                DCD     TIM12_IRQHandler                ; TIM12
-                DCD     TIM13_IRQHandler                ; TIM13 
-                DCD     TIM14_IRQHandler                ; TIM14
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved
-                DCD     0                               ; Reserved
-                DCD     TIM5_IRQHandler                 ; TIM5
-                DCD     SPI3_IRQHandler                 ; SPI3
-                DCD     UART4_IRQHandler                ; UART4
-                DCD     UART5_IRQHandler                ; UART5
-                DCD     TIM6_DAC_IRQHandler             ; TIM6 and DAC underrun
-                DCD     TIM7_IRQHandler                 ; TIM7
-                DCD     DMA2_Channel1_IRQHandler        ; DMA2 Channel1
-                DCD     DMA2_Channel2_IRQHandler        ; DMA2 Channel2
-                DCD     DMA2_Channel3_IRQHandler        ; DMA2 Channel3
-                DCD     DMA2_Channel4_5_IRQHandler      ; DMA2 Channel4 & Channel5
-                DCD     DMA2_Channel5_IRQHandler        ; DMA2 Channel5                
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler             [WEAK]
-     IMPORT  __main
-     IMPORT  SystemInit
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                      [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler                [WEAK]
-                B       .
-                ENDP
-MemManage_Handler\
-                PROC
-                EXPORT  MemManage_Handler                [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler                 [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler               [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                      [WEAK]
-                B       .
-                ENDP
-DebugMon_Handler\
-                PROC
-                EXPORT  DebugMon_Handler                 [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler                   [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler                  [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler                  [WEAK]
-                EXPORT  PVD_IRQHandler                   [WEAK]
-                EXPORT  TAMPER_IRQHandler                [WEAK]
-                EXPORT  RTC_IRQHandler                   [WEAK]
-                EXPORT  FLASH_IRQHandler                 [WEAK]
-                EXPORT  RCC_IRQHandler                   [WEAK]
-                EXPORT  EXTI0_IRQHandler                 [WEAK]
-                EXPORT  EXTI1_IRQHandler                 [WEAK]
-                EXPORT  EXTI2_IRQHandler                 [WEAK]
-                EXPORT  EXTI3_IRQHandler                 [WEAK]
-                EXPORT  EXTI4_IRQHandler                 [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler         [WEAK]
-                EXPORT  DMA1_Channel2_IRQHandler         [WEAK]
-                EXPORT  DMA1_Channel3_IRQHandler         [WEAK]
-                EXPORT  DMA1_Channel4_IRQHandler         [WEAK]
-                EXPORT  DMA1_Channel5_IRQHandler         [WEAK]
-                EXPORT  DMA1_Channel6_IRQHandler         [WEAK]
-                EXPORT  DMA1_Channel7_IRQHandler         [WEAK]
-                EXPORT  ADC1_IRQHandler                  [WEAK]
-                EXPORT  EXTI9_5_IRQHandler               [WEAK]
-                EXPORT  TIM1_BRK_TIM15_IRQHandler        [WEAK]
-                EXPORT  TIM1_UP_TIM16_IRQHandler         [WEAK]
-                EXPORT  TIM1_TRG_COM_TIM17_IRQHandler    [WEAK]
-                EXPORT  TIM1_CC_IRQHandler               [WEAK]
-                EXPORT  TIM2_IRQHandler                  [WEAK]
-                EXPORT  TIM3_IRQHandler                  [WEAK]
-                EXPORT  TIM4_IRQHandler                  [WEAK]
-                EXPORT  I2C1_EV_IRQHandler               [WEAK]
-                EXPORT  I2C1_ER_IRQHandler               [WEAK]
-                EXPORT  I2C2_EV_IRQHandler               [WEAK]
-                EXPORT  I2C2_ER_IRQHandler               [WEAK]
-                EXPORT  SPI1_IRQHandler                  [WEAK]
-                EXPORT  SPI2_IRQHandler                  [WEAK]
-                EXPORT  USART1_IRQHandler                [WEAK]
-                EXPORT  USART2_IRQHandler                [WEAK]
-                EXPORT  USART3_IRQHandler                [WEAK]
-                EXPORT  EXTI15_10_IRQHandler             [WEAK]
-                EXPORT  RTC_Alarm_IRQHandler             [WEAK]
-                EXPORT  CEC_IRQHandler                   [WEAK]
-                EXPORT  TIM12_IRQHandler                 [WEAK]
-                EXPORT  TIM13_IRQHandler                 [WEAK]
-                EXPORT  TIM14_IRQHandler                 [WEAK]
-                EXPORT  TIM5_IRQHandler                  [WEAK]
-                EXPORT  SPI3_IRQHandler                  [WEAK]
-                EXPORT  UART4_IRQHandler                 [WEAK]
-                EXPORT  UART5_IRQHandler                 [WEAK]
-                EXPORT  TIM6_DAC_IRQHandler              [WEAK]
-                EXPORT  TIM7_IRQHandler                  [WEAK]
-                EXPORT  DMA2_Channel1_IRQHandler         [WEAK]
-                EXPORT  DMA2_Channel2_IRQHandler         [WEAK]
-                EXPORT  DMA2_Channel3_IRQHandler         [WEAK]
-                EXPORT  DMA2_Channel4_5_IRQHandler       [WEAK]
-                EXPORT  DMA2_Channel5_IRQHandler         [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-TAMPER_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_IRQHandler
-EXTI1_IRQHandler
-EXTI2_IRQHandler
-EXTI3_IRQHandler
-EXTI4_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_IRQHandler
-DMA1_Channel3_IRQHandler
-DMA1_Channel4_IRQHandler
-DMA1_Channel5_IRQHandler
-DMA1_Channel6_IRQHandler
-DMA1_Channel7_IRQHandler
-ADC1_IRQHandler
-EXTI9_5_IRQHandler
-TIM1_BRK_TIM15_IRQHandler
-TIM1_UP_TIM16_IRQHandler
-TIM1_TRG_COM_TIM17_IRQHandler
-TIM1_CC_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-TIM4_IRQHandler
-I2C1_EV_IRQHandler
-I2C1_ER_IRQHandler
-I2C2_EV_IRQHandler
-I2C2_ER_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-USART3_IRQHandler
-EXTI15_10_IRQHandler
-RTC_Alarm_IRQHandler
-CEC_IRQHandler
-TIM12_IRQHandler
-TIM13_IRQHandler
-TIM14_IRQHandler
-TIM5_IRQHandler
-SPI3_IRQHandler
-UART4_IRQHandler
-UART5_IRQHandler
-TIM6_DAC_IRQHandler
-TIM7_IRQHandler
-DMA2_Channel1_IRQHandler
-DMA2_Channel2_IRQHandler
-DMA2_Channel3_IRQHandler
-DMA2_Channel4_5_IRQHandler
-DMA2_Channel5_IRQHandler
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB           
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f101x6.s

@@ -1,276 +0,0 @@
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
-;* File Name          : startup_stm32f101x6.s
-;* Author             : MCD Application Team
-;* Description        : STM32F101x6 Devices vector table for MDK-ARM toolchain. 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Configure the clock system
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;******************************************************************************
-;* @attention
-;*
-;* Copyright (c) 2017-2021 STMicroelectronics.
-;* All rights reserved.
-;*
-;* This software is licensed under terms that can be found in the LICENSE file
-;* in the root directory of this software component.
-;* If no LICENSE file comes with this software, it is provided AS-IS.
-;*
-;******************************************************************************
-
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp               ; Top of Stack
-                DCD     Reset_Handler              ; Reset Handler
-                DCD     NMI_Handler                ; NMI Handler
-                DCD     HardFault_Handler          ; Hard Fault Handler
-                DCD     MemManage_Handler          ; MPU Fault Handler
-                DCD     BusFault_Handler           ; Bus Fault Handler
-                DCD     UsageFault_Handler         ; Usage Fault Handler
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     SVC_Handler                ; SVCall Handler
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
-                DCD     0                          ; Reserved
-                DCD     PendSV_Handler             ; PendSV Handler
-                DCD     SysTick_Handler            ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler            ; Window Watchdog
-                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
-                DCD     TAMPER_IRQHandler          ; Tamper
-                DCD     RTC_IRQHandler             ; RTC
-                DCD     FLASH_IRQHandler           ; Flash
-                DCD     RCC_IRQHandler             ; RCC
-                DCD     EXTI0_IRQHandler           ; EXTI Line 0
-                DCD     EXTI1_IRQHandler           ; EXTI Line 1
-                DCD     EXTI2_IRQHandler           ; EXTI Line 2
-                DCD     EXTI3_IRQHandler           ; EXTI Line 3
-                DCD     EXTI4_IRQHandler           ; EXTI Line 4
-                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
-                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
-                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
-                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
-                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
-                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
-                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
-                DCD     ADC1_IRQHandler            ; ADC1
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     TIM2_IRQHandler            ; TIM2
-                DCD     TIM3_IRQHandler            ; TIM3
-                DCD     0                          ; Reserved
-                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
-                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     SPI1_IRQHandler            ; SPI1
-                DCD     0                          ; Reserved
-                DCD     USART1_IRQHandler          ; USART1
-                DCD     USART2_IRQHandler          ; USART2
-                DCD     0                          ; Reserved
-                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
-                DCD     RTC_Alarm_IRQHandler        ; RTC Alarm through EXTI Line
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler routine
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler             [WEAK]
-     IMPORT  __main
-     IMPORT  SystemInit
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler          [WEAK]
-                B       .
-                ENDP
-MemManage_Handler\
-                PROC
-                EXPORT  MemManage_Handler          [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler           [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler         [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                [WEAK]
-                B       .
-                ENDP
-DebugMon_Handler\
-                PROC
-                EXPORT  DebugMon_Handler           [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler             [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler            [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler            [WEAK]
-                EXPORT  PVD_IRQHandler             [WEAK]
-                EXPORT  TAMPER_IRQHandler          [WEAK]
-                EXPORT  RTC_IRQHandler             [WEAK]
-                EXPORT  FLASH_IRQHandler           [WEAK]
-                EXPORT  RCC_IRQHandler             [WEAK]
-                EXPORT  EXTI0_IRQHandler           [WEAK]
-                EXPORT  EXTI1_IRQHandler           [WEAK]
-                EXPORT  EXTI2_IRQHandler           [WEAK]
-                EXPORT  EXTI3_IRQHandler           [WEAK]
-                EXPORT  EXTI4_IRQHandler           [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
-                EXPORT  ADC1_IRQHandler            [WEAK]            
-                EXPORT  EXTI9_5_IRQHandler         [WEAK]
-                EXPORT  TIM2_IRQHandler            [WEAK]
-                EXPORT  TIM3_IRQHandler            [WEAK]
-                EXPORT  I2C1_EV_IRQHandler         [WEAK]
-                EXPORT  I2C1_ER_IRQHandler         [WEAK]
-                EXPORT  SPI1_IRQHandler            [WEAK]
-                EXPORT  USART1_IRQHandler          [WEAK]
-                EXPORT  USART2_IRQHandler          [WEAK]
-                EXPORT  EXTI15_10_IRQHandler       [WEAK]
-                EXPORT  RTC_Alarm_IRQHandler       [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-TAMPER_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_IRQHandler
-EXTI1_IRQHandler
-EXTI2_IRQHandler
-EXTI3_IRQHandler
-EXTI4_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_IRQHandler
-DMA1_Channel3_IRQHandler
-DMA1_Channel4_IRQHandler
-DMA1_Channel5_IRQHandler
-DMA1_Channel6_IRQHandler
-DMA1_Channel7_IRQHandler
-ADC1_IRQHandler
-EXTI9_5_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-I2C1_EV_IRQHandler
-I2C1_ER_IRQHandler
-SPI1_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-EXTI15_10_IRQHandler
-RTC_Alarm_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f101xb.s

@@ -1,286 +0,0 @@
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
-;* File Name          : startup_stm32f101xb.s
-;* Author             : MCD Application Team
-;* Description        : STM32F101xB Devices vector table for MDK-ARM toolchain. 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Configure the clock system
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;******************************************************************************
-;* @attention
-;*
-;* Copyright (c) 2017-2021 STMicroelectronics.
-;* All rights reserved.
-;*
-;* This software is licensed under terms that can be found in the LICENSE file
-;* in the root directory of this software component.
-;* If no LICENSE file comes with this software, it is provided AS-IS.
-;*
-;******************************************************************************
-
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp               ; Top of Stack
-                DCD     Reset_Handler              ; Reset Handler
-                DCD     NMI_Handler                ; NMI Handler
-                DCD     HardFault_Handler          ; Hard Fault Handler
-                DCD     MemManage_Handler          ; MPU Fault Handler
-                DCD     BusFault_Handler           ; Bus Fault Handler
-                DCD     UsageFault_Handler         ; Usage Fault Handler
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     SVC_Handler                ; SVCall Handler
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
-                DCD     0                          ; Reserved
-                DCD     PendSV_Handler             ; PendSV Handler
-                DCD     SysTick_Handler            ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler            ; Window Watchdog
-                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
-                DCD     TAMPER_IRQHandler          ; Tamper
-                DCD     RTC_IRQHandler             ; RTC
-                DCD     FLASH_IRQHandler           ; Flash
-                DCD     RCC_IRQHandler             ; RCC
-                DCD     EXTI0_IRQHandler           ; EXTI Line 0
-                DCD     EXTI1_IRQHandler           ; EXTI Line 1
-                DCD     EXTI2_IRQHandler           ; EXTI Line 2
-                DCD     EXTI3_IRQHandler           ; EXTI Line 3
-                DCD     EXTI4_IRQHandler           ; EXTI Line 4
-                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
-                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
-                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
-                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
-                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
-                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
-                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
-                DCD     ADC1_IRQHandler            ; ADC1
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     TIM2_IRQHandler            ; TIM2
-                DCD     TIM3_IRQHandler            ; TIM3
-                DCD     TIM4_IRQHandler            ; TIM4
-                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
-                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
-                DCD     I2C2_EV_IRQHandler         ; I2C2 Event
-                DCD     I2C2_ER_IRQHandler         ; I2C2 Error
-                DCD     SPI1_IRQHandler            ; SPI1
-                DCD     SPI2_IRQHandler            ; SPI2
-                DCD     USART1_IRQHandler          ; USART1
-                DCD     USART2_IRQHandler          ; USART2
-                DCD     USART3_IRQHandler          ; USART3
-                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
-                DCD     RTC_Alarm_IRQHandler        ; RTC Alarm through EXTI Line
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler             [WEAK]
-     IMPORT  __main
-     IMPORT  SystemInit
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler          [WEAK]
-                B       .
-                ENDP
-MemManage_Handler\
-                PROC
-                EXPORT  MemManage_Handler          [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler           [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler         [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                [WEAK]
-                B       .
-                ENDP
-DebugMon_Handler\
-                PROC
-                EXPORT  DebugMon_Handler           [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler             [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler            [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler            [WEAK]
-                EXPORT  PVD_IRQHandler             [WEAK]
-                EXPORT  TAMPER_IRQHandler          [WEAK]
-                EXPORT  RTC_IRQHandler             [WEAK]
-                EXPORT  FLASH_IRQHandler           [WEAK]
-                EXPORT  RCC_IRQHandler             [WEAK]
-                EXPORT  EXTI0_IRQHandler           [WEAK]
-                EXPORT  EXTI1_IRQHandler           [WEAK]
-                EXPORT  EXTI2_IRQHandler           [WEAK]
-                EXPORT  EXTI3_IRQHandler           [WEAK]
-                EXPORT  EXTI4_IRQHandler           [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
-                EXPORT  ADC1_IRQHandler            [WEAK]
-                EXPORT  EXTI9_5_IRQHandler         [WEAK]
-                EXPORT  TIM2_IRQHandler            [WEAK]
-                EXPORT  TIM3_IRQHandler            [WEAK]
-                EXPORT  TIM4_IRQHandler            [WEAK]
-                EXPORT  I2C1_EV_IRQHandler         [WEAK]
-                EXPORT  I2C1_ER_IRQHandler         [WEAK]
-                EXPORT  I2C2_EV_IRQHandler         [WEAK]
-                EXPORT  I2C2_ER_IRQHandler         [WEAK]
-                EXPORT  SPI1_IRQHandler            [WEAK]
-                EXPORT  SPI2_IRQHandler            [WEAK]
-                EXPORT  USART1_IRQHandler          [WEAK]
-                EXPORT  USART2_IRQHandler          [WEAK]
-                EXPORT  USART3_IRQHandler          [WEAK]
-                EXPORT  EXTI15_10_IRQHandler       [WEAK]
-                EXPORT  RTC_Alarm_IRQHandler       [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-TAMPER_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_IRQHandler
-EXTI1_IRQHandler
-EXTI2_IRQHandler
-EXTI3_IRQHandler
-EXTI4_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_IRQHandler
-DMA1_Channel3_IRQHandler
-DMA1_Channel4_IRQHandler
-DMA1_Channel5_IRQHandler
-DMA1_Channel6_IRQHandler
-DMA1_Channel7_IRQHandler
-ADC1_IRQHandler
-EXTI9_5_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-TIM4_IRQHandler
-I2C1_EV_IRQHandler
-I2C1_ER_IRQHandler
-I2C2_EV_IRQHandler
-I2C2_ER_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-USART3_IRQHandler
-EXTI15_10_IRQHandler
-RTC_Alarm_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB           
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f101xe.s

@@ -1,324 +0,0 @@
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
-;* File Name          : startup_stm32f101xe.s
-;* Author             : MCD Application Team
-;* Description        : STM32F101xE Devices vector table for MDK-ARM toolchain. 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Configure the clock system
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;******************************************************************************
-;* @attention
-;*
-;* Copyright (c) 2017-2021 STMicroelectronics.
-;* All rights reserved.
-;*
-;* This software is licensed under terms that can be found in the LICENSE file
-;* in the root directory of this software component.
-;* If no LICENSE file comes with this software, it is provided AS-IS.
-;*
-;******************************************************************************
-
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-                                                  
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp               ; Top of Stack
-                DCD     Reset_Handler              ; Reset Handler
-                DCD     NMI_Handler                ; NMI Handler
-                DCD     HardFault_Handler          ; Hard Fault Handler
-                DCD     MemManage_Handler          ; MPU Fault Handler
-                DCD     BusFault_Handler           ; Bus Fault Handler
-                DCD     UsageFault_Handler         ; Usage Fault Handler
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     SVC_Handler                ; SVCall Handler
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
-                DCD     0                          ; Reserved
-                DCD     PendSV_Handler             ; PendSV Handler
-                DCD     SysTick_Handler            ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler            ; Window Watchdog
-                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
-                DCD     TAMPER_IRQHandler          ; Tamper
-                DCD     RTC_IRQHandler             ; RTC
-                DCD     FLASH_IRQHandler           ; Flash
-                DCD     RCC_IRQHandler             ; RCC
-                DCD     EXTI0_IRQHandler           ; EXTI Line 0
-                DCD     EXTI1_IRQHandler           ; EXTI Line 1
-                DCD     EXTI2_IRQHandler           ; EXTI Line 2
-                DCD     EXTI3_IRQHandler           ; EXTI Line 3
-                DCD     EXTI4_IRQHandler           ; EXTI Line 4
-                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
-                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
-                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
-                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
-                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
-                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
-                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
-                DCD     ADC1_IRQHandler            ; ADC1
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     TIM2_IRQHandler            ; TIM2
-                DCD     TIM3_IRQHandler            ; TIM3
-                DCD     TIM4_IRQHandler            ; TIM4
-                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
-                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
-                DCD     I2C2_EV_IRQHandler         ; I2C2 Event
-                DCD     I2C2_ER_IRQHandler         ; I2C2 Error
-                DCD     SPI1_IRQHandler            ; SPI1
-                DCD     SPI2_IRQHandler            ; SPI2
-                DCD     USART1_IRQHandler          ; USART1
-                DCD     USART2_IRQHandler          ; USART2
-                DCD     USART3_IRQHandler          ; USART3
-                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
-                DCD     RTC_Alarm_IRQHandler        ; RTC Alarm through EXTI Line
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     FSMC_IRQHandler            ; FSMC
-                DCD     0                          ; Reserved
-                DCD     TIM5_IRQHandler            ; TIM5
-                DCD     SPI3_IRQHandler            ; SPI3
-                DCD     UART4_IRQHandler           ; UART4
-                DCD     UART5_IRQHandler           ; UART5
-                DCD     TIM6_IRQHandler            ; TIM6
-                DCD     TIM7_IRQHandler            ; TIM7
-                DCD     DMA2_Channel1_IRQHandler   ; DMA2 Channel1
-                DCD     DMA2_Channel2_IRQHandler   ; DMA2 Channel2
-                DCD     DMA2_Channel3_IRQHandler   ; DMA2 Channel3
-                DCD     DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-                
-; Reset handler
-Reset_Handler   PROC
-                EXPORT  Reset_Handler             [WEAK]
-                IMPORT  __main
-                IMPORT  SystemInit
-                LDR     R0, =SystemInit
-                BLX     R0               
-                LDR     R0, =__main
-                BX      R0
-                ENDP
-                
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler          [WEAK]
-                B       .
-                ENDP
-MemManage_Handler\
-                PROC
-                EXPORT  MemManage_Handler          [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler           [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler         [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                [WEAK]
-                B       .
-                ENDP
-DebugMon_Handler\
-                PROC
-                EXPORT  DebugMon_Handler           [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler             [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler            [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler            [WEAK]
-                EXPORT  PVD_IRQHandler             [WEAK]
-                EXPORT  TAMPER_IRQHandler          [WEAK]
-                EXPORT  RTC_IRQHandler             [WEAK]
-                EXPORT  FLASH_IRQHandler           [WEAK]
-                EXPORT  RCC_IRQHandler             [WEAK]
-                EXPORT  EXTI0_IRQHandler           [WEAK]
-                EXPORT  EXTI1_IRQHandler           [WEAK]
-                EXPORT  EXTI2_IRQHandler           [WEAK]
-                EXPORT  EXTI3_IRQHandler           [WEAK]
-                EXPORT  EXTI4_IRQHandler           [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
-                EXPORT  ADC1_IRQHandler            [WEAK]
-                EXPORT  EXTI9_5_IRQHandler         [WEAK]
-                EXPORT  TIM2_IRQHandler            [WEAK]
-                EXPORT  TIM3_IRQHandler            [WEAK]
-                EXPORT  TIM4_IRQHandler            [WEAK]
-                EXPORT  I2C1_EV_IRQHandler         [WEAK]
-                EXPORT  I2C1_ER_IRQHandler         [WEAK]
-                EXPORT  I2C2_EV_IRQHandler         [WEAK]
-                EXPORT  I2C2_ER_IRQHandler         [WEAK]
-                EXPORT  SPI1_IRQHandler            [WEAK]
-                EXPORT  SPI2_IRQHandler            [WEAK]
-                EXPORT  USART1_IRQHandler          [WEAK]
-                EXPORT  USART2_IRQHandler          [WEAK]
-                EXPORT  USART3_IRQHandler          [WEAK]
-                EXPORT  EXTI15_10_IRQHandler       [WEAK]
-                EXPORT  RTC_Alarm_IRQHandler       [WEAK]
-                EXPORT  FSMC_IRQHandler            [WEAK]
-                EXPORT  TIM5_IRQHandler            [WEAK]
-                EXPORT  SPI3_IRQHandler            [WEAK]
-                EXPORT  UART4_IRQHandler           [WEAK]
-                EXPORT  UART5_IRQHandler           [WEAK]
-                EXPORT  TIM6_IRQHandler            [WEAK]
-                EXPORT  TIM7_IRQHandler            [WEAK]
-                EXPORT  DMA2_Channel1_IRQHandler   [WEAK]
-                EXPORT  DMA2_Channel2_IRQHandler   [WEAK]
-                EXPORT  DMA2_Channel3_IRQHandler   [WEAK]
-                EXPORT  DMA2_Channel4_5_IRQHandler [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-TAMPER_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_IRQHandler
-EXTI1_IRQHandler
-EXTI2_IRQHandler
-EXTI3_IRQHandler
-EXTI4_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_IRQHandler
-DMA1_Channel3_IRQHandler
-DMA1_Channel4_IRQHandler
-DMA1_Channel5_IRQHandler
-DMA1_Channel6_IRQHandler
-DMA1_Channel7_IRQHandler
-ADC1_IRQHandler
-EXTI9_5_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-TIM4_IRQHandler
-I2C1_EV_IRQHandler
-I2C1_ER_IRQHandler
-I2C2_EV_IRQHandler
-I2C2_ER_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-USART3_IRQHandler
-EXTI15_10_IRQHandler
-RTC_Alarm_IRQHandler
-FSMC_IRQHandler
-TIM5_IRQHandler
-SPI3_IRQHandler
-UART4_IRQHandler
-UART5_IRQHandler
-TIM6_IRQHandler
-TIM7_IRQHandler
-DMA2_Channel1_IRQHandler
-DMA2_Channel2_IRQHandler
-DMA2_Channel3_IRQHandler
-DMA2_Channel4_5_IRQHandler
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f101xg.s

@@ -1,336 +0,0 @@
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
-;* File Name          : startup_stm32f101xg.s
-;* Author             : MCD Application Team
-;* Description        : STM32F101xG Devices vector table for MDK-ARM toolchain. 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Configure the clock system
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;******************************************************************************
-;* @attention
-;*
-;* Copyright (c) 2017-2021 STMicroelectronics.
-;* All rights reserved.
-;*
-;* This software is licensed under terms that can be found in the LICENSE file
-;* in the root directory of this software component.
-;* If no LICENSE file comes with this software, it is provided AS-IS.
-;*
-;******************************************************************************
-
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-                                                  
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp               ; Top of Stack
-                DCD     Reset_Handler              ; Reset Handler
-                DCD     NMI_Handler                ; NMI Handler
-                DCD     HardFault_Handler          ; Hard Fault Handler
-                DCD     MemManage_Handler          ; MPU Fault Handler
-                DCD     BusFault_Handler           ; Bus Fault Handler
-                DCD     UsageFault_Handler         ; Usage Fault Handler
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     SVC_Handler                ; SVCall Handler
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
-                DCD     0                          ; Reserved
-                DCD     PendSV_Handler             ; PendSV Handler
-                DCD     SysTick_Handler            ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler               ; Window Watchdog
-                DCD     PVD_IRQHandler                ; PVD through EXTI Line detect
-                DCD     TAMPER_IRQHandler             ; Tamper
-                DCD     RTC_IRQHandler                ; RTC
-                DCD     FLASH_IRQHandler              ; Flash
-                DCD     RCC_IRQHandler                ; RCC
-                DCD     EXTI0_IRQHandler              ; EXTI Line 0
-                DCD     EXTI1_IRQHandler              ; EXTI Line 1
-                DCD     EXTI2_IRQHandler              ; EXTI Line 2
-                DCD     EXTI3_IRQHandler              ; EXTI Line 3
-                DCD     EXTI4_IRQHandler              ; EXTI Line 4
-                DCD     DMA1_Channel1_IRQHandler      ; DMA1 Channel 1
-                DCD     DMA1_Channel2_IRQHandler      ; DMA1 Channel 2
-                DCD     DMA1_Channel3_IRQHandler      ; DMA1 Channel 3
-                DCD     DMA1_Channel4_IRQHandler      ; DMA1 Channel 4
-                DCD     DMA1_Channel5_IRQHandler      ; DMA1 Channel 5
-                DCD     DMA1_Channel6_IRQHandler      ; DMA1 Channel 6
-                DCD     DMA1_Channel7_IRQHandler      ; DMA1 Channel 7
-                DCD     ADC1_IRQHandler               ; ADC1
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     EXTI9_5_IRQHandler            ; EXTI Line 9..5
-                DCD     TIM9_IRQHandler               ; TIM9
-                DCD     TIM10_IRQHandler              ; TIM10
-                DCD     TIM11_IRQHandler              ; TIM11
-                DCD     0                          ; Reserved
-                DCD     TIM2_IRQHandler               ; TIM2
-                DCD     TIM3_IRQHandler               ; TIM3
-                DCD     TIM4_IRQHandler               ; TIM4
-                DCD     I2C1_EV_IRQHandler            ; I2C1 Event
-                DCD     I2C1_ER_IRQHandler            ; I2C1 Error
-                DCD     I2C2_EV_IRQHandler            ; I2C2 Event
-                DCD     I2C2_ER_IRQHandler            ; I2C2 Error
-                DCD     SPI1_IRQHandler               ; SPI1
-                DCD     SPI2_IRQHandler               ; SPI2
-                DCD     USART1_IRQHandler             ; USART1
-                DCD     USART2_IRQHandler             ; USART2
-                DCD     USART3_IRQHandler             ; USART3
-                DCD     EXTI15_10_IRQHandler          ; EXTI Line 15..10
-                DCD     RTC_Alarm_IRQHandler           ; RTC Alarm through EXTI Line
-                DCD     0                          ; Reserved
-                DCD     TIM12_IRQHandler                ; TIM12
-                DCD     TIM13_IRQHandler                ; TIM13 
-                DCD     TIM14_IRQHandler                ; TIM14
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     FSMC_IRQHandler               ; FSMC
-                DCD     0                          ; Reserved
-                DCD     TIM5_IRQHandler               ; TIM5
-                DCD     SPI3_IRQHandler               ; SPI3
-                DCD     UART4_IRQHandler              ; UART4
-                DCD     UART5_IRQHandler              ; UART5
-                DCD     TIM6_IRQHandler               ; TIM6
-                DCD     TIM7_IRQHandler               ; TIM7
-                DCD     DMA2_Channel1_IRQHandler      ; DMA2 Channel1
-                DCD     DMA2_Channel2_IRQHandler      ; DMA2 Channel2
-                DCD     DMA2_Channel3_IRQHandler      ; DMA2 Channel3
-                DCD     DMA2_Channel4_5_IRQHandler    ; DMA2 Channel4 & Channel5
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-                
-; Reset handler
-Reset_Handler   PROC
-                EXPORT  Reset_Handler             [WEAK]
-                IMPORT  __main
-                IMPORT  SystemInit
-                LDR     R0, =SystemInit
-                BLX     R0               
-                LDR     R0, =__main
-                BX      R0
-                ENDP
-                
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler          [WEAK]
-                B       .
-                ENDP
-MemManage_Handler\
-                PROC
-                EXPORT  MemManage_Handler          [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler           [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler         [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                [WEAK]
-                B       .
-                ENDP
-DebugMon_Handler\
-                PROC
-                EXPORT  DebugMon_Handler           [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler             [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler            [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler               [WEAK]
-                EXPORT  PVD_IRQHandler                [WEAK]
-                EXPORT  TAMPER_IRQHandler             [WEAK]
-                EXPORT  RTC_IRQHandler                [WEAK]
-                EXPORT  FLASH_IRQHandler              [WEAK]
-                EXPORT  RCC_IRQHandler                [WEAK]
-                EXPORT  EXTI0_IRQHandler              [WEAK]
-                EXPORT  EXTI1_IRQHandler              [WEAK]
-                EXPORT  EXTI2_IRQHandler              [WEAK]
-                EXPORT  EXTI3_IRQHandler              [WEAK]
-                EXPORT  EXTI4_IRQHandler              [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler      [WEAK]
-                EXPORT  DMA1_Channel2_IRQHandler      [WEAK]
-                EXPORT  DMA1_Channel3_IRQHandler      [WEAK]
-                EXPORT  DMA1_Channel4_IRQHandler      [WEAK]
-                EXPORT  DMA1_Channel5_IRQHandler      [WEAK]
-                EXPORT  DMA1_Channel6_IRQHandler      [WEAK]
-                EXPORT  DMA1_Channel7_IRQHandler      [WEAK]
-                EXPORT  ADC1_IRQHandler               [WEAK]
-                EXPORT  EXTI9_5_IRQHandler            [WEAK]
-                EXPORT  TIM9_IRQHandler               [WEAK]
-                EXPORT  TIM10_IRQHandler              [WEAK]
-                EXPORT  TIM11_IRQHandler              [WEAK]
-                EXPORT  TIM2_IRQHandler               [WEAK]
-                EXPORT  TIM3_IRQHandler               [WEAK]
-                EXPORT  TIM4_IRQHandler               [WEAK]
-                EXPORT  I2C1_EV_IRQHandler            [WEAK]
-                EXPORT  I2C1_ER_IRQHandler            [WEAK]
-                EXPORT  I2C2_EV_IRQHandler            [WEAK]
-                EXPORT  I2C2_ER_IRQHandler            [WEAK]
-                EXPORT  SPI1_IRQHandler               [WEAK]
-                EXPORT  SPI2_IRQHandler               [WEAK]
-                EXPORT  USART1_IRQHandler             [WEAK]
-                EXPORT  USART2_IRQHandler             [WEAK]
-                EXPORT  USART3_IRQHandler             [WEAK]
-                EXPORT  EXTI15_10_IRQHandler          [WEAK]
-                EXPORT  RTC_Alarm_IRQHandler          [WEAK]
-                EXPORT  TIM12_IRQHandler              [WEAK]
-                EXPORT  TIM13_IRQHandler              [WEAK]
-                EXPORT  TIM14_IRQHandler              [WEAK]
-                EXPORT  FSMC_IRQHandler               [WEAK]
-                EXPORT  TIM5_IRQHandler               [WEAK]
-                EXPORT  SPI3_IRQHandler               [WEAK]
-                EXPORT  UART4_IRQHandler              [WEAK]
-                EXPORT  UART5_IRQHandler              [WEAK]
-                EXPORT  TIM6_IRQHandler               [WEAK]
-                EXPORT  TIM7_IRQHandler               [WEAK]
-                EXPORT  DMA2_Channel1_IRQHandler      [WEAK]
-                EXPORT  DMA2_Channel2_IRQHandler      [WEAK]
-                EXPORT  DMA2_Channel3_IRQHandler      [WEAK]
-                EXPORT  DMA2_Channel4_5_IRQHandler    [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-TAMPER_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_IRQHandler
-EXTI1_IRQHandler
-EXTI2_IRQHandler
-EXTI3_IRQHandler
-EXTI4_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_IRQHandler
-DMA1_Channel3_IRQHandler
-DMA1_Channel4_IRQHandler
-DMA1_Channel5_IRQHandler
-DMA1_Channel6_IRQHandler
-DMA1_Channel7_IRQHandler
-ADC1_IRQHandler
-EXTI9_5_IRQHandler
-TIM9_IRQHandler
-TIM10_IRQHandler
-TIM11_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-TIM4_IRQHandler
-I2C1_EV_IRQHandler
-I2C1_ER_IRQHandler
-I2C2_EV_IRQHandler
-I2C2_ER_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-USART3_IRQHandler
-EXTI15_10_IRQHandler
-RTC_Alarm_IRQHandler
-TIM12_IRQHandler
-TIM13_IRQHandler
-TIM14_IRQHandler
-FSMC_IRQHandler
-TIM5_IRQHandler
-SPI3_IRQHandler
-UART4_IRQHandler
-UART5_IRQHandler
-TIM6_IRQHandler
-TIM7_IRQHandler
-DMA2_Channel1_IRQHandler
-DMA2_Channel2_IRQHandler
-DMA2_Channel3_IRQHandler
-DMA2_Channel4_5_IRQHandler
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f102x6.s

@@ -1,283 +0,0 @@
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
-;* File Name          : startup_stm32f102x6.s
-;* Author             : MCD Application Team
-;* Description        : STM32F102x6 Devices vector table for MDK-ARM toolchain. 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Configure the clock system
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;******************************************************************************
-;* @attention
-;*
-;* Copyright (c) 2017-2021 STMicroelectronics.
-;* All rights reserved.
-;*
-;* This software is licensed under terms that can be found in the LICENSE file
-;* in the root directory of this software component.
-;* If no LICENSE file comes with this software, it is provided AS-IS.
-;*
-;******************************************************************************
-
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp               ; Top of Stack
-                DCD     Reset_Handler              ; Reset Handler
-                DCD     NMI_Handler                ; NMI Handler
-                DCD     HardFault_Handler          ; Hard Fault Handler
-                DCD     MemManage_Handler          ; MPU Fault Handler
-                DCD     BusFault_Handler           ; Bus Fault Handler
-                DCD     UsageFault_Handler         ; Usage Fault Handler
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     SVC_Handler                ; SVCall Handler
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
-                DCD     0                          ; Reserved
-                DCD     PendSV_Handler             ; PendSV Handler
-                DCD     SysTick_Handler            ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler            ; Window Watchdog
-                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
-                DCD     TAMPER_IRQHandler          ; Tamper
-                DCD     RTC_IRQHandler             ; RTC
-                DCD     FLASH_IRQHandler           ; Flash
-                DCD     RCC_IRQHandler             ; RCC
-                DCD     EXTI0_IRQHandler           ; EXTI Line 0
-                DCD     EXTI1_IRQHandler           ; EXTI Line 1
-                DCD     EXTI2_IRQHandler           ; EXTI Line 2
-                DCD     EXTI3_IRQHandler           ; EXTI Line 3
-                DCD     EXTI4_IRQHandler           ; EXTI Line 4
-                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
-                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
-                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
-                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
-                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
-                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
-                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
-                DCD     ADC1_IRQHandler            ; ADC1
-                DCD     USB_HP_IRQHandler          ; USB High Priority
-                DCD     USB_LP_IRQHandler          ; USB Low  Priority
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     TIM2_IRQHandler            ; TIM2
-                DCD     TIM3_IRQHandler            ; TIM3
-                DCD     0                          ; Reserved
-                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
-                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     SPI1_IRQHandler            ; SPI1
-                DCD     0                          ; Reserved
-                DCD     USART1_IRQHandler          ; USART1
-                DCD     USART2_IRQHandler          ; USART2
-                DCD     0                          ; Reserved
-                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
-                DCD     RTC_Alarm_IRQHandler        ; RTC Alarm through EXTI Line
-                DCD     USBWakeUp_IRQHandler       ; USB Wakeup from suspend
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler routine
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler             [WEAK]
-     IMPORT  __main
-     IMPORT  SystemInit
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler          [WEAK]
-                B       .
-                ENDP
-MemManage_Handler\
-                PROC
-                EXPORT  MemManage_Handler          [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler           [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler         [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                [WEAK]
-                B       .
-                ENDP
-DebugMon_Handler\
-                PROC
-                EXPORT  DebugMon_Handler           [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler             [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler            [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler            [WEAK]
-                EXPORT  PVD_IRQHandler             [WEAK]
-                EXPORT  TAMPER_IRQHandler          [WEAK]
-                EXPORT  RTC_IRQHandler             [WEAK]
-                EXPORT  FLASH_IRQHandler           [WEAK]
-                EXPORT  RCC_IRQHandler             [WEAK]
-                EXPORT  EXTI0_IRQHandler           [WEAK]
-                EXPORT  EXTI1_IRQHandler           [WEAK]
-                EXPORT  EXTI2_IRQHandler           [WEAK]
-                EXPORT  EXTI3_IRQHandler           [WEAK]
-                EXPORT  EXTI4_IRQHandler           [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
-                EXPORT  ADC1_IRQHandler            [WEAK]
-                EXPORT  USB_HP_IRQHandler          [WEAK]
-                EXPORT  USB_LP_IRQHandler          [WEAK]
-                EXPORT  EXTI9_5_IRQHandler         [WEAK]
-                EXPORT  TIM2_IRQHandler            [WEAK]
-                EXPORT  TIM3_IRQHandler            [WEAK]
-                EXPORT  I2C1_EV_IRQHandler         [WEAK]
-                EXPORT  I2C1_ER_IRQHandler         [WEAK]
-                EXPORT  SPI1_IRQHandler            [WEAK]
-                EXPORT  USART1_IRQHandler          [WEAK]
-                EXPORT  USART2_IRQHandler          [WEAK]
-                EXPORT  EXTI15_10_IRQHandler       [WEAK]
-                EXPORT  RTC_Alarm_IRQHandler        [WEAK]
-                EXPORT  USBWakeUp_IRQHandler       [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-TAMPER_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_IRQHandler
-EXTI1_IRQHandler
-EXTI2_IRQHandler
-EXTI3_IRQHandler
-EXTI4_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_IRQHandler
-DMA1_Channel3_IRQHandler
-DMA1_Channel4_IRQHandler
-DMA1_Channel5_IRQHandler
-DMA1_Channel6_IRQHandler
-DMA1_Channel7_IRQHandler
-ADC1_IRQHandler
-USB_HP_IRQHandler
-USB_LP_IRQHandler
-EXTI9_5_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-I2C1_EV_IRQHandler
-I2C1_ER_IRQHandler
-SPI1_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-EXTI15_10_IRQHandler
-RTC_Alarm_IRQHandler
-USBWakeUp_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f102xb.s

@@ -1,293 +0,0 @@
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
-;* File Name          : startup_stm32f102xb.s
-;* Author             : MCD Application Team
-;* Description        : STM32F102xB Devices vector table for MDK-ARM toolchain. 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Configure the clock system
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;******************************************************************************
-;* @attention
-;*
-;* Copyright (c) 2017-2021 STMicroelectronics.
-;* All rights reserved.
-;*
-;* This software is licensed under terms that can be found in the LICENSE file
-;* in the root directory of this software component.
-;* If no LICENSE file comes with this software, it is provided AS-IS.
-;*
-;******************************************************************************
-
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp               ; Top of Stack
-                DCD     Reset_Handler              ; Reset Handler
-                DCD     NMI_Handler                ; NMI Handler
-                DCD     HardFault_Handler          ; Hard Fault Handler
-                DCD     MemManage_Handler          ; MPU Fault Handler
-                DCD     BusFault_Handler           ; Bus Fault Handler
-                DCD     UsageFault_Handler         ; Usage Fault Handler
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     SVC_Handler                ; SVCall Handler
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
-                DCD     0                          ; Reserved
-                DCD     PendSV_Handler             ; PendSV Handler
-                DCD     SysTick_Handler            ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler            ; Window Watchdog
-                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
-                DCD     TAMPER_IRQHandler          ; Tamper
-                DCD     RTC_IRQHandler             ; RTC
-                DCD     FLASH_IRQHandler           ; Flash
-                DCD     RCC_IRQHandler             ; RCC
-                DCD     EXTI0_IRQHandler           ; EXTI Line 0
-                DCD     EXTI1_IRQHandler           ; EXTI Line 1
-                DCD     EXTI2_IRQHandler           ; EXTI Line 2
-                DCD     EXTI3_IRQHandler           ; EXTI Line 3
-                DCD     EXTI4_IRQHandler           ; EXTI Line 4
-                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
-                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
-                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
-                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
-                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
-                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
-                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
-                DCD     ADC1_IRQHandler            ; ADC1
-                DCD     USB_HP_IRQHandler          ; USB High Priority
-                DCD     USB_LP_IRQHandler          ; USB Low  Priority
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     TIM2_IRQHandler            ; TIM2
-                DCD     TIM3_IRQHandler            ; TIM3
-                DCD     TIM4_IRQHandler            ; TIM4
-                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
-                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
-                DCD     I2C2_EV_IRQHandler         ; I2C2 Event
-                DCD     I2C2_ER_IRQHandler         ; I2C2 Error
-                DCD     SPI1_IRQHandler            ; SPI1
-                DCD     SPI2_IRQHandler            ; SPI2
-                DCD     USART1_IRQHandler          ; USART1
-                DCD     USART2_IRQHandler          ; USART2
-                DCD     USART3_IRQHandler          ; USART3
-                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
-                DCD     RTC_Alarm_IRQHandler        ; RTC Alarm through EXTI Line
-                DCD     USBWakeUp_IRQHandler       ; USB Wakeup from suspend
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler             [WEAK]
-     IMPORT  __main
-     IMPORT  SystemInit
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler          [WEAK]
-                B       .
-                ENDP
-MemManage_Handler\
-                PROC
-                EXPORT  MemManage_Handler          [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler           [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler         [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                [WEAK]
-                B       .
-                ENDP
-DebugMon_Handler\
-                PROC
-                EXPORT  DebugMon_Handler           [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler             [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler            [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler            [WEAK]
-                EXPORT  PVD_IRQHandler             [WEAK]
-                EXPORT  TAMPER_IRQHandler          [WEAK]
-                EXPORT  RTC_IRQHandler             [WEAK]
-                EXPORT  FLASH_IRQHandler           [WEAK]
-                EXPORT  RCC_IRQHandler             [WEAK]
-                EXPORT  EXTI0_IRQHandler           [WEAK]
-                EXPORT  EXTI1_IRQHandler           [WEAK]
-                EXPORT  EXTI2_IRQHandler           [WEAK]
-                EXPORT  EXTI3_IRQHandler           [WEAK]
-                EXPORT  EXTI4_IRQHandler           [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
-                EXPORT  ADC1_IRQHandler            [WEAK]
-                EXPORT  USB_HP_IRQHandler          [WEAK]
-                EXPORT  USB_LP_IRQHandler          [WEAK]
-                EXPORT  EXTI9_5_IRQHandler         [WEAK]
-                EXPORT  TIM2_IRQHandler            [WEAK]
-                EXPORT  TIM3_IRQHandler            [WEAK]
-                EXPORT  TIM4_IRQHandler            [WEAK]
-                EXPORT  I2C1_EV_IRQHandler         [WEAK]
-                EXPORT  I2C1_ER_IRQHandler         [WEAK]
-                EXPORT  I2C2_EV_IRQHandler         [WEAK]
-                EXPORT  I2C2_ER_IRQHandler         [WEAK]
-                EXPORT  SPI1_IRQHandler            [WEAK]
-                EXPORT  SPI2_IRQHandler            [WEAK]
-                EXPORT  USART1_IRQHandler          [WEAK]
-                EXPORT  USART2_IRQHandler          [WEAK]
-                EXPORT  USART3_IRQHandler          [WEAK]
-                EXPORT  EXTI15_10_IRQHandler       [WEAK]
-                EXPORT  RTC_Alarm_IRQHandler        [WEAK]
-                EXPORT  USBWakeUp_IRQHandler       [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-TAMPER_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_IRQHandler
-EXTI1_IRQHandler
-EXTI2_IRQHandler
-EXTI3_IRQHandler
-EXTI4_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_IRQHandler
-DMA1_Channel3_IRQHandler
-DMA1_Channel4_IRQHandler
-DMA1_Channel5_IRQHandler
-DMA1_Channel6_IRQHandler
-DMA1_Channel7_IRQHandler
-ADC1_IRQHandler
-USB_HP_IRQHandler
-USB_LP_IRQHandler
-EXTI9_5_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-TIM4_IRQHandler
-I2C1_EV_IRQHandler
-I2C1_ER_IRQHandler
-I2C2_EV_IRQHandler
-I2C2_ER_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-USART3_IRQHandler
-EXTI15_10_IRQHandler
-RTC_Alarm_IRQHandler
-USBWakeUp_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB           
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f103x6.s

@@ -1,295 +0,0 @@
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
-;* File Name          : startup_stm32f103x6.s
-;* Author             : MCD Application Team
-;* Description        : STM32F103x6 Devices vector table for MDK-ARM toolchain. 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Configure the clock system
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;******************************************************************************
-;* @attention
-;*
-;* Copyright (c) 2017-2021 STMicroelectronics.
-;* All rights reserved.
-;*
-;* This software is licensed under terms that can be found in the LICENSE file
-;* in the root directory of this software component.
-;* If no LICENSE file comes with this software, it is provided AS-IS.
-;*
-;******************************************************************************
-
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp               ; Top of Stack
-                DCD     Reset_Handler              ; Reset Handler
-                DCD     NMI_Handler                ; NMI Handler
-                DCD     HardFault_Handler          ; Hard Fault Handler
-                DCD     MemManage_Handler          ; MPU Fault Handler
-                DCD     BusFault_Handler           ; Bus Fault Handler
-                DCD     UsageFault_Handler         ; Usage Fault Handler
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     SVC_Handler                ; SVCall Handler
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
-                DCD     0                          ; Reserved
-                DCD     PendSV_Handler             ; PendSV Handler
-                DCD     SysTick_Handler            ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler            ; Window Watchdog
-                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
-                DCD     TAMPER_IRQHandler          ; Tamper
-                DCD     RTC_IRQHandler             ; RTC
-                DCD     FLASH_IRQHandler           ; Flash
-                DCD     RCC_IRQHandler             ; RCC
-                DCD     EXTI0_IRQHandler           ; EXTI Line 0
-                DCD     EXTI1_IRQHandler           ; EXTI Line 1
-                DCD     EXTI2_IRQHandler           ; EXTI Line 2
-                DCD     EXTI3_IRQHandler           ; EXTI Line 3
-                DCD     EXTI4_IRQHandler           ; EXTI Line 4
-                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
-                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
-                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
-                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
-                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
-                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
-                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
-                DCD     ADC1_2_IRQHandler          ; ADC1_2
-                DCD     USB_HP_CAN1_TX_IRQHandler  ; USB High Priority or CAN1 TX
-                DCD     USB_LP_CAN1_RX0_IRQHandler ; USB Low  Priority or CAN1 RX0
-                DCD     CAN1_RX1_IRQHandler        ; CAN1 RX1
-                DCD     CAN1_SCE_IRQHandler        ; CAN1 SCE
-                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
-                DCD     TIM1_BRK_IRQHandler        ; TIM1 Break
-                DCD     TIM1_UP_IRQHandler         ; TIM1 Update
-                DCD     TIM1_TRG_COM_IRQHandler    ; TIM1 Trigger and Commutation
-                DCD     TIM1_CC_IRQHandler         ; TIM1 Capture Compare
-                DCD     TIM2_IRQHandler            ; TIM2
-                DCD     TIM3_IRQHandler            ; TIM3
-                DCD     0                          ; Reserved
-                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
-                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     SPI1_IRQHandler            ; SPI1
-                DCD     0                          ; Reserved
-                DCD     USART1_IRQHandler          ; USART1
-                DCD     USART2_IRQHandler          ; USART2
-                DCD     0                          ; Reserved
-                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
-                DCD     RTC_Alarm_IRQHandler        ; RTC Alarm through EXTI Line
-                DCD     USBWakeUp_IRQHandler       ; USB Wakeup from suspend
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler routine
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler             [WEAK]
-     IMPORT  __main
-     IMPORT  SystemInit
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler          [WEAK]
-                B       .
-                ENDP
-MemManage_Handler\
-                PROC
-                EXPORT  MemManage_Handler          [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler           [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler         [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                [WEAK]
-                B       .
-                ENDP
-DebugMon_Handler\
-                PROC
-                EXPORT  DebugMon_Handler           [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler             [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler            [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler            [WEAK]
-                EXPORT  PVD_IRQHandler             [WEAK]
-                EXPORT  TAMPER_IRQHandler          [WEAK]
-                EXPORT  RTC_IRQHandler             [WEAK]
-                EXPORT  FLASH_IRQHandler           [WEAK]
-                EXPORT  RCC_IRQHandler             [WEAK]
-                EXPORT  EXTI0_IRQHandler           [WEAK]
-                EXPORT  EXTI1_IRQHandler           [WEAK]
-                EXPORT  EXTI2_IRQHandler           [WEAK]
-                EXPORT  EXTI3_IRQHandler           [WEAK]
-                EXPORT  EXTI4_IRQHandler           [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
-                EXPORT  ADC1_2_IRQHandler          [WEAK]
-                EXPORT  USB_HP_CAN1_TX_IRQHandler  [WEAK]
-                EXPORT  USB_LP_CAN1_RX0_IRQHandler [WEAK]
-                EXPORT  CAN1_RX1_IRQHandler        [WEAK]
-                EXPORT  CAN1_SCE_IRQHandler        [WEAK]
-                EXPORT  EXTI9_5_IRQHandler         [WEAK]
-                EXPORT  TIM1_BRK_IRQHandler        [WEAK]
-                EXPORT  TIM1_UP_IRQHandler         [WEAK]
-                EXPORT  TIM1_TRG_COM_IRQHandler    [WEAK]
-                EXPORT  TIM1_CC_IRQHandler         [WEAK]
-                EXPORT  TIM2_IRQHandler            [WEAK]
-                EXPORT  TIM3_IRQHandler            [WEAK]
-                EXPORT  I2C1_EV_IRQHandler         [WEAK]
-                EXPORT  I2C1_ER_IRQHandler         [WEAK]
-                EXPORT  SPI1_IRQHandler            [WEAK]
-                EXPORT  USART1_IRQHandler          [WEAK]
-                EXPORT  USART2_IRQHandler          [WEAK]
-                EXPORT  EXTI15_10_IRQHandler       [WEAK]
-                EXPORT  RTC_Alarm_IRQHandler        [WEAK]
-                EXPORT  USBWakeUp_IRQHandler       [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-TAMPER_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_IRQHandler
-EXTI1_IRQHandler
-EXTI2_IRQHandler
-EXTI3_IRQHandler
-EXTI4_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_IRQHandler
-DMA1_Channel3_IRQHandler
-DMA1_Channel4_IRQHandler
-DMA1_Channel5_IRQHandler
-DMA1_Channel6_IRQHandler
-DMA1_Channel7_IRQHandler
-ADC1_2_IRQHandler
-USB_HP_CAN1_TX_IRQHandler
-USB_LP_CAN1_RX0_IRQHandler
-CAN1_RX1_IRQHandler
-CAN1_SCE_IRQHandler
-EXTI9_5_IRQHandler
-TIM1_BRK_IRQHandler
-TIM1_UP_IRQHandler
-TIM1_TRG_COM_IRQHandler
-TIM1_CC_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-I2C1_EV_IRQHandler
-I2C1_ER_IRQHandler
-SPI1_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-EXTI15_10_IRQHandler
-RTC_Alarm_IRQHandler
-USBWakeUp_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f103xb.s

@@ -1,305 +0,0 @@
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
-;* File Name          : startup_stm32f103xb.s
-;* Author             : MCD Application Team
-;* Description        : STM32F103xB Devices vector table for MDK-ARM toolchain. 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Configure the clock system
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;******************************************************************************
-;* @attention
-;*
-;* Copyright (c) 2017-2021 STMicroelectronics.
-;* All rights reserved.
-;*
-;* This software is licensed under terms that can be found in the LICENSE file
-;* in the root directory of this software component.
-;* If no LICENSE file comes with this software, it is provided AS-IS.
-;*
-;******************************************************************************
-
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp               ; Top of Stack
-                DCD     Reset_Handler              ; Reset Handler
-                DCD     NMI_Handler                ; NMI Handler
-                DCD     HardFault_Handler          ; Hard Fault Handler
-                DCD     MemManage_Handler          ; MPU Fault Handler
-                DCD     BusFault_Handler           ; Bus Fault Handler
-                DCD     UsageFault_Handler         ; Usage Fault Handler
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     SVC_Handler                ; SVCall Handler
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
-                DCD     0                          ; Reserved
-                DCD     PendSV_Handler             ; PendSV Handler
-                DCD     SysTick_Handler            ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler            ; Window Watchdog
-                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
-                DCD     TAMPER_IRQHandler          ; Tamper
-                DCD     RTC_IRQHandler             ; RTC
-                DCD     FLASH_IRQHandler           ; Flash
-                DCD     RCC_IRQHandler             ; RCC
-                DCD     EXTI0_IRQHandler           ; EXTI Line 0
-                DCD     EXTI1_IRQHandler           ; EXTI Line 1
-                DCD     EXTI2_IRQHandler           ; EXTI Line 2
-                DCD     EXTI3_IRQHandler           ; EXTI Line 3
-                DCD     EXTI4_IRQHandler           ; EXTI Line 4
-                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
-                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
-                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
-                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
-                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
-                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
-                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
-                DCD     ADC1_2_IRQHandler          ; ADC1_2
-                DCD     USB_HP_CAN1_TX_IRQHandler  ; USB High Priority or CAN1 TX
-                DCD     USB_LP_CAN1_RX0_IRQHandler ; USB Low  Priority or CAN1 RX0
-                DCD     CAN1_RX1_IRQHandler        ; CAN1 RX1
-                DCD     CAN1_SCE_IRQHandler        ; CAN1 SCE
-                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
-                DCD     TIM1_BRK_IRQHandler        ; TIM1 Break
-                DCD     TIM1_UP_IRQHandler         ; TIM1 Update
-                DCD     TIM1_TRG_COM_IRQHandler    ; TIM1 Trigger and Commutation
-                DCD     TIM1_CC_IRQHandler         ; TIM1 Capture Compare
-                DCD     TIM2_IRQHandler            ; TIM2
-                DCD     TIM3_IRQHandler            ; TIM3
-                DCD     TIM4_IRQHandler            ; TIM4
-                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
-                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
-                DCD     I2C2_EV_IRQHandler         ; I2C2 Event
-                DCD     I2C2_ER_IRQHandler         ; I2C2 Error
-                DCD     SPI1_IRQHandler            ; SPI1
-                DCD     SPI2_IRQHandler            ; SPI2
-                DCD     USART1_IRQHandler          ; USART1
-                DCD     USART2_IRQHandler          ; USART2
-                DCD     USART3_IRQHandler          ; USART3
-                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
-                DCD     RTC_Alarm_IRQHandler        ; RTC Alarm through EXTI Line
-                DCD     USBWakeUp_IRQHandler       ; USB Wakeup from suspend
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler             [WEAK]
-     IMPORT  __main
-     IMPORT  SystemInit
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler          [WEAK]
-                B       .
-                ENDP
-MemManage_Handler\
-                PROC
-                EXPORT  MemManage_Handler          [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler           [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler         [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                [WEAK]
-                B       .
-                ENDP
-DebugMon_Handler\
-                PROC
-                EXPORT  DebugMon_Handler           [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler             [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler            [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler            [WEAK]
-                EXPORT  PVD_IRQHandler             [WEAK]
-                EXPORT  TAMPER_IRQHandler          [WEAK]
-                EXPORT  RTC_IRQHandler             [WEAK]
-                EXPORT  FLASH_IRQHandler           [WEAK]
-                EXPORT  RCC_IRQHandler             [WEAK]
-                EXPORT  EXTI0_IRQHandler           [WEAK]
-                EXPORT  EXTI1_IRQHandler           [WEAK]
-                EXPORT  EXTI2_IRQHandler           [WEAK]
-                EXPORT  EXTI3_IRQHandler           [WEAK]
-                EXPORT  EXTI4_IRQHandler           [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
-                EXPORT  ADC1_2_IRQHandler          [WEAK]
-                EXPORT  USB_HP_CAN1_TX_IRQHandler  [WEAK]
-                EXPORT  USB_LP_CAN1_RX0_IRQHandler [WEAK]
-                EXPORT  CAN1_RX1_IRQHandler        [WEAK]
-                EXPORT  CAN1_SCE_IRQHandler        [WEAK]
-                EXPORT  EXTI9_5_IRQHandler         [WEAK]
-                EXPORT  TIM1_BRK_IRQHandler        [WEAK]
-                EXPORT  TIM1_UP_IRQHandler         [WEAK]
-                EXPORT  TIM1_TRG_COM_IRQHandler    [WEAK]
-                EXPORT  TIM1_CC_IRQHandler         [WEAK]
-                EXPORT  TIM2_IRQHandler            [WEAK]
-                EXPORT  TIM3_IRQHandler            [WEAK]
-                EXPORT  TIM4_IRQHandler            [WEAK]
-                EXPORT  I2C1_EV_IRQHandler         [WEAK]
-                EXPORT  I2C1_ER_IRQHandler         [WEAK]
-                EXPORT  I2C2_EV_IRQHandler         [WEAK]
-                EXPORT  I2C2_ER_IRQHandler         [WEAK]
-                EXPORT  SPI1_IRQHandler            [WEAK]
-                EXPORT  SPI2_IRQHandler            [WEAK]
-                EXPORT  USART1_IRQHandler          [WEAK]
-                EXPORT  USART2_IRQHandler          [WEAK]
-                EXPORT  USART3_IRQHandler          [WEAK]
-                EXPORT  EXTI15_10_IRQHandler       [WEAK]
-                EXPORT  RTC_Alarm_IRQHandler        [WEAK]
-                EXPORT  USBWakeUp_IRQHandler       [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-TAMPER_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_IRQHandler
-EXTI1_IRQHandler
-EXTI2_IRQHandler
-EXTI3_IRQHandler
-EXTI4_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_IRQHandler
-DMA1_Channel3_IRQHandler
-DMA1_Channel4_IRQHandler
-DMA1_Channel5_IRQHandler
-DMA1_Channel6_IRQHandler
-DMA1_Channel7_IRQHandler
-ADC1_2_IRQHandler
-USB_HP_CAN1_TX_IRQHandler
-USB_LP_CAN1_RX0_IRQHandler
-CAN1_RX1_IRQHandler
-CAN1_SCE_IRQHandler
-EXTI9_5_IRQHandler
-TIM1_BRK_IRQHandler
-TIM1_UP_IRQHandler
-TIM1_TRG_COM_IRQHandler
-TIM1_CC_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-TIM4_IRQHandler
-I2C1_EV_IRQHandler
-I2C1_ER_IRQHandler
-I2C2_EV_IRQHandler
-I2C2_ER_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-USART3_IRQHandler
-EXTI15_10_IRQHandler
-RTC_Alarm_IRQHandler
-USBWakeUp_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB           
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f103xe.s

@@ -1,354 +0,0 @@
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
-;* File Name          : startup_stm32f103xe.s
-;* Author             : MCD Application Team
-;* Description        : STM32F103xE Devices vector table for MDK-ARM toolchain. 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Configure the clock system
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;******************************************************************************
-;* @attention
-;*
-;* Copyright (c) 2017-2021 STMicroelectronics.
-;* All rights reserved.
-;*
-;* This software is licensed under terms that can be found in the LICENSE file
-;* in the root directory of this software component.
-;* If no LICENSE file comes with this software, it is provided AS-IS.
-;*
-;******************************************************************************
-
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-                                                  
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp               ; Top of Stack
-                DCD     Reset_Handler              ; Reset Handler
-                DCD     NMI_Handler                ; NMI Handler
-                DCD     HardFault_Handler          ; Hard Fault Handler
-                DCD     MemManage_Handler          ; MPU Fault Handler
-                DCD     BusFault_Handler           ; Bus Fault Handler
-                DCD     UsageFault_Handler         ; Usage Fault Handler
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     SVC_Handler                ; SVCall Handler
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
-                DCD     0                          ; Reserved
-                DCD     PendSV_Handler             ; PendSV Handler
-                DCD     SysTick_Handler            ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler            ; Window Watchdog
-                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
-                DCD     TAMPER_IRQHandler          ; Tamper
-                DCD     RTC_IRQHandler             ; RTC
-                DCD     FLASH_IRQHandler           ; Flash
-                DCD     RCC_IRQHandler             ; RCC
-                DCD     EXTI0_IRQHandler           ; EXTI Line 0
-                DCD     EXTI1_IRQHandler           ; EXTI Line 1
-                DCD     EXTI2_IRQHandler           ; EXTI Line 2
-                DCD     EXTI3_IRQHandler           ; EXTI Line 3
-                DCD     EXTI4_IRQHandler           ; EXTI Line 4
-                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
-                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
-                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
-                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
-                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
-                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
-                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
-                DCD     ADC1_2_IRQHandler          ; ADC1 & ADC2
-                DCD     USB_HP_CAN1_TX_IRQHandler  ; USB High Priority or CAN1 TX
-                DCD     USB_LP_CAN1_RX0_IRQHandler ; USB Low  Priority or CAN1 RX0
-                DCD     CAN1_RX1_IRQHandler        ; CAN1 RX1
-                DCD     CAN1_SCE_IRQHandler        ; CAN1 SCE
-                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
-                DCD     TIM1_BRK_IRQHandler        ; TIM1 Break
-                DCD     TIM1_UP_IRQHandler         ; TIM1 Update
-                DCD     TIM1_TRG_COM_IRQHandler    ; TIM1 Trigger and Commutation
-                DCD     TIM1_CC_IRQHandler         ; TIM1 Capture Compare
-                DCD     TIM2_IRQHandler            ; TIM2
-                DCD     TIM3_IRQHandler            ; TIM3
-                DCD     TIM4_IRQHandler            ; TIM4
-                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
-                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
-                DCD     I2C2_EV_IRQHandler         ; I2C2 Event
-                DCD     I2C2_ER_IRQHandler         ; I2C2 Error
-                DCD     SPI1_IRQHandler            ; SPI1
-                DCD     SPI2_IRQHandler            ; SPI2
-                DCD     USART1_IRQHandler          ; USART1
-                DCD     USART2_IRQHandler          ; USART2
-                DCD     USART3_IRQHandler          ; USART3
-                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
-                DCD     RTC_Alarm_IRQHandler        ; RTC Alarm through EXTI Line
-                DCD     USBWakeUp_IRQHandler       ; USB Wakeup from suspend
-                DCD     TIM8_BRK_IRQHandler        ; TIM8 Break
-                DCD     TIM8_UP_IRQHandler         ; TIM8 Update
-                DCD     TIM8_TRG_COM_IRQHandler    ; TIM8 Trigger and Commutation
-                DCD     TIM8_CC_IRQHandler         ; TIM8 Capture Compare
-                DCD     ADC3_IRQHandler            ; ADC3
-                DCD     FSMC_IRQHandler            ; FSMC
-                DCD     SDIO_IRQHandler            ; SDIO
-                DCD     TIM5_IRQHandler            ; TIM5
-                DCD     SPI3_IRQHandler            ; SPI3
-                DCD     UART4_IRQHandler           ; UART4
-                DCD     UART5_IRQHandler           ; UART5
-                DCD     TIM6_IRQHandler            ; TIM6
-                DCD     TIM7_IRQHandler            ; TIM7
-                DCD     DMA2_Channel1_IRQHandler   ; DMA2 Channel1
-                DCD     DMA2_Channel2_IRQHandler   ; DMA2 Channel2
-                DCD     DMA2_Channel3_IRQHandler   ; DMA2 Channel3
-                DCD     DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-                
-; Reset handler
-Reset_Handler   PROC
-                EXPORT  Reset_Handler             [WEAK]
-                IMPORT  __main
-                IMPORT  SystemInit
-                LDR     R0, =SystemInit
-                BLX     R0               
-                LDR     R0, =__main
-                BX      R0
-                ENDP
-                
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler          [WEAK]
-                B       .
-                ENDP
-MemManage_Handler\
-                PROC
-                EXPORT  MemManage_Handler          [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler           [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler         [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                [WEAK]
-                B       .
-                ENDP
-DebugMon_Handler\
-                PROC
-                EXPORT  DebugMon_Handler           [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler             [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler            [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler            [WEAK]
-                EXPORT  PVD_IRQHandler             [WEAK]
-                EXPORT  TAMPER_IRQHandler          [WEAK]
-                EXPORT  RTC_IRQHandler             [WEAK]
-                EXPORT  FLASH_IRQHandler           [WEAK]
-                EXPORT  RCC_IRQHandler             [WEAK]
-                EXPORT  EXTI0_IRQHandler           [WEAK]
-                EXPORT  EXTI1_IRQHandler           [WEAK]
-                EXPORT  EXTI2_IRQHandler           [WEAK]
-                EXPORT  EXTI3_IRQHandler           [WEAK]
-                EXPORT  EXTI4_IRQHandler           [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
-                EXPORT  ADC1_2_IRQHandler          [WEAK]
-                EXPORT  USB_HP_CAN1_TX_IRQHandler  [WEAK]
-                EXPORT  USB_LP_CAN1_RX0_IRQHandler [WEAK]
-                EXPORT  CAN1_RX1_IRQHandler        [WEAK]
-                EXPORT  CAN1_SCE_IRQHandler        [WEAK]
-                EXPORT  EXTI9_5_IRQHandler         [WEAK]
-                EXPORT  TIM1_BRK_IRQHandler        [WEAK]
-                EXPORT  TIM1_UP_IRQHandler         [WEAK]
-                EXPORT  TIM1_TRG_COM_IRQHandler    [WEAK]
-                EXPORT  TIM1_CC_IRQHandler         [WEAK]
-                EXPORT  TIM2_IRQHandler            [WEAK]
-                EXPORT  TIM3_IRQHandler            [WEAK]
-                EXPORT  TIM4_IRQHandler            [WEAK]
-                EXPORT  I2C1_EV_IRQHandler         [WEAK]
-                EXPORT  I2C1_ER_IRQHandler         [WEAK]
-                EXPORT  I2C2_EV_IRQHandler         [WEAK]
-                EXPORT  I2C2_ER_IRQHandler         [WEAK]
-                EXPORT  SPI1_IRQHandler            [WEAK]
-                EXPORT  SPI2_IRQHandler            [WEAK]
-                EXPORT  USART1_IRQHandler          [WEAK]
-                EXPORT  USART2_IRQHandler          [WEAK]
-                EXPORT  USART3_IRQHandler          [WEAK]
-                EXPORT  EXTI15_10_IRQHandler       [WEAK]
-                EXPORT  RTC_Alarm_IRQHandler        [WEAK]
-                EXPORT  USBWakeUp_IRQHandler       [WEAK]
-                EXPORT  TIM8_BRK_IRQHandler        [WEAK]
-                EXPORT  TIM8_UP_IRQHandler         [WEAK]
-                EXPORT  TIM8_TRG_COM_IRQHandler    [WEAK]
-                EXPORT  TIM8_CC_IRQHandler         [WEAK]
-                EXPORT  ADC3_IRQHandler            [WEAK]
-                EXPORT  FSMC_IRQHandler            [WEAK]
-                EXPORT  SDIO_IRQHandler            [WEAK]
-                EXPORT  TIM5_IRQHandler            [WEAK]
-                EXPORT  SPI3_IRQHandler            [WEAK]
-                EXPORT  UART4_IRQHandler           [WEAK]
-                EXPORT  UART5_IRQHandler           [WEAK]
-                EXPORT  TIM6_IRQHandler            [WEAK]
-                EXPORT  TIM7_IRQHandler            [WEAK]
-                EXPORT  DMA2_Channel1_IRQHandler   [WEAK]
-                EXPORT  DMA2_Channel2_IRQHandler   [WEAK]
-                EXPORT  DMA2_Channel3_IRQHandler   [WEAK]
-                EXPORT  DMA2_Channel4_5_IRQHandler [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-TAMPER_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_IRQHandler
-EXTI1_IRQHandler
-EXTI2_IRQHandler
-EXTI3_IRQHandler
-EXTI4_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_IRQHandler
-DMA1_Channel3_IRQHandler
-DMA1_Channel4_IRQHandler
-DMA1_Channel5_IRQHandler
-DMA1_Channel6_IRQHandler
-DMA1_Channel7_IRQHandler
-ADC1_2_IRQHandler
-USB_HP_CAN1_TX_IRQHandler
-USB_LP_CAN1_RX0_IRQHandler
-CAN1_RX1_IRQHandler
-CAN1_SCE_IRQHandler
-EXTI9_5_IRQHandler
-TIM1_BRK_IRQHandler
-TIM1_UP_IRQHandler
-TIM1_TRG_COM_IRQHandler
-TIM1_CC_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-TIM4_IRQHandler
-I2C1_EV_IRQHandler
-I2C1_ER_IRQHandler
-I2C2_EV_IRQHandler
-I2C2_ER_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-USART3_IRQHandler
-EXTI15_10_IRQHandler
-RTC_Alarm_IRQHandler
-USBWakeUp_IRQHandler
-TIM8_BRK_IRQHandler
-TIM8_UP_IRQHandler
-TIM8_TRG_COM_IRQHandler
-TIM8_CC_IRQHandler
-ADC3_IRQHandler
-FSMC_IRQHandler
-SDIO_IRQHandler
-TIM5_IRQHandler
-SPI3_IRQHandler
-UART4_IRQHandler
-UART5_IRQHandler
-TIM6_IRQHandler
-TIM7_IRQHandler
-DMA2_Channel1_IRQHandler
-DMA2_Channel2_IRQHandler
-DMA2_Channel3_IRQHandler
-DMA2_Channel4_5_IRQHandler
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f103xg.s

@@ -1,354 +0,0 @@
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
-;* File Name          : startup_stm32f103xg.s
-;* Author             : MCD Application Team
-;* Description        : STM32F103xG Devices vector table for MDK-ARM toolchain. 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Configure the clock system
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;******************************************************************************
-;* @attention
-;*
-;* Copyright (c) 2017-2021 STMicroelectronics.
-;* All rights reserved.
-;*
-;* This software is licensed under terms that can be found in the LICENSE file
-;* in the root directory of this software component.
-;* If no LICENSE file comes with this software, it is provided AS-IS.
-;*
-;******************************************************************************
-
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-                                                  
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp               ; Top of Stack
-                DCD     Reset_Handler              ; Reset Handler
-                DCD     NMI_Handler                ; NMI Handler
-                DCD     HardFault_Handler          ; Hard Fault Handler
-                DCD     MemManage_Handler          ; MPU Fault Handler
-                DCD     BusFault_Handler           ; Bus Fault Handler
-                DCD     UsageFault_Handler         ; Usage Fault Handler
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     SVC_Handler                ; SVCall Handler
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
-                DCD     0                          ; Reserved
-                DCD     PendSV_Handler             ; PendSV Handler
-                DCD     SysTick_Handler            ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler               ; Window Watchdog
-                DCD     PVD_IRQHandler                ; PVD through EXTI Line detect
-                DCD     TAMPER_IRQHandler             ; Tamper
-                DCD     RTC_IRQHandler                ; RTC
-                DCD     FLASH_IRQHandler              ; Flash
-                DCD     RCC_IRQHandler                ; RCC
-                DCD     EXTI0_IRQHandler              ; EXTI Line 0
-                DCD     EXTI1_IRQHandler              ; EXTI Line 1
-                DCD     EXTI2_IRQHandler              ; EXTI Line 2
-                DCD     EXTI3_IRQHandler              ; EXTI Line 3
-                DCD     EXTI4_IRQHandler              ; EXTI Line 4
-                DCD     DMA1_Channel1_IRQHandler      ; DMA1 Channel 1
-                DCD     DMA1_Channel2_IRQHandler      ; DMA1 Channel 2
-                DCD     DMA1_Channel3_IRQHandler      ; DMA1 Channel 3
-                DCD     DMA1_Channel4_IRQHandler      ; DMA1 Channel 4
-                DCD     DMA1_Channel5_IRQHandler      ; DMA1 Channel 5
-                DCD     DMA1_Channel6_IRQHandler      ; DMA1 Channel 6
-                DCD     DMA1_Channel7_IRQHandler      ; DMA1 Channel 7
-                DCD     ADC1_2_IRQHandler             ; ADC1 & ADC2
-                DCD     USB_HP_CAN1_TX_IRQHandler     ; USB High Priority or CAN1 TX
-                DCD     USB_LP_CAN1_RX0_IRQHandler    ; USB Low  Priority or CAN1 RX0
-                DCD     CAN1_RX1_IRQHandler           ; CAN1 RX1
-                DCD     CAN1_SCE_IRQHandler           ; CAN1 SCE
-                DCD     EXTI9_5_IRQHandler            ; EXTI Line 9..5
-                DCD     TIM1_BRK_TIM9_IRQHandler      ; TIM1 Break and TIM9
-                DCD     TIM1_UP_TIM10_IRQHandler      ; TIM1 Update and TIM10
-                DCD     TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
-                DCD     TIM1_CC_IRQHandler            ; TIM1 Capture Compare
-                DCD     TIM2_IRQHandler               ; TIM2
-                DCD     TIM3_IRQHandler               ; TIM3
-                DCD     TIM4_IRQHandler               ; TIM4
-                DCD     I2C1_EV_IRQHandler            ; I2C1 Event
-                DCD     I2C1_ER_IRQHandler            ; I2C1 Error
-                DCD     I2C2_EV_IRQHandler            ; I2C2 Event
-                DCD     I2C2_ER_IRQHandler            ; I2C2 Error
-                DCD     SPI1_IRQHandler               ; SPI1
-                DCD     SPI2_IRQHandler               ; SPI2
-                DCD     USART1_IRQHandler             ; USART1
-                DCD     USART2_IRQHandler             ; USART2
-                DCD     USART3_IRQHandler             ; USART3
-                DCD     EXTI15_10_IRQHandler          ; EXTI Line 15..10
-                DCD     RTC_Alarm_IRQHandler           ; RTC Alarm through EXTI Line
-                DCD     USBWakeUp_IRQHandler          ; USB Wakeup from suspend
-                DCD     TIM8_BRK_TIM12_IRQHandler     ; TIM8 Break and TIM12
-                DCD     TIM8_UP_TIM13_IRQHandler      ; TIM8 Update and TIM13
-                DCD     TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
-                DCD     TIM8_CC_IRQHandler            ; TIM8 Capture Compare
-                DCD     ADC3_IRQHandler               ; ADC3
-                DCD     FSMC_IRQHandler               ; FSMC
-                DCD     SDIO_IRQHandler               ; SDIO
-                DCD     TIM5_IRQHandler               ; TIM5
-                DCD     SPI3_IRQHandler               ; SPI3
-                DCD     UART4_IRQHandler              ; UART4
-                DCD     UART5_IRQHandler              ; UART5
-                DCD     TIM6_IRQHandler               ; TIM6
-                DCD     TIM7_IRQHandler               ; TIM7
-                DCD     DMA2_Channel1_IRQHandler      ; DMA2 Channel1
-                DCD     DMA2_Channel2_IRQHandler      ; DMA2 Channel2
-                DCD     DMA2_Channel3_IRQHandler      ; DMA2 Channel3
-                DCD     DMA2_Channel4_5_IRQHandler    ; DMA2 Channel4 & Channel5
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-                
-; Reset handler
-Reset_Handler   PROC
-                EXPORT  Reset_Handler             [WEAK]
-                IMPORT  __main
-                IMPORT  SystemInit
-                LDR     R0, =SystemInit
-                BLX     R0               
-                LDR     R0, =__main
-                BX      R0
-                ENDP
-                
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler          [WEAK]
-                B       .
-                ENDP
-MemManage_Handler\
-                PROC
-                EXPORT  MemManage_Handler          [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler           [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler         [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                [WEAK]
-                B       .
-                ENDP
-DebugMon_Handler\
-                PROC
-                EXPORT  DebugMon_Handler           [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler             [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler            [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler               [WEAK]
-                EXPORT  PVD_IRQHandler                [WEAK]
-                EXPORT  TAMPER_IRQHandler             [WEAK]
-                EXPORT  RTC_IRQHandler                [WEAK]
-                EXPORT  FLASH_IRQHandler              [WEAK]
-                EXPORT  RCC_IRQHandler                [WEAK]
-                EXPORT  EXTI0_IRQHandler              [WEAK]
-                EXPORT  EXTI1_IRQHandler              [WEAK]
-                EXPORT  EXTI2_IRQHandler              [WEAK]
-                EXPORT  EXTI3_IRQHandler              [WEAK]
-                EXPORT  EXTI4_IRQHandler              [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler      [WEAK]
-                EXPORT  DMA1_Channel2_IRQHandler      [WEAK]
-                EXPORT  DMA1_Channel3_IRQHandler      [WEAK]
-                EXPORT  DMA1_Channel4_IRQHandler      [WEAK]
-                EXPORT  DMA1_Channel5_IRQHandler      [WEAK]
-                EXPORT  DMA1_Channel6_IRQHandler      [WEAK]
-                EXPORT  DMA1_Channel7_IRQHandler      [WEAK]
-                EXPORT  ADC1_2_IRQHandler             [WEAK]
-                EXPORT  USB_HP_CAN1_TX_IRQHandler     [WEAK]
-                EXPORT  USB_LP_CAN1_RX0_IRQHandler    [WEAK]
-                EXPORT  CAN1_RX1_IRQHandler           [WEAK]
-                EXPORT  CAN1_SCE_IRQHandler           [WEAK]
-                EXPORT  EXTI9_5_IRQHandler            [WEAK]
-                EXPORT  TIM1_BRK_TIM9_IRQHandler      [WEAK]
-                EXPORT  TIM1_UP_TIM10_IRQHandler      [WEAK]
-                EXPORT  TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
-                EXPORT  TIM1_CC_IRQHandler            [WEAK]
-                EXPORT  TIM2_IRQHandler               [WEAK]
-                EXPORT  TIM3_IRQHandler               [WEAK]
-                EXPORT  TIM4_IRQHandler               [WEAK]
-                EXPORT  I2C1_EV_IRQHandler            [WEAK]
-                EXPORT  I2C1_ER_IRQHandler            [WEAK]
-                EXPORT  I2C2_EV_IRQHandler            [WEAK]
-                EXPORT  I2C2_ER_IRQHandler            [WEAK]
-                EXPORT  SPI1_IRQHandler               [WEAK]
-                EXPORT  SPI2_IRQHandler               [WEAK]
-                EXPORT  USART1_IRQHandler             [WEAK]
-                EXPORT  USART2_IRQHandler             [WEAK]
-                EXPORT  USART3_IRQHandler             [WEAK]
-                EXPORT  EXTI15_10_IRQHandler          [WEAK]
-                EXPORT  RTC_Alarm_IRQHandler           [WEAK]
-                EXPORT  USBWakeUp_IRQHandler          [WEAK]
-                EXPORT  TIM8_BRK_TIM12_IRQHandler     [WEAK]
-                EXPORT  TIM8_UP_TIM13_IRQHandler      [WEAK]
-                EXPORT  TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
-                EXPORT  TIM8_CC_IRQHandler            [WEAK]
-                EXPORT  ADC3_IRQHandler               [WEAK]
-                EXPORT  FSMC_IRQHandler               [WEAK]
-                EXPORT  SDIO_IRQHandler               [WEAK]
-                EXPORT  TIM5_IRQHandler               [WEAK]
-                EXPORT  SPI3_IRQHandler               [WEAK]
-                EXPORT  UART4_IRQHandler              [WEAK]
-                EXPORT  UART5_IRQHandler              [WEAK]
-                EXPORT  TIM6_IRQHandler               [WEAK]
-                EXPORT  TIM7_IRQHandler               [WEAK]
-                EXPORT  DMA2_Channel1_IRQHandler      [WEAK]
-                EXPORT  DMA2_Channel2_IRQHandler      [WEAK]
-                EXPORT  DMA2_Channel3_IRQHandler      [WEAK]
-                EXPORT  DMA2_Channel4_5_IRQHandler    [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-TAMPER_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_IRQHandler
-EXTI1_IRQHandler
-EXTI2_IRQHandler
-EXTI3_IRQHandler
-EXTI4_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_IRQHandler
-DMA1_Channel3_IRQHandler
-DMA1_Channel4_IRQHandler
-DMA1_Channel5_IRQHandler
-DMA1_Channel6_IRQHandler
-DMA1_Channel7_IRQHandler
-ADC1_2_IRQHandler
-USB_HP_CAN1_TX_IRQHandler
-USB_LP_CAN1_RX0_IRQHandler
-CAN1_RX1_IRQHandler
-CAN1_SCE_IRQHandler
-EXTI9_5_IRQHandler
-TIM1_BRK_TIM9_IRQHandler
-TIM1_UP_TIM10_IRQHandler
-TIM1_TRG_COM_TIM11_IRQHandler
-TIM1_CC_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-TIM4_IRQHandler
-I2C1_EV_IRQHandler
-I2C1_ER_IRQHandler
-I2C2_EV_IRQHandler
-I2C2_ER_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-USART3_IRQHandler
-EXTI15_10_IRQHandler
-RTC_Alarm_IRQHandler
-USBWakeUp_IRQHandler
-TIM8_BRK_TIM12_IRQHandler
-TIM8_UP_TIM13_IRQHandler
-TIM8_TRG_COM_TIM14_IRQHandler
-TIM8_CC_IRQHandler
-ADC3_IRQHandler
-FSMC_IRQHandler
-SDIO_IRQHandler
-TIM5_IRQHandler
-SPI3_IRQHandler
-UART4_IRQHandler
-UART5_IRQHandler
-TIM6_IRQHandler
-TIM7_IRQHandler
-DMA2_Channel1_IRQHandler
-DMA2_Channel2_IRQHandler
-DMA2_Channel3_IRQHandler
-DMA2_Channel4_5_IRQHandler
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f105xc.s

@@ -1,362 +0,0 @@
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
-;* File Name          : startup_stm32f105xc.s
-;* Author             : MCD Application Team
-;* Description        : STM32F105xC Devices vector table for MDK-ARM toolchain. 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Configure the clock system
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;******************************************************************************
-;* @attention
-;*
-;* Copyright (c) 2017-2021 STMicroelectronics.
-;* All rights reserved.
-;*
-;* This software is licensed under terms that can be found in the LICENSE file
-;* in the root directory of this software component.
-;* If no LICENSE file comes with this software, it is provided AS-IS.
-;*
-;******************************************************************************
-
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp               ; Top of Stack
-                DCD     Reset_Handler              ; Reset Handler
-                DCD     NMI_Handler                ; NMI Handler
-                DCD     HardFault_Handler          ; Hard Fault Handler
-                DCD     MemManage_Handler          ; MPU Fault Handler
-                DCD     BusFault_Handler           ; Bus Fault Handler
-                DCD     UsageFault_Handler         ; Usage Fault Handler
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     SVC_Handler                ; SVCall Handler
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
-                DCD     0                          ; Reserved
-                DCD     PendSV_Handler             ; PendSV Handler
-                DCD     SysTick_Handler            ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler            ; Window Watchdog
-                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
-                DCD     TAMPER_IRQHandler          ; Tamper
-                DCD     RTC_IRQHandler             ; RTC
-                DCD     FLASH_IRQHandler           ; Flash
-                DCD     RCC_IRQHandler             ; RCC
-                DCD     EXTI0_IRQHandler           ; EXTI Line 0
-                DCD     EXTI1_IRQHandler           ; EXTI Line 1
-                DCD     EXTI2_IRQHandler           ; EXTI Line 2
-                DCD     EXTI3_IRQHandler           ; EXTI Line 3
-                DCD     EXTI4_IRQHandler           ; EXTI Line 4
-                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
-                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
-                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
-                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
-                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
-                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
-                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
-                DCD     ADC1_2_IRQHandler          ; ADC1 and ADC2
-                DCD     CAN1_TX_IRQHandler         ; CAN1 TX
-                DCD     CAN1_RX0_IRQHandler        ; CAN1 RX0
-                DCD     CAN1_RX1_IRQHandler        ; CAN1 RX1
-                DCD     CAN1_SCE_IRQHandler        ; CAN1 SCE
-                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
-                DCD     TIM1_BRK_IRQHandler        ; TIM1 Break
-                DCD     TIM1_UP_IRQHandler         ; TIM1 Update
-                DCD     TIM1_TRG_COM_IRQHandler    ; TIM1 Trigger and Commutation
-                DCD     TIM1_CC_IRQHandler         ; TIM1 Capture Compare
-                DCD     TIM2_IRQHandler            ; TIM2
-                DCD     TIM3_IRQHandler            ; TIM3
-                DCD     TIM4_IRQHandler            ; TIM4
-                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
-                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
-                DCD     I2C2_EV_IRQHandler         ; I2C2 Event
-                DCD     I2C2_ER_IRQHandler         ; I2C1 Error
-                DCD     SPI1_IRQHandler            ; SPI1
-                DCD     SPI2_IRQHandler            ; SPI2
-                DCD     USART1_IRQHandler          ; USART1
-                DCD     USART2_IRQHandler          ; USART2
-                DCD     USART3_IRQHandler          ; USART3
-                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
-                DCD     RTC_Alarm_IRQHandler        ; RTC alarm through EXTI line
-                DCD     OTG_FS_WKUP_IRQHandler     ; USB OTG FS Wakeup through EXTI line
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     TIM5_IRQHandler            ; TIM5
-                DCD     SPI3_IRQHandler            ; SPI3
-                DCD     UART4_IRQHandler           ; UART4
-                DCD     UART5_IRQHandler           ; UART5
-                DCD     TIM6_IRQHandler            ; TIM6
-                DCD     TIM7_IRQHandler            ; TIM7
-                DCD     DMA2_Channel1_IRQHandler   ; DMA2 Channel1
-                DCD     DMA2_Channel2_IRQHandler   ; DMA2 Channel2
-                DCD     DMA2_Channel3_IRQHandler   ; DMA2 Channel3
-                DCD     DMA2_Channel4_IRQHandler   ; DMA2 Channel4
-                DCD     DMA2_Channel5_IRQHandler   ; DMA2 Channel5
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     CAN2_TX_IRQHandler         ; CAN2 TX
-                DCD     CAN2_RX0_IRQHandler        ; CAN2 RX0
-                DCD     CAN2_RX1_IRQHandler        ; CAN2 RX1
-                DCD     CAN2_SCE_IRQHandler        ; CAN2 SCE
-                DCD     OTG_FS_IRQHandler          ; USB OTG FS
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler             [WEAK]
-        IMPORT  SystemInit
-        IMPORT  __main
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler          [WEAK]
-                B       .
-                ENDP
-MemManage_Handler\
-                PROC
-                EXPORT  MemManage_Handler          [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler           [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler         [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                [WEAK]
-                B       .
-                ENDP
-DebugMon_Handler\
-                PROC
-                EXPORT  DebugMon_Handler           [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler             [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler            [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler            [WEAK]
-                EXPORT  PVD_IRQHandler             [WEAK]
-                EXPORT  TAMPER_IRQHandler          [WEAK]
-                EXPORT  RTC_IRQHandler             [WEAK]
-                EXPORT  FLASH_IRQHandler           [WEAK]
-                EXPORT  RCC_IRQHandler             [WEAK]
-                EXPORT  EXTI0_IRQHandler           [WEAK]
-                EXPORT  EXTI1_IRQHandler           [WEAK]
-                EXPORT  EXTI2_IRQHandler           [WEAK]
-                EXPORT  EXTI3_IRQHandler           [WEAK]
-                EXPORT  EXTI4_IRQHandler           [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
-                EXPORT  ADC1_2_IRQHandler          [WEAK]
-                EXPORT  CAN1_TX_IRQHandler         [WEAK]
-                EXPORT  CAN1_RX0_IRQHandler        [WEAK]
-                EXPORT  CAN1_RX1_IRQHandler        [WEAK]
-                EXPORT  CAN1_SCE_IRQHandler        [WEAK]
-                EXPORT  EXTI9_5_IRQHandler         [WEAK]
-                EXPORT  TIM1_BRK_IRQHandler        [WEAK]
-                EXPORT  TIM1_UP_IRQHandler         [WEAK]
-                EXPORT  TIM1_TRG_COM_IRQHandler    [WEAK]
-                EXPORT  TIM1_CC_IRQHandler         [WEAK]
-                EXPORT  TIM2_IRQHandler            [WEAK]
-                EXPORT  TIM3_IRQHandler            [WEAK]
-                EXPORT  TIM4_IRQHandler            [WEAK]
-                EXPORT  I2C1_EV_IRQHandler         [WEAK]
-                EXPORT  I2C1_ER_IRQHandler         [WEAK]
-                EXPORT  I2C2_EV_IRQHandler         [WEAK]
-                EXPORT  I2C2_ER_IRQHandler         [WEAK]
-                EXPORT  SPI1_IRQHandler            [WEAK]
-                EXPORT  SPI2_IRQHandler            [WEAK]
-                EXPORT  USART1_IRQHandler          [WEAK]
-                EXPORT  USART2_IRQHandler          [WEAK]
-                EXPORT  USART3_IRQHandler          [WEAK]
-                EXPORT  EXTI15_10_IRQHandler       [WEAK]
-                EXPORT  RTC_Alarm_IRQHandler        [WEAK]
-                EXPORT  OTG_FS_WKUP_IRQHandler     [WEAK]
-                EXPORT  TIM5_IRQHandler            [WEAK]
-                EXPORT  SPI3_IRQHandler            [WEAK]
-                EXPORT  UART4_IRQHandler           [WEAK]
-                EXPORT  UART5_IRQHandler           [WEAK]
-                EXPORT  TIM6_IRQHandler            [WEAK]
-                EXPORT  TIM7_IRQHandler            [WEAK]
-                EXPORT  DMA2_Channel1_IRQHandler   [WEAK]
-                EXPORT  DMA2_Channel2_IRQHandler   [WEAK]
-                EXPORT  DMA2_Channel3_IRQHandler   [WEAK]
-                EXPORT  DMA2_Channel4_IRQHandler   [WEAK]
-                EXPORT  DMA2_Channel5_IRQHandler   [WEAK]
-                EXPORT  CAN2_TX_IRQHandler         [WEAK]
-                EXPORT  CAN2_RX0_IRQHandler        [WEAK]
-                EXPORT  CAN2_RX1_IRQHandler        [WEAK]
-                EXPORT  CAN2_SCE_IRQHandler        [WEAK]
-                EXPORT  OTG_FS_IRQHandler          [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-TAMPER_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_IRQHandler
-EXTI1_IRQHandler
-EXTI2_IRQHandler
-EXTI3_IRQHandler
-EXTI4_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_IRQHandler
-DMA1_Channel3_IRQHandler
-DMA1_Channel4_IRQHandler
-DMA1_Channel5_IRQHandler
-DMA1_Channel6_IRQHandler
-DMA1_Channel7_IRQHandler
-ADC1_2_IRQHandler
-CAN1_TX_IRQHandler
-CAN1_RX0_IRQHandler
-CAN1_RX1_IRQHandler
-CAN1_SCE_IRQHandler
-EXTI9_5_IRQHandler
-TIM1_BRK_IRQHandler
-TIM1_UP_IRQHandler
-TIM1_TRG_COM_IRQHandler
-TIM1_CC_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-TIM4_IRQHandler
-I2C1_EV_IRQHandler
-I2C1_ER_IRQHandler
-I2C2_EV_IRQHandler
-I2C2_ER_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-USART3_IRQHandler
-EXTI15_10_IRQHandler
-RTC_Alarm_IRQHandler
-OTG_FS_WKUP_IRQHandler
-TIM5_IRQHandler
-SPI3_IRQHandler
-UART4_IRQHandler
-UART5_IRQHandler
-TIM6_IRQHandler
-TIM7_IRQHandler
-DMA2_Channel1_IRQHandler
-DMA2_Channel2_IRQHandler
-DMA2_Channel3_IRQHandler
-DMA2_Channel4_IRQHandler
-DMA2_Channel5_IRQHandler
-CAN2_TX_IRQHandler
-CAN2_RX0_IRQHandler
-CAN2_RX1_IRQHandler
-CAN2_SCE_IRQHandler
-OTG_FS_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f107xc.s

@@ -1,366 +0,0 @@
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
-;* File Name          : startup_stm32f107xc.s
-;* Author             : MCD Application Team
-;* Description        : STM32F107xC Devices vector table for MDK-ARM toolchain. 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Configure the clock system
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;******************************************************************************
-;* @attention
-;*
-;* Copyright (c) 2017-2021 STMicroelectronics.
-;* All rights reserved.
-;*
-;* This software is licensed under terms that can be found in the LICENSE file
-;* in the root directory of this software component.
-;* If no LICENSE file comes with this software, it is provided AS-IS.
-;*
-;******************************************************************************
-
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp               ; Top of Stack
-                DCD     Reset_Handler              ; Reset Handler
-                DCD     NMI_Handler                ; NMI Handler
-                DCD     HardFault_Handler          ; Hard Fault Handler
-                DCD     MemManage_Handler          ; MPU Fault Handler
-                DCD     BusFault_Handler           ; Bus Fault Handler
-                DCD     UsageFault_Handler         ; Usage Fault Handler
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     SVC_Handler                ; SVCall Handler
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
-                DCD     0                          ; Reserved
-                DCD     PendSV_Handler             ; PendSV Handler
-                DCD     SysTick_Handler            ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler            ; Window Watchdog
-                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
-                DCD     TAMPER_IRQHandler          ; Tamper
-                DCD     RTC_IRQHandler             ; RTC
-                DCD     FLASH_IRQHandler           ; Flash
-                DCD     RCC_IRQHandler             ; RCC
-                DCD     EXTI0_IRQHandler           ; EXTI Line 0
-                DCD     EXTI1_IRQHandler           ; EXTI Line 1
-                DCD     EXTI2_IRQHandler           ; EXTI Line 2
-                DCD     EXTI3_IRQHandler           ; EXTI Line 3
-                DCD     EXTI4_IRQHandler           ; EXTI Line 4
-                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
-                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
-                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
-                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
-                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
-                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
-                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
-                DCD     ADC1_2_IRQHandler          ; ADC1 and ADC2
-                DCD     CAN1_TX_IRQHandler         ; CAN1 TX
-                DCD     CAN1_RX0_IRQHandler        ; CAN1 RX0
-                DCD     CAN1_RX1_IRQHandler        ; CAN1 RX1
-                DCD     CAN1_SCE_IRQHandler        ; CAN1 SCE
-                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
-                DCD     TIM1_BRK_IRQHandler        ; TIM1 Break
-                DCD     TIM1_UP_IRQHandler         ; TIM1 Update
-                DCD     TIM1_TRG_COM_IRQHandler    ; TIM1 Trigger and Commutation
-                DCD     TIM1_CC_IRQHandler         ; TIM1 Capture Compare
-                DCD     TIM2_IRQHandler            ; TIM2
-                DCD     TIM3_IRQHandler            ; TIM3
-                DCD     TIM4_IRQHandler            ; TIM4
-                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
-                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
-                DCD     I2C2_EV_IRQHandler         ; I2C2 Event
-                DCD     I2C2_ER_IRQHandler         ; I2C1 Error
-                DCD     SPI1_IRQHandler            ; SPI1
-                DCD     SPI2_IRQHandler            ; SPI2
-                DCD     USART1_IRQHandler          ; USART1
-                DCD     USART2_IRQHandler          ; USART2
-                DCD     USART3_IRQHandler          ; USART3
-                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
-                DCD     RTC_Alarm_IRQHandler        ; RTC alarm through EXTI line
-                DCD     OTG_FS_WKUP_IRQHandler     ; USB OTG FS Wakeup through EXTI line
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     TIM5_IRQHandler            ; TIM5
-                DCD     SPI3_IRQHandler            ; SPI3
-                DCD     UART4_IRQHandler           ; UART4
-                DCD     UART5_IRQHandler           ; UART5
-                DCD     TIM6_IRQHandler            ; TIM6
-                DCD     TIM7_IRQHandler            ; TIM7
-                DCD     DMA2_Channel1_IRQHandler   ; DMA2 Channel1
-                DCD     DMA2_Channel2_IRQHandler   ; DMA2 Channel2
-                DCD     DMA2_Channel3_IRQHandler   ; DMA2 Channel3
-                DCD     DMA2_Channel4_IRQHandler   ; DMA2 Channel4
-                DCD     DMA2_Channel5_IRQHandler   ; DMA2 Channel5
-                DCD     ETH_IRQHandler             ; Ethernet
-                DCD     ETH_WKUP_IRQHandler        ; Ethernet Wakeup through EXTI line
-                DCD     CAN2_TX_IRQHandler         ; CAN2 TX
-                DCD     CAN2_RX0_IRQHandler        ; CAN2 RX0
-                DCD     CAN2_RX1_IRQHandler        ; CAN2 RX1
-                DCD     CAN2_SCE_IRQHandler        ; CAN2 SCE
-                DCD     OTG_FS_IRQHandler          ; USB OTG FS
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler             [WEAK]
-        IMPORT  SystemInit
-        IMPORT  __main
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler          [WEAK]
-                B       .
-                ENDP
-MemManage_Handler\
-                PROC
-                EXPORT  MemManage_Handler          [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler           [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler         [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                [WEAK]
-                B       .
-                ENDP
-DebugMon_Handler\
-                PROC
-                EXPORT  DebugMon_Handler           [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler             [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler            [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler            [WEAK]
-                EXPORT  PVD_IRQHandler             [WEAK]
-                EXPORT  TAMPER_IRQHandler          [WEAK]
-                EXPORT  RTC_IRQHandler             [WEAK]
-                EXPORT  FLASH_IRQHandler           [WEAK]
-                EXPORT  RCC_IRQHandler             [WEAK]
-                EXPORT  EXTI0_IRQHandler           [WEAK]
-                EXPORT  EXTI1_IRQHandler           [WEAK]
-                EXPORT  EXTI2_IRQHandler           [WEAK]
-                EXPORT  EXTI3_IRQHandler           [WEAK]
-                EXPORT  EXTI4_IRQHandler           [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
-                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
-                EXPORT  ADC1_2_IRQHandler          [WEAK]
-                EXPORT  CAN1_TX_IRQHandler         [WEAK]
-                EXPORT  CAN1_RX0_IRQHandler        [WEAK]
-                EXPORT  CAN1_RX1_IRQHandler        [WEAK]
-                EXPORT  CAN1_SCE_IRQHandler        [WEAK]
-                EXPORT  EXTI9_5_IRQHandler         [WEAK]
-                EXPORT  TIM1_BRK_IRQHandler        [WEAK]
-                EXPORT  TIM1_UP_IRQHandler         [WEAK]
-                EXPORT  TIM1_TRG_COM_IRQHandler    [WEAK]
-                EXPORT  TIM1_CC_IRQHandler         [WEAK]
-                EXPORT  TIM2_IRQHandler            [WEAK]
-                EXPORT  TIM3_IRQHandler            [WEAK]
-                EXPORT  TIM4_IRQHandler            [WEAK]
-                EXPORT  I2C1_EV_IRQHandler         [WEAK]
-                EXPORT  I2C1_ER_IRQHandler         [WEAK]
-                EXPORT  I2C2_EV_IRQHandler         [WEAK]
-                EXPORT  I2C2_ER_IRQHandler         [WEAK]
-                EXPORT  SPI1_IRQHandler            [WEAK]
-                EXPORT  SPI2_IRQHandler            [WEAK]
-                EXPORT  USART1_IRQHandler          [WEAK]
-                EXPORT  USART2_IRQHandler          [WEAK]
-                EXPORT  USART3_IRQHandler          [WEAK]
-                EXPORT  EXTI15_10_IRQHandler       [WEAK]
-                EXPORT  RTC_Alarm_IRQHandler        [WEAK]
-                EXPORT  OTG_FS_WKUP_IRQHandler     [WEAK]
-                EXPORT  TIM5_IRQHandler            [WEAK]
-                EXPORT  SPI3_IRQHandler            [WEAK]
-                EXPORT  UART4_IRQHandler           [WEAK]
-                EXPORT  UART5_IRQHandler           [WEAK]
-                EXPORT  TIM6_IRQHandler            [WEAK]
-                EXPORT  TIM7_IRQHandler            [WEAK]
-                EXPORT  DMA2_Channel1_IRQHandler   [WEAK]
-                EXPORT  DMA2_Channel2_IRQHandler   [WEAK]
-                EXPORT  DMA2_Channel3_IRQHandler   [WEAK]
-                EXPORT  DMA2_Channel4_IRQHandler   [WEAK]
-                EXPORT  DMA2_Channel5_IRQHandler   [WEAK]
-                EXPORT  ETH_IRQHandler             [WEAK]
-                EXPORT  ETH_WKUP_IRQHandler        [WEAK]
-                EXPORT  CAN2_TX_IRQHandler         [WEAK]
-                EXPORT  CAN2_RX0_IRQHandler        [WEAK]
-                EXPORT  CAN2_RX1_IRQHandler        [WEAK]
-                EXPORT  CAN2_SCE_IRQHandler        [WEAK]
-                EXPORT  OTG_FS_IRQHandler          [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-TAMPER_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_IRQHandler
-EXTI1_IRQHandler
-EXTI2_IRQHandler
-EXTI3_IRQHandler
-EXTI4_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_IRQHandler
-DMA1_Channel3_IRQHandler
-DMA1_Channel4_IRQHandler
-DMA1_Channel5_IRQHandler
-DMA1_Channel6_IRQHandler
-DMA1_Channel7_IRQHandler
-ADC1_2_IRQHandler
-CAN1_TX_IRQHandler
-CAN1_RX0_IRQHandler
-CAN1_RX1_IRQHandler
-CAN1_SCE_IRQHandler
-EXTI9_5_IRQHandler
-TIM1_BRK_IRQHandler
-TIM1_UP_IRQHandler
-TIM1_TRG_COM_IRQHandler
-TIM1_CC_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-TIM4_IRQHandler
-I2C1_EV_IRQHandler
-I2C1_ER_IRQHandler
-I2C2_EV_IRQHandler
-I2C2_ER_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-USART3_IRQHandler
-EXTI15_10_IRQHandler
-RTC_Alarm_IRQHandler
-OTG_FS_WKUP_IRQHandler
-TIM5_IRQHandler
-SPI3_IRQHandler
-UART4_IRQHandler
-UART5_IRQHandler
-TIM6_IRQHandler
-TIM7_IRQHandler
-DMA2_Channel1_IRQHandler
-DMA2_Channel2_IRQHandler
-DMA2_Channel3_IRQHandler
-DMA2_Channel4_IRQHandler
-DMA2_Channel5_IRQHandler
-ETH_IRQHandler
-ETH_WKUP_IRQHandler
-CAN2_TX_IRQHandler
-CAN2_RX0_IRQHandler
-CAN2_RX1_IRQHandler
-CAN2_SCE_IRQHandler
-OTG_FS_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f100xb.s

@@ -1,407 +0,0 @@
-/**
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
-  * @file      startup_stm32f100xb.s
-  * @author    MCD Application Team
-  * @brief     STM32F100xB Devices vector table for Atollic toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Configure the clock system   
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M3 processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * @attention
-  *
-  * Copyright (c) 2017-2021 STMicroelectronics.
-  * All rights reserved.
-  *
-  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m3
-  .fpu softvfp
-  .thumb
-
-.global g_pfnVectors
-.global Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word _sidata
-/* start address for the .data section. defined in linker script */
-.word _sdata
-/* end address for the .data section. defined in linker script */
-.word _edata
-/* start address for the .bss section. defined in linker script */
-.word _sbss
-/* end address for the .bss section. defined in linker script */
-.word _ebss
-
-.equ  BootRAM, 0xF108F85F
-/**
- * @brief  This is the code that gets called when the processor first
- *          starts execution following a reset event. Only the absolutely
- *          necessary set is performed, after which the application
- *          supplied main() routine is called.
- * @param  None
- * @retval : None
-*/
-
-  .section .text.Reset_Handler
-  .weak Reset_Handler
-  .type Reset_Handler, %function
-Reset_Handler:
-
-/* Call the clock system initialization function.*/
-    bl  SystemInit
-
-/* Copy the data segment initializers from flash to SRAM */
-  ldr r0, =_sdata
-  ldr r1, =_edata
-  ldr r2, =_sidata
-  movs r3, #0
-  b LoopCopyDataInit
-
-CopyDataInit:
-  ldr r4, [r2, r3]
-  str r4, [r0, r3]
-  adds r3, r3, #4
-
-LoopCopyDataInit:
-  adds r4, r0, r3
-  cmp r4, r1
-  bcc CopyDataInit
-  
-/* Zero fill the bss segment. */
-  ldr r2, =_sbss
-  ldr r4, =_ebss
-  movs r3, #0
-  b LoopFillZerobss
-
-FillZerobss:
-  str  r3, [r2]
-  adds r2, r2, #4
-
-LoopFillZerobss:
-  cmp r2, r4
-  bcc FillZerobss
-
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl main
-  bx lr
-.size Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b Infinite_Loop
-  .size Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-  .section .isr_vector,"a",%progbits
-  .type g_pfnVectors, %object
-  .size g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-  .word _estack
-  .word Reset_Handler
-  .word NMI_Handler
-  .word HardFault_Handler
-  .word MemManage_Handler
-  .word BusFault_Handler
-  .word UsageFault_Handler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word SVC_Handler
-  .word DebugMon_Handler
-  .word 0
-  .word PendSV_Handler
-  .word SysTick_Handler
-  .word WWDG_IRQHandler
-  .word PVD_IRQHandler
-  .word TAMPER_IRQHandler
-  .word RTC_IRQHandler
-  .word FLASH_IRQHandler
-  .word RCC_IRQHandler
-  .word EXTI0_IRQHandler
-  .word EXTI1_IRQHandler
-  .word EXTI2_IRQHandler
-  .word EXTI3_IRQHandler
-  .word EXTI4_IRQHandler
-  .word DMA1_Channel1_IRQHandler
-  .word DMA1_Channel2_IRQHandler
-  .word DMA1_Channel3_IRQHandler
-  .word DMA1_Channel4_IRQHandler
-  .word DMA1_Channel5_IRQHandler
-  .word DMA1_Channel6_IRQHandler
-  .word DMA1_Channel7_IRQHandler
-  .word ADC1_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word EXTI9_5_IRQHandler
-  .word TIM1_BRK_TIM15_IRQHandler
-  .word TIM1_UP_TIM16_IRQHandler
-  .word TIM1_TRG_COM_TIM17_IRQHandler
-  .word TIM1_CC_IRQHandler
-  .word TIM2_IRQHandler
-  .word TIM3_IRQHandler
-  .word TIM4_IRQHandler
-  .word I2C1_EV_IRQHandler
-  .word I2C1_ER_IRQHandler
-  .word I2C2_EV_IRQHandler
-  .word I2C2_ER_IRQHandler
-  .word SPI1_IRQHandler
-  .word SPI2_IRQHandler
-  .word USART1_IRQHandler
-  .word USART2_IRQHandler
-  .word USART3_IRQHandler
-  .word EXTI15_10_IRQHandler
-  .word RTC_Alarm_IRQHandler
-  .word CEC_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word TIM6_DAC_IRQHandler
-  .word TIM7_IRQHandler  
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word BootRAM          /* @0x01CC. This is for boot in RAM mode for 
-                            STM32F10xB Value Line devices. */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-    
-  .weak  NMI_Handler
-  .thumb_set NMI_Handler,Default_Handler
-  
-  .weak  HardFault_Handler
-  .thumb_set HardFault_Handler,Default_Handler
-  
-  .weak  MemManage_Handler
-  .thumb_set MemManage_Handler,Default_Handler
-  
-  .weak  BusFault_Handler
-  .thumb_set BusFault_Handler,Default_Handler
-
-  .weak  UsageFault_Handler
-  .thumb_set UsageFault_Handler,Default_Handler
-
-  .weak  SVC_Handler
-  .thumb_set SVC_Handler,Default_Handler
-
-  .weak  DebugMon_Handler
-  .thumb_set DebugMon_Handler,Default_Handler
-
-  .weak  PendSV_Handler
-  .thumb_set PendSV_Handler,Default_Handler
-
-  .weak  SysTick_Handler
-  .thumb_set SysTick_Handler,Default_Handler
-
-  .weak  WWDG_IRQHandler
-  .thumb_set WWDG_IRQHandler,Default_Handler
-
-  .weak  PVD_IRQHandler
-  .thumb_set PVD_IRQHandler,Default_Handler
-
-  .weak  TAMPER_IRQHandler
-  .thumb_set TAMPER_IRQHandler,Default_Handler
-
-  .weak  RTC_IRQHandler
-  .thumb_set RTC_IRQHandler,Default_Handler
-
-  .weak  FLASH_IRQHandler
-  .thumb_set FLASH_IRQHandler,Default_Handler
-
-  .weak  RCC_IRQHandler
-  .thumb_set RCC_IRQHandler,Default_Handler
-
-  .weak  EXTI0_IRQHandler
-  .thumb_set EXTI0_IRQHandler,Default_Handler
-
-  .weak  EXTI1_IRQHandler
-  .thumb_set EXTI1_IRQHandler,Default_Handler
-
-  .weak  EXTI2_IRQHandler
-  .thumb_set EXTI2_IRQHandler,Default_Handler
-
-  .weak  EXTI3_IRQHandler
-  .thumb_set EXTI3_IRQHandler,Default_Handler
-
-  .weak  EXTI4_IRQHandler
-  .thumb_set EXTI4_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel1_IRQHandler
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel2_IRQHandler
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel3_IRQHandler
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel4_IRQHandler
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel5_IRQHandler
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel6_IRQHandler
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel7_IRQHandler
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
-
-  .weak  ADC1_IRQHandler
-  .thumb_set ADC1_IRQHandler,Default_Handler
-
-  .weak  EXTI9_5_IRQHandler
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
-
-  .weak  TIM1_BRK_TIM15_IRQHandler
-  .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
-
-  .weak  TIM1_UP_TIM16_IRQHandler
-  .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
-
-  .weak  TIM1_TRG_COM_TIM17_IRQHandler
-  .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
-
-  .weak  TIM1_CC_IRQHandler
-  .thumb_set TIM1_CC_IRQHandler,Default_Handler
-
-  .weak  TIM2_IRQHandler
-  .thumb_set TIM2_IRQHandler,Default_Handler
-  
-  .weak  TIM3_IRQHandler
-  .thumb_set TIM3_IRQHandler,Default_Handler
-
-  .weak  TIM4_IRQHandler
-  .thumb_set TIM4_IRQHandler,Default_Handler
-
-  .weak  I2C1_EV_IRQHandler
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
-
-  .weak  I2C1_ER_IRQHandler
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
-  
-  .weak  I2C2_EV_IRQHandler
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
-
-  .weak  I2C2_ER_IRQHandler
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
-
-  .weak  SPI1_IRQHandler
-  .thumb_set SPI1_IRQHandler,Default_Handler
-  
-  .weak  SPI2_IRQHandler
-  .thumb_set SPI2_IRQHandler,Default_Handler
-
-  .weak  USART1_IRQHandler
-  .thumb_set USART1_IRQHandler,Default_Handler
-
-  .weak  USART2_IRQHandler
-  .thumb_set USART2_IRQHandler,Default_Handler
-  
-  .weak  USART3_IRQHandler
-  .thumb_set USART3_IRQHandler,Default_Handler
-
-  .weak  EXTI15_10_IRQHandler
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
-
-  .weak  RTC_Alarm_IRQHandler
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
-
-  .weak  CEC_IRQHandler
-  .thumb_set CEC_IRQHandler,Default_Handler
-
-  .weak  TIM6_DAC_IRQHandler
-  .thumb_set TIM6_DAC_IRQHandler,Default_Handler
-
-  .weak  TIM7_IRQHandler
-  .thumb_set TIM7_IRQHandler,Default_Handler  
-
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f100xe.s

@@ -1,449 +0,0 @@
-/**
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
-  * @file      startup_stm32f100xe.s
-  * @author    MCD Application Team
-  * @brief     STM32F100xE Devices vector table for Atollic toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Configure the clock system   
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M3 processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * @attention
-  *
-  * Copyright (c) 2017-2021 STMicroelectronics.
-  * All rights reserved.
-  *
-  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m3
-  .fpu softvfp
-  .thumb
-
-.global g_pfnVectors
-.global Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word _sidata
-/* start address for the .data section. defined in linker script */
-.word _sdata
-/* end address for the .data section. defined in linker script */
-.word _edata
-/* start address for the .bss section. defined in linker script */
-.word _sbss
-/* end address for the .bss section. defined in linker script */
-.word _ebss
-
-.equ  BootRAM, 0xF108F85F
-/**
- * @brief  This is the code that gets called when the processor first
- *          starts execution following a reset event. Only the absolutely
- *          necessary set is performed, after which the application
- *          supplied main() routine is called.
- * @param  None
- * @retval : None
-*/
-
-  .section .text.Reset_Handler
-  .weak Reset_Handler
-  .type Reset_Handler, %function
-Reset_Handler:
-
-/* Call the clock system initialization function.*/
-    bl  SystemInit
-
-/* Copy the data segment initializers from flash to SRAM */
-  ldr r0, =_sdata
-  ldr r1, =_edata
-  ldr r2, =_sidata
-  movs r3, #0
-  b LoopCopyDataInit
-
-CopyDataInit:
-  ldr r4, [r2, r3]
-  str r4, [r0, r3]
-  adds r3, r3, #4
-
-LoopCopyDataInit:
-  adds r4, r0, r3
-  cmp r4, r1
-  bcc CopyDataInit
-  
-/* Zero fill the bss segment. */
-  ldr r2, =_sbss
-  ldr r4, =_ebss
-  movs r3, #0
-  b LoopFillZerobss
-
-FillZerobss:
-  str  r3, [r2]
-  adds r2, r2, #4
-
-LoopFillZerobss:
-  cmp r2, r4
-  bcc FillZerobss
-
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl main
-  bx lr
-.size Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b Infinite_Loop
-  .size Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-  .section .isr_vector,"a",%progbits
-  .type g_pfnVectors, %object
-  .size g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-
-  .word _estack
-  .word Reset_Handler
-  .word NMI_Handler
-  .word HardFault_Handler
-  .word MemManage_Handler
-  .word BusFault_Handler
-  .word UsageFault_Handler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word SVC_Handler
-  .word DebugMon_Handler
-  .word 0
-  .word PendSV_Handler
-  .word SysTick_Handler
-  .word WWDG_IRQHandler
-  .word PVD_IRQHandler
-  .word TAMPER_IRQHandler
-  .word RTC_IRQHandler
-  .word FLASH_IRQHandler
-  .word RCC_IRQHandler
-  .word EXTI0_IRQHandler
-  .word EXTI1_IRQHandler
-  .word EXTI2_IRQHandler
-  .word EXTI3_IRQHandler
-  .word EXTI4_IRQHandler
-  .word DMA1_Channel1_IRQHandler
-  .word DMA1_Channel2_IRQHandler
-  .word DMA1_Channel3_IRQHandler
-  .word DMA1_Channel4_IRQHandler
-  .word DMA1_Channel5_IRQHandler
-  .word DMA1_Channel6_IRQHandler
-  .word DMA1_Channel7_IRQHandler
-  .word ADC1_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word EXTI9_5_IRQHandler
-  .word TIM1_BRK_TIM15_IRQHandler
-  .word TIM1_UP_TIM16_IRQHandler
-  .word TIM1_TRG_COM_TIM17_IRQHandler
-  .word TIM1_CC_IRQHandler
-  .word TIM2_IRQHandler
-  .word TIM3_IRQHandler
-  .word TIM4_IRQHandler
-  .word I2C1_EV_IRQHandler
-  .word I2C1_ER_IRQHandler
-  .word I2C2_EV_IRQHandler
-  .word I2C2_ER_IRQHandler
-  .word SPI1_IRQHandler
-  .word SPI2_IRQHandler
-  .word USART1_IRQHandler
-  .word USART2_IRQHandler
-  .word USART3_IRQHandler
-  .word EXTI15_10_IRQHandler
-  .word RTC_Alarm_IRQHandler
-  .word CEC_IRQHandler
-  .word TIM12_IRQHandler
-  .word TIM13_IRQHandler
-  .word TIM14_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word TIM5_IRQHandler
-  .word SPI3_IRQHandler
-  .word UART4_IRQHandler
-  .word UART5_IRQHandler
-  .word TIM6_DAC_IRQHandler
-  .word TIM7_IRQHandler  
-  .word DMA2_Channel1_IRQHandler
-  .word DMA2_Channel2_IRQHandler
-  .word DMA2_Channel3_IRQHandler
-  .word DMA2_Channel4_5_IRQHandler
-  .word DMA2_Channel5_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word  BootRAM       /* @0x1E0. This is for boot in RAM mode for 
-                         STM32F10x High Density Value line devices. */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-    
-  .weak  NMI_Handler
-  .thumb_set NMI_Handler,Default_Handler
-  
-  .weak  HardFault_Handler
-  .thumb_set HardFault_Handler,Default_Handler
-  
-  .weak  MemManage_Handler
-  .thumb_set MemManage_Handler,Default_Handler
-  
-  .weak  BusFault_Handler
-  .thumb_set BusFault_Handler,Default_Handler
-
-  .weak  UsageFault_Handler
-  .thumb_set UsageFault_Handler,Default_Handler
-
-  .weak  SVC_Handler
-  .thumb_set SVC_Handler,Default_Handler
-
-  .weak  DebugMon_Handler
-  .thumb_set DebugMon_Handler,Default_Handler
-
-  .weak  PendSV_Handler
-  .thumb_set PendSV_Handler,Default_Handler
-
-  .weak  SysTick_Handler
-  .thumb_set SysTick_Handler,Default_Handler
-
-  .weak  WWDG_IRQHandler
-  .thumb_set WWDG_IRQHandler,Default_Handler
-
-  .weak  PVD_IRQHandler
-  .thumb_set PVD_IRQHandler,Default_Handler
-
-  .weak  TAMPER_IRQHandler
-  .thumb_set TAMPER_IRQHandler,Default_Handler
-
-  .weak  RTC_IRQHandler
-  .thumb_set RTC_IRQHandler,Default_Handler
-
-  .weak  FLASH_IRQHandler
-  .thumb_set FLASH_IRQHandler,Default_Handler
-
-  .weak  RCC_IRQHandler
-  .thumb_set RCC_IRQHandler,Default_Handler
-
-  .weak  EXTI0_IRQHandler
-  .thumb_set EXTI0_IRQHandler,Default_Handler
-
-  .weak  EXTI1_IRQHandler
-  .thumb_set EXTI1_IRQHandler,Default_Handler
-
-  .weak  EXTI2_IRQHandler
-  .thumb_set EXTI2_IRQHandler,Default_Handler
-
-  .weak  EXTI3_IRQHandler
-  .thumb_set EXTI3_IRQHandler,Default_Handler
-
-  .weak  EXTI4_IRQHandler
-  .thumb_set EXTI4_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel1_IRQHandler
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel2_IRQHandler
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel3_IRQHandler
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel4_IRQHandler
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel5_IRQHandler
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel6_IRQHandler
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel7_IRQHandler
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
-
-  .weak  ADC1_IRQHandler
-  .thumb_set ADC1_IRQHandler,Default_Handler
-
-  .weak  EXTI9_5_IRQHandler
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
-
-  .weak  TIM1_BRK_TIM15_IRQHandler
-  .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
-
-  .weak  TIM1_UP_TIM16_IRQHandler
-  .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
-
-  .weak  TIM1_TRG_COM_TIM17_IRQHandler
-  .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
-
-  .weak  TIM1_CC_IRQHandler
-  .thumb_set TIM1_CC_IRQHandler,Default_Handler
-
-  .weak  TIM2_IRQHandler
-  .thumb_set TIM2_IRQHandler,Default_Handler
-
-  .weak  TIM3_IRQHandler
-  .thumb_set TIM3_IRQHandler,Default_Handler
-
-  .weak  TIM4_IRQHandler
-  .thumb_set TIM4_IRQHandler,Default_Handler
-
-  .weak  I2C1_EV_IRQHandler
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
-
-  .weak  I2C1_ER_IRQHandler
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
-
-  .weak  I2C2_EV_IRQHandler
-  .thumb_set I2C2_EV_IRQHandler,Default_Handler
-
-  .weak  I2C2_ER_IRQHandler
-  .thumb_set I2C2_ER_IRQHandler,Default_Handler
-
-  .weak  SPI1_IRQHandler
-  .thumb_set SPI1_IRQHandler,Default_Handler
-
-  .weak  SPI2_IRQHandler
-  .thumb_set SPI2_IRQHandler,Default_Handler
-
-  .weak  USART1_IRQHandler
-  .thumb_set USART1_IRQHandler,Default_Handler
-
-  .weak  USART2_IRQHandler
-  .thumb_set USART2_IRQHandler,Default_Handler
-
-  .weak  USART3_IRQHandler
-  .thumb_set USART3_IRQHandler,Default_Handler
-
-  .weak  EXTI15_10_IRQHandler
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
-
-  .weak  RTC_Alarm_IRQHandler
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
-
-  .weak  CEC_IRQHandler
-  .thumb_set CEC_IRQHandler,Default_Handler
-
-  .weak  TIM12_IRQHandler
-  .thumb_set TIM12_IRQHandler,Default_Handler
-
-  .weak  TIM13_IRQHandler
-  .thumb_set TIM13_IRQHandler,Default_Handler
-
-  .weak  TIM14_IRQHandler
-  .thumb_set TIM14_IRQHandler,Default_Handler
-
-  .weak  TIM5_IRQHandler
-  .thumb_set TIM5_IRQHandler,Default_Handler
-
-  .weak  SPI3_IRQHandler
-  .thumb_set SPI3_IRQHandler,Default_Handler
-
-  .weak  UART4_IRQHandler
-  .thumb_set UART4_IRQHandler,Default_Handler
-
-  .weak  UART5_IRQHandler
-  .thumb_set UART5_IRQHandler,Default_Handler
-  
-  .weak  TIM6_DAC_IRQHandler
-  .thumb_set TIM6_DAC_IRQHandler,Default_Handler
-
-  .weak  TIM7_IRQHandler
-  .thumb_set TIM7_IRQHandler,Default_Handler 
-
-  .weak  DMA2_Channel1_IRQHandler
-  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel2_IRQHandler
-  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel3_IRQHandler
-  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel4_5_IRQHandler
-  .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler  
-
-  .weak  DMA2_Channel5_IRQHandler
-  .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
-
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101x6.s

@@ -1,322 +0,0 @@
-/**
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
-  * @file      startup_stm32f101x6.s
-  * @author    MCD Application Team
-  * @brief     STM32F101x6 Devices vector table for Atollic toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Configure the clock system   
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M3 processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * @attention
-  *
-  * Copyright (c) 2017-2021 STMicroelectronics.
-  * All rights reserved.
-  *
-  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m3
-  .fpu softvfp
-  .thumb
-
-.global g_pfnVectors
-.global Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word _sidata
-/* start address for the .data section. defined in linker script */
-.word _sdata
-/* end address for the .data section. defined in linker script */
-.word _edata
-/* start address for the .bss section. defined in linker script */
-.word _sbss
-/* end address for the .bss section. defined in linker script */
-.word _ebss
-
-.equ  BootRAM, 0xF108F85F
-/**
- * @brief  This is the code that gets called when the processor first
- *          starts execution following a reset event. Only the absolutely
- *          necessary set is performed, after which the application
- *          supplied main() routine is called.
- * @param  None
- * @retval : None
-*/
-
-  .section .text.Reset_Handler
-  .weak Reset_Handler
-  .type Reset_Handler, %function
-Reset_Handler:
-
-/* Call the clock system initialization function.*/
-    bl  SystemInit
-
-/* Copy the data segment initializers from flash to SRAM */
-  ldr r0, =_sdata
-  ldr r1, =_edata
-  ldr r2, =_sidata
-  movs r3, #0
-  b LoopCopyDataInit
-
-CopyDataInit:
-  ldr r4, [r2, r3]
-  str r4, [r0, r3]
-  adds r3, r3, #4
-
-LoopCopyDataInit:
-  adds r4, r0, r3
-  cmp r4, r1
-  bcc CopyDataInit
-  
-/* Zero fill the bss segment. */
-  ldr r2, =_sbss
-  ldr r4, =_ebss
-  movs r3, #0
-  b LoopFillZerobss
-
-FillZerobss:
-  str  r3, [r2]
-  adds r2, r2, #4
-
-LoopFillZerobss:
-  cmp r2, r4
-  bcc FillZerobss
-
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl main
-  bx lr
-.size Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b Infinite_Loop
-  .size Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-  .section .isr_vector,"a",%progbits
-  .type g_pfnVectors, %object
-  .size g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-
-
-  .word _estack
-  .word Reset_Handler
-  .word NMI_Handler
-  .word HardFault_Handler
-  .word MemManage_Handler
-  .word BusFault_Handler
-  .word UsageFault_Handler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word SVC_Handler
-  .word DebugMon_Handler
-  .word 0
-  .word PendSV_Handler
-  .word SysTick_Handler
-  .word WWDG_IRQHandler
-  .word PVD_IRQHandler
-  .word TAMPER_IRQHandler
-  .word RTC_IRQHandler
-  .word FLASH_IRQHandler
-  .word RCC_IRQHandler
-  .word EXTI0_IRQHandler
-  .word EXTI1_IRQHandler
-  .word EXTI2_IRQHandler
-  .word EXTI3_IRQHandler
-  .word EXTI4_IRQHandler
-  .word DMA1_Channel1_IRQHandler
-  .word DMA1_Channel2_IRQHandler
-  .word DMA1_Channel3_IRQHandler
-  .word DMA1_Channel4_IRQHandler
-  .word DMA1_Channel5_IRQHandler
-  .word DMA1_Channel6_IRQHandler
-  .word DMA1_Channel7_IRQHandler
-  .word ADC1_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word EXTI9_5_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word TIM2_IRQHandler
-  .word TIM3_IRQHandler
-  .word 0
-  .word I2C1_EV_IRQHandler
-  .word I2C1_ER_IRQHandler
-  .word 0
-  .word 0
-  .word SPI1_IRQHandler
-  .word 0
-  .word USART1_IRQHandler
-  .word USART2_IRQHandler
-  .word 0
-  .word EXTI15_10_IRQHandler
-  .word RTC_Alarm_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word BootRAM        /* @0x108. This is for boot in RAM mode for
-                          STM32F10x Low Density devices.*/
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-  .weak  NMI_Handler
-  .thumb_set NMI_Handler,Default_Handler
-
-  .weak  HardFault_Handler
-  .thumb_set HardFault_Handler,Default_Handler
-
-  .weak  MemManage_Handler
-  .thumb_set MemManage_Handler,Default_Handler
-
-  .weak  BusFault_Handler
-  .thumb_set BusFault_Handler,Default_Handler
-
-  .weak  UsageFault_Handler
-  .thumb_set UsageFault_Handler,Default_Handler
-
-  .weak  SVC_Handler
-  .thumb_set SVC_Handler,Default_Handler
-
-  .weak  DebugMon_Handler
-  .thumb_set DebugMon_Handler,Default_Handler
-
-  .weak  PendSV_Handler
-  .thumb_set PendSV_Handler,Default_Handler
-
-  .weak  SysTick_Handler
-  .thumb_set SysTick_Handler,Default_Handler
-
-  .weak  WWDG_IRQHandler
-  .thumb_set WWDG_IRQHandler,Default_Handler
-
-  .weak  PVD_IRQHandler
-  .thumb_set PVD_IRQHandler,Default_Handler
-
-  .weak  TAMPER_IRQHandler
-  .thumb_set TAMPER_IRQHandler,Default_Handler
-
-  .weak  RTC_IRQHandler
-  .thumb_set RTC_IRQHandler,Default_Handler
-
-  .weak  FLASH_IRQHandler
-  .thumb_set FLASH_IRQHandler,Default_Handler
-
-  .weak  RCC_IRQHandler
-  .thumb_set RCC_IRQHandler,Default_Handler
-
-  .weak  EXTI0_IRQHandler
-  .thumb_set EXTI0_IRQHandler,Default_Handler
-
-  .weak  EXTI1_IRQHandler
-  .thumb_set EXTI1_IRQHandler,Default_Handler
-
-  .weak  EXTI2_IRQHandler
-  .thumb_set EXTI2_IRQHandler,Default_Handler
-
-  .weak  EXTI3_IRQHandler
-  .thumb_set EXTI3_IRQHandler,Default_Handler
-
-  .weak  EXTI4_IRQHandler
-  .thumb_set EXTI4_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel1_IRQHandler
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel2_IRQHandler
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel3_IRQHandler
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel4_IRQHandler
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel5_IRQHandler
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel6_IRQHandler
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel7_IRQHandler
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
-
-  .weak  ADC1_IRQHandler
-  .thumb_set ADC1_IRQHandler,Default_Handler
-
-  .weak  EXTI9_5_IRQHandler
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
-
-  .weak  TIM2_IRQHandler
-  .thumb_set TIM2_IRQHandler,Default_Handler
-
-  .weak  TIM3_IRQHandler
-  .thumb_set TIM3_IRQHandler,Default_Handler
-
-  .weak  I2C1_EV_IRQHandler
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
-
-  .weak  I2C1_ER_IRQHandler
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
-
-  .weak  SPI1_IRQHandler
-  .thumb_set SPI1_IRQHandler,Default_Handler
-
-  .weak  USART1_IRQHandler
-  .thumb_set USART1_IRQHandler,Default_Handler
-
-  .weak  USART2_IRQHandler
-  .thumb_set USART2_IRQHandler,Default_Handler
-
-  .weak  EXTI15_10_IRQHandler
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
-
-  .weak  RTC_Alarm_IRQHandler
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101xb.s

@@ -1,338 +0,0 @@
-/**
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
-  * @file      startup_stm32f101xb.s
-  * @author    MCD Application Team
-  * @brief     STM32F101xB Devices vector table for Atollic toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Configure the clock system   
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M3 processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * @attention
-  *
-  * Copyright (c) 2017-2021 STMicroelectronics.
-  * All rights reserved.
-  *
-  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m3
-  .fpu softvfp
-  .thumb
-
-.global g_pfnVectors
-.global Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word _sidata
-/* start address for the .data section. defined in linker script */
-.word _sdata
-/* end address for the .data section. defined in linker script */
-.word _edata
-/* start address for the .bss section. defined in linker script */
-.word _sbss
-/* end address for the .bss section. defined in linker script */
-.word _ebss
-
-.equ  BootRAM, 0xF108F85F
-/**
- * @brief  This is the code that gets called when the processor first
- *          starts execution following a reset event. Only the absolutely
- *          necessary set is performed, after which the application
- *          supplied main() routine is called.
- * @param  None
- * @retval : None
-*/
-
-  .section .text.Reset_Handler
-  .weak Reset_Handler
-  .type Reset_Handler, %function
-Reset_Handler:
-
-/* Call the clock system initialization function.*/
-    bl  SystemInit
-
-/* Copy the data segment initializers from flash to SRAM */
-  ldr r0, =_sdata
-  ldr r1, =_edata
-  ldr r2, =_sidata
-  movs r3, #0
-  b LoopCopyDataInit
-
-CopyDataInit:
-  ldr r4, [r2, r3]
-  str r4, [r0, r3]
-  adds r3, r3, #4
-
-LoopCopyDataInit:
-  adds r4, r0, r3
-  cmp r4, r1
-  bcc CopyDataInit
-  
-/* Zero fill the bss segment. */
-  ldr r2, =_sbss
-  ldr r4, =_ebss
-  movs r3, #0
-  b LoopFillZerobss
-
-FillZerobss:
-  str  r3, [r2]
-  adds r2, r2, #4
-
-LoopFillZerobss:
-  cmp r2, r4
-  bcc FillZerobss
-
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl main
-  bx lr
-.size Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b Infinite_Loop
-  .size Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-  .section .isr_vector,"a",%progbits
-  .type g_pfnVectors, %object
-  .size g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-
-  .word _estack
-  .word Reset_Handler
-  .word NMI_Handler
-  .word HardFault_Handler
-  .word MemManage_Handler
-  .word BusFault_Handler
-  .word UsageFault_Handler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word SVC_Handler
-  .word DebugMon_Handler
-  .word 0
-  .word PendSV_Handler
-  .word SysTick_Handler
-  .word WWDG_IRQHandler
-  .word PVD_IRQHandler
-  .word TAMPER_IRQHandler
-  .word RTC_IRQHandler
-  .word FLASH_IRQHandler
-  .word RCC_IRQHandler
-  .word EXTI0_IRQHandler
-  .word EXTI1_IRQHandler
-  .word EXTI2_IRQHandler
-  .word EXTI3_IRQHandler
-  .word EXTI4_IRQHandler
-  .word DMA1_Channel1_IRQHandler
-  .word DMA1_Channel2_IRQHandler
-  .word DMA1_Channel3_IRQHandler
-  .word DMA1_Channel4_IRQHandler
-  .word DMA1_Channel5_IRQHandler
-  .word DMA1_Channel6_IRQHandler
-  .word DMA1_Channel7_IRQHandler
-  .word ADC1_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word EXTI9_5_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word TIM2_IRQHandler
-  .word TIM3_IRQHandler
-  .word TIM4_IRQHandler
-  .word I2C1_EV_IRQHandler
-  .word I2C1_ER_IRQHandler
-  .word I2C2_EV_IRQHandler
-  .word I2C2_ER_IRQHandler
-  .word SPI1_IRQHandler
-  .word SPI2_IRQHandler
-  .word USART1_IRQHandler
-  .word USART2_IRQHandler
-  .word USART3_IRQHandler
-  .word EXTI15_10_IRQHandler
-  .word RTC_Alarm_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word BootRAM          /* @0x108. This is for boot in RAM mode for
-                            STM32F10x Medium Density devices. */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-  .weak NMI_Handler
-  .thumb_set NMI_Handler,Default_Handler
-
-  .weak HardFault_Handler
-  .thumb_set HardFault_Handler,Default_Handler
-
-  .weak MemManage_Handler
-  .thumb_set MemManage_Handler,Default_Handler
-
-  .weak BusFault_Handler
-  .thumb_set BusFault_Handler,Default_Handler
-
-  .weak UsageFault_Handler
-  .thumb_set UsageFault_Handler,Default_Handler
-
-  .weak SVC_Handler
-  .thumb_set SVC_Handler,Default_Handler
-
-  .weak DebugMon_Handler
-  .thumb_set DebugMon_Handler,Default_Handler
-
-  .weak PendSV_Handler
-  .thumb_set PendSV_Handler,Default_Handler
-
-  .weak SysTick_Handler
-  .thumb_set SysTick_Handler,Default_Handler
-
-  .weak WWDG_IRQHandler
-  .thumb_set WWDG_IRQHandler,Default_Handler
-
-  .weak PVD_IRQHandler
-  .thumb_set PVD_IRQHandler,Default_Handler
-
-  .weak TAMPER_IRQHandler
-  .thumb_set TAMPER_IRQHandler,Default_Handler
-
-  .weak RTC_IRQHandler
-  .thumb_set RTC_IRQHandler,Default_Handler
-
-  .weak FLASH_IRQHandler
-  .thumb_set FLASH_IRQHandler,Default_Handler
-
-  .weak RCC_IRQHandler
-  .thumb_set RCC_IRQHandler,Default_Handler
-
-  .weak EXTI0_IRQHandler
-  .thumb_set EXTI0_IRQHandler,Default_Handler
-
-  .weak EXTI1_IRQHandler
-  .thumb_set EXTI1_IRQHandler,Default_Handler
-
-  .weak EXTI2_IRQHandler
-  .thumb_set EXTI2_IRQHandler,Default_Handler
-
-  .weak EXTI3_IRQHandler
-  .thumb_set EXTI3_IRQHandler,Default_Handler
-
-  .weak EXTI4_IRQHandler
-  .thumb_set EXTI4_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel1_IRQHandler
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel2_IRQHandler
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel3_IRQHandler
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel4_IRQHandler
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel5_IRQHandler
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel6_IRQHandler
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel7_IRQHandler
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
-
-  .weak  ADC1_IRQHandler
-  .thumb_set ADC1_IRQHandler,Default_Handler
-
-  .weak EXTI9_5_IRQHandler
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
-
-  .weak TIM2_IRQHandler
-  .thumb_set TIM2_IRQHandler,Default_Handler
-
-  .weak TIM3_IRQHandler
-  .thumb_set TIM3_IRQHandler,Default_Handler
-
-  .weak TIM4_IRQHandler
-  .thumb_set TIM4_IRQHandler,Default_Handler
-
-  .weak I2C1_EV_IRQHandler
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
-
-  .weak I2C1_ER_IRQHandler
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
-
-  .weak I2C2_EV_IRQHandler
-  .thumb_set I2C2_EV_IRQHandler,Default_Handler
-
-  .weak I2C2_ER_IRQHandler
-  .thumb_set I2C2_ER_IRQHandler,Default_Handler
-
-  .weak SPI1_IRQHandler
-  .thumb_set SPI1_IRQHandler,Default_Handler
-
-  .weak SPI2_IRQHandler
-  .thumb_set SPI2_IRQHandler,Default_Handler
-
-  .weak USART1_IRQHandler
-  .thumb_set USART1_IRQHandler,Default_Handler
-
-  .weak USART2_IRQHandler
-  .thumb_set USART2_IRQHandler,Default_Handler
-
-  .weak USART3_IRQHandler
-  .thumb_set USART3_IRQHandler,Default_Handler
-
-  .weak EXTI15_10_IRQHandler
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
-
-  .weak RTC_Alarm_IRQHandler
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
-
-
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101xe.s

@@ -1,423 +0,0 @@
-/**
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
-  * @file      startup_stm32f101xe.s
-  * @author    MCD Application Team
-  * @brief     STM32F101xE Value Line Devices vector table for Atollic toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Configure the clock system   
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M3 processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * @attention
-  *
-  * Copyright (c) 2017-2021 STMicroelectronics.
-  * All rights reserved.
-  *
-  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m3
-  .fpu softvfp
-  .thumb
-
-.global g_pfnVectors
-.global Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word _sidata
-/* start address for the .data section. defined in linker script */
-.word _sdata
-/* end address for the .data section. defined in linker script */
-.word _edata
-/* start address for the .bss section. defined in linker script */
-.word _sbss
-/* end address for the .bss section. defined in linker script */
-.word _ebss
-
-.equ  BootRAM,        0xF1E0F85F
-/**
- * @brief  This is the code that gets called when the processor first
- *          starts execution following a reset event. Only the absolutely
- *          necessary set is performed, after which the application
- *          supplied main() routine is called.
- * @param  None
- * @retval : None
-*/
-
-  .section .text.Reset_Handler
-  .weak Reset_Handler
-  .type Reset_Handler, %function
-Reset_Handler:
-
-/* Call the clock system initialization function.*/
-    bl  SystemInit
-
-/* Copy the data segment initializers from flash to SRAM */
-  ldr r0, =_sdata
-  ldr r1, =_edata
-  ldr r2, =_sidata
-  movs r3, #0
-  b LoopCopyDataInit
-
-CopyDataInit:
-  ldr r4, [r2, r3]
-  str r4, [r0, r3]
-  adds r3, r3, #4
-
-LoopCopyDataInit:
-  adds r4, r0, r3
-  cmp r4, r1
-  bcc CopyDataInit
-  
-/* Zero fill the bss segment. */
-  ldr r2, =_sbss
-  ldr r4, =_ebss
-  movs r3, #0
-  b LoopFillZerobss
-
-FillZerobss:
-  str  r3, [r2]
-  adds r2, r2, #4
-
-LoopFillZerobss:
-  cmp r2, r4
-  bcc FillZerobss
-
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl main
-  bx lr
-.size Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b Infinite_Loop
-  .size Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-  .section .isr_vector,"a",%progbits
-  .type g_pfnVectors, %object
-  .size g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-
-  .word _estack
-  .word Reset_Handler
-  .word NMI_Handler
-  .word HardFault_Handler
-  .word MemManage_Handler
-  .word BusFault_Handler
-  .word UsageFault_Handler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word SVC_Handler
-  .word DebugMon_Handler
-  .word 0
-  .word PendSV_Handler
-  .word SysTick_Handler
-  .word WWDG_IRQHandler
-  .word PVD_IRQHandler
-  .word TAMPER_IRQHandler
-  .word RTC_IRQHandler
-  .word FLASH_IRQHandler
-  .word RCC_IRQHandler
-  .word EXTI0_IRQHandler
-  .word EXTI1_IRQHandler
-  .word EXTI2_IRQHandler
-  .word EXTI3_IRQHandler
-  .word EXTI4_IRQHandler
-  .word DMA1_Channel1_IRQHandler
-  .word DMA1_Channel2_IRQHandler
-  .word DMA1_Channel3_IRQHandler
-  .word DMA1_Channel4_IRQHandler
-  .word DMA1_Channel5_IRQHandler
-  .word DMA1_Channel6_IRQHandler
-  .word DMA1_Channel7_IRQHandler
-  .word ADC1_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word EXTI9_5_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word TIM2_IRQHandler
-  .word TIM3_IRQHandler
-  .word TIM4_IRQHandler
-  .word I2C1_EV_IRQHandler
-  .word I2C1_ER_IRQHandler
-  .word I2C2_EV_IRQHandler
-  .word I2C2_ER_IRQHandler
-  .word SPI1_IRQHandler
-  .word SPI2_IRQHandler
-  .word USART1_IRQHandler
-  .word USART2_IRQHandler
-  .word USART3_IRQHandler
-  .word EXTI15_10_IRQHandler
-  .word RTC_Alarm_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word FSMC_IRQHandler
-  .word 0
-  .word TIM5_IRQHandler
-  .word SPI3_IRQHandler
-  .word UART4_IRQHandler
-  .word UART5_IRQHandler
-  .word TIM6_IRQHandler
-  .word TIM7_IRQHandler
-  .word DMA2_Channel1_IRQHandler
-  .word DMA2_Channel2_IRQHandler
-  .word DMA2_Channel3_IRQHandler
-  .word DMA2_Channel4_5_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word BootRAM       /* @0x1E0. This is for boot in RAM mode for
-                         STM32F10x High Density devices. */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-  .weak NMI_Handler
-  .thumb_set NMI_Handler,Default_Handler
-
-  .weak HardFault_Handler
-  .thumb_set HardFault_Handler,Default_Handler
-
-  .weak MemManage_Handler
-  .thumb_set MemManage_Handler,Default_Handler
-
-  .weak BusFault_Handler
-  .thumb_set BusFault_Handler,Default_Handler
-
-  .weak UsageFault_Handler
-  .thumb_set UsageFault_Handler,Default_Handler
-
-  .weak SVC_Handler
-  .thumb_set SVC_Handler,Default_Handler
-
-  .weak DebugMon_Handler
-  .thumb_set DebugMon_Handler,Default_Handler
-
-  .weak PendSV_Handler
-  .thumb_set PendSV_Handler,Default_Handler
-
-  .weak SysTick_Handler
-  .thumb_set SysTick_Handler,Default_Handler
-
-  .weak WWDG_IRQHandler
-  .thumb_set WWDG_IRQHandler,Default_Handler
-
-  .weak PVD_IRQHandler
-  .thumb_set PVD_IRQHandler,Default_Handler
-
-  .weak TAMPER_IRQHandler
-  .thumb_set TAMPER_IRQHandler,Default_Handler
-
-  .weak RTC_IRQHandler
-  .thumb_set RTC_IRQHandler,Default_Handler
-
-  .weak FLASH_IRQHandler
-  .thumb_set FLASH_IRQHandler,Default_Handler
-
-  .weak RCC_IRQHandler
-  .thumb_set RCC_IRQHandler,Default_Handler
-
-  .weak EXTI0_IRQHandler
-  .thumb_set EXTI0_IRQHandler,Default_Handler
-
-  .weak EXTI1_IRQHandler
-  .thumb_set EXTI1_IRQHandler,Default_Handler
-
-  .weak EXTI2_IRQHandler
-  .thumb_set EXTI2_IRQHandler,Default_Handler
-
-  .weak EXTI3_IRQHandler
-  .thumb_set EXTI3_IRQHandler,Default_Handler
-
-  .weak EXTI4_IRQHandler
-  .thumb_set EXTI4_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel1_IRQHandler
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel2_IRQHandler
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel3_IRQHandler
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel4_IRQHandler
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel5_IRQHandler
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel6_IRQHandler
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel7_IRQHandler
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
-
-  .weak  ADC1_IRQHandler
-  .thumb_set ADC1_IRQHandler,Default_Handler
-
-  .weak EXTI9_5_IRQHandler
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
-
-  .weak TIM2_IRQHandler
-  .thumb_set TIM2_IRQHandler,Default_Handler
-
-  .weak TIM3_IRQHandler
-  .thumb_set TIM3_IRQHandler,Default_Handler
-
-  .weak TIM4_IRQHandler
-  .thumb_set TIM4_IRQHandler,Default_Handler
-
-  .weak I2C1_EV_IRQHandler
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
-
-  .weak I2C1_ER_IRQHandler
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
-
-  .weak I2C2_EV_IRQHandler
-  .thumb_set I2C2_EV_IRQHandler,Default_Handler
-
-  .weak I2C2_ER_IRQHandler
-  .thumb_set I2C2_ER_IRQHandler,Default_Handler
-
-  .weak SPI1_IRQHandler
-  .thumb_set SPI1_IRQHandler,Default_Handler
-
-  .weak SPI2_IRQHandler
-  .thumb_set SPI2_IRQHandler,Default_Handler
-
-  .weak USART1_IRQHandler
-  .thumb_set USART1_IRQHandler,Default_Handler
-
-  .weak USART2_IRQHandler
-  .thumb_set USART2_IRQHandler,Default_Handler
-
-  .weak USART3_IRQHandler
-  .thumb_set USART3_IRQHandler,Default_Handler
-
-  .weak EXTI15_10_IRQHandler
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
-
-  .weak RTC_Alarm_IRQHandler
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
-
-  .weak FSMC_IRQHandler
-  .thumb_set FSMC_IRQHandler,Default_Handler
-
-  .weak TIM5_IRQHandler
-  .thumb_set TIM5_IRQHandler,Default_Handler
-
-  .weak SPI3_IRQHandler
-  .thumb_set SPI3_IRQHandler,Default_Handler
-
-  .weak UART4_IRQHandler
-  .thumb_set UART4_IRQHandler,Default_Handler
-
-  .weak UART5_IRQHandler
-  .thumb_set UART5_IRQHandler,Default_Handler
-
-  .weak TIM6_IRQHandler
-  .thumb_set TIM6_IRQHandler,Default_Handler
-
-  .weak TIM7_IRQHandler
-  .thumb_set TIM7_IRQHandler,Default_Handler
-
-  .weak DMA2_Channel1_IRQHandler
-  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
-
-  .weak DMA2_Channel2_IRQHandler
-  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
-
-  .weak DMA2_Channel3_IRQHandler
-  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
-
-  .weak DMA2_Channel4_5_IRQHandler
-  .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101xg.s

@@ -1,439 +0,0 @@
-/**
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
-  * @file      startup_stm32f101xg.s
-  * @author    MCD Application Team
-  * @brief     STM32F101xG Devices vector table for Atollic toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Configure the clock system   
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M3 processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * @attention
-  *
-  * Copyright (c) 2017-2021 STMicroelectronics.
-  * All rights reserved.
-  *
-  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m3
-  .fpu softvfp
-  .thumb
-
-.global g_pfnVectors
-.global Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word _sidata
-/* start address for the .data section. defined in linker script */
-.word _sdata
-/* end address for the .data section. defined in linker script */
-.word _edata
-/* start address for the .bss section. defined in linker script */
-.word _sbss
-/* end address for the .bss section. defined in linker script */
-.word _ebss
-
-.equ  BootRAM,        0xF1E0F85F
-/**
- * @brief  This is the code that gets called when the processor first
- *          starts execution following a reset event. Only the absolutely
- *          necessary set is performed, after which the application
- *          supplied main() routine is called.
- * @param  None
- * @retval : None
-*/
-
-  .section .text.Reset_Handler
-  .weak Reset_Handler
-  .type Reset_Handler, %function
-Reset_Handler:
-
-/* Call the clock system initialization function.*/
-    bl  SystemInit
-
-/* Copy the data segment initializers from flash to SRAM */
-  ldr r0, =_sdata
-  ldr r1, =_edata
-  ldr r2, =_sidata
-  movs r3, #0
-  b LoopCopyDataInit
-
-CopyDataInit:
-  ldr r4, [r2, r3]
-  str r4, [r0, r3]
-  adds r3, r3, #4
-
-LoopCopyDataInit:
-  adds r4, r0, r3
-  cmp r4, r1
-  bcc CopyDataInit
-  
-/* Zero fill the bss segment. */
-  ldr r2, =_sbss
-  ldr r4, =_ebss
-  movs r3, #0
-  b LoopFillZerobss
-
-FillZerobss:
-  str  r3, [r2]
-  adds r2, r2, #4
-
-LoopFillZerobss:
-  cmp r2, r4
-  bcc FillZerobss
-
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl main
-  bx lr
-.size Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- * @param  None
- * @retval None       
-*/
-    .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b Infinite_Loop
-  .size Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-  .section .isr_vector,"a",%progbits
-  .type g_pfnVectors, %object
-  .size g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-
-  .word  _estack
-  .word  Reset_Handler
-  .word  NMI_Handler
-  .word  HardFault_Handler
-  .word  MemManage_Handler
-  .word  BusFault_Handler
-  .word  UsageFault_Handler
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  SVC_Handler
-  .word  DebugMon_Handler
-  .word  0
-  .word  PendSV_Handler
-  .word  SysTick_Handler
-  .word  WWDG_IRQHandler
-  .word  PVD_IRQHandler
-  .word  TAMPER_IRQHandler
-  .word  RTC_IRQHandler
-  .word  FLASH_IRQHandler
-  .word  RCC_IRQHandler
-  .word  EXTI0_IRQHandler
-  .word  EXTI1_IRQHandler
-  .word  EXTI2_IRQHandler
-  .word  EXTI3_IRQHandler
-  .word  EXTI4_IRQHandler
-  .word  DMA1_Channel1_IRQHandler
-  .word  DMA1_Channel2_IRQHandler
-  .word  DMA1_Channel3_IRQHandler
-  .word  DMA1_Channel4_IRQHandler
-  .word  DMA1_Channel5_IRQHandler
-  .word  DMA1_Channel6_IRQHandler
-  .word  DMA1_Channel7_IRQHandler
-  .word  ADC1_IRQHandler
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  EXTI9_5_IRQHandler
-  .word  TIM9_IRQHandler
-  .word  TIM10_IRQHandler
-  .word  TIM11_IRQHandler
-  .word  0
-  .word  TIM2_IRQHandler
-  .word  TIM3_IRQHandler
-  .word  TIM4_IRQHandler
-  .word  I2C1_EV_IRQHandler
-  .word  I2C1_ER_IRQHandler
-  .word  I2C2_EV_IRQHandler
-  .word  I2C2_ER_IRQHandler
-  .word  SPI1_IRQHandler
-  .word  SPI2_IRQHandler
-  .word  USART1_IRQHandler
-  .word  USART2_IRQHandler
-  .word  USART3_IRQHandler
-  .word  EXTI15_10_IRQHandler
-  .word  RTC_Alarm_IRQHandler
-  .word 0
-  .word TIM12_IRQHandler
-  .word TIM13_IRQHandler
-  .word TIM14_IRQHandler
-  .word 0
-  .word 0
-  .word  FSMC_IRQHandler
-  .word 0
-  .word  TIM5_IRQHandler
-  .word  SPI3_IRQHandler
-  .word  UART4_IRQHandler
-  .word  UART5_IRQHandler
-  .word  TIM6_IRQHandler
-  .word  TIM7_IRQHandler
-  .word  DMA2_Channel1_IRQHandler
-  .word  DMA2_Channel2_IRQHandler
-  .word  DMA2_Channel3_IRQHandler
-  .word  DMA2_Channel4_5_IRQHandler
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  BootRAM       /* @0x1E0. This is for boot in RAM mode for 
-                         STM32F10x XL-Density devices. */
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler. 
-* As they are weak aliases, any function with the same name will override 
-* this definition.
-* 
-*******************************************************************************/
-    
-  .weak  NMI_Handler
-  .thumb_set NMI_Handler,Default_Handler
-  
-  .weak  HardFault_Handler
-  .thumb_set HardFault_Handler,Default_Handler
-  
-  .weak  MemManage_Handler
-  .thumb_set MemManage_Handler,Default_Handler
-  
-  .weak  BusFault_Handler
-  .thumb_set BusFault_Handler,Default_Handler
-
-  .weak  UsageFault_Handler
-  .thumb_set UsageFault_Handler,Default_Handler
-
-  .weak  SVC_Handler
-  .thumb_set SVC_Handler,Default_Handler
-
-  .weak  DebugMon_Handler
-  .thumb_set DebugMon_Handler,Default_Handler
-
-  .weak  PendSV_Handler
-  .thumb_set PendSV_Handler,Default_Handler
-
-  .weak  SysTick_Handler
-  .thumb_set SysTick_Handler,Default_Handler
-
-  .weak  WWDG_IRQHandler
-  .thumb_set WWDG_IRQHandler,Default_Handler
-
-  .weak  PVD_IRQHandler
-  .thumb_set PVD_IRQHandler,Default_Handler
-
-  .weak  TAMPER_IRQHandler
-  .thumb_set TAMPER_IRQHandler,Default_Handler
-
-  .weak  RTC_IRQHandler
-  .thumb_set RTC_IRQHandler,Default_Handler
-
-  .weak  FLASH_IRQHandler
-  .thumb_set FLASH_IRQHandler,Default_Handler
-
-  .weak  RCC_IRQHandler
-  .thumb_set RCC_IRQHandler,Default_Handler
-
-  .weak  EXTI0_IRQHandler
-  .thumb_set EXTI0_IRQHandler,Default_Handler
-
-  .weak  EXTI1_IRQHandler
-  .thumb_set EXTI1_IRQHandler,Default_Handler
-
-  .weak  EXTI2_IRQHandler
-  .thumb_set EXTI2_IRQHandler,Default_Handler
-
-  .weak  EXTI3_IRQHandler
-  .thumb_set EXTI3_IRQHandler,Default_Handler
-
-  .weak  EXTI4_IRQHandler
-  .thumb_set EXTI4_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel1_IRQHandler
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel2_IRQHandler
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel3_IRQHandler
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel4_IRQHandler
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel5_IRQHandler
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel6_IRQHandler
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel7_IRQHandler
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
-
-  .weak  ADC1_IRQHandler
-  .thumb_set ADC1_IRQHandler,Default_Handler
-
-  .weak  EXTI9_5_IRQHandler
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
-
-  .weak  TIM9_IRQHandler
-  .thumb_set TIM9_IRQHandler,Default_Handler
-
-  .weak  TIM10_IRQHandler
-  .thumb_set TIM10_IRQHandler,Default_Handler
-
-  .weak  TIM11_IRQHandler
-  .thumb_set TIM11_IRQHandler,Default_Handler
-
-  .weak  TIM2_IRQHandler
-  .thumb_set TIM2_IRQHandler,Default_Handler
-
-  .weak  TIM3_IRQHandler
-  .thumb_set TIM3_IRQHandler,Default_Handler
-
-  .weak  TIM4_IRQHandler
-  .thumb_set TIM4_IRQHandler,Default_Handler
-
-  .weak  I2C1_EV_IRQHandler
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
-
-  .weak  I2C1_ER_IRQHandler
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
-
-  .weak  I2C2_EV_IRQHandler
-  .thumb_set I2C2_EV_IRQHandler,Default_Handler
-
-  .weak  I2C2_ER_IRQHandler
-  .thumb_set I2C2_ER_IRQHandler,Default_Handler
-
-  .weak  SPI1_IRQHandler
-  .thumb_set SPI1_IRQHandler,Default_Handler
-
-  .weak  SPI2_IRQHandler
-  .thumb_set SPI2_IRQHandler,Default_Handler
-
-  .weak  USART1_IRQHandler
-  .thumb_set USART1_IRQHandler,Default_Handler
-
-  .weak  USART2_IRQHandler
-  .thumb_set USART2_IRQHandler,Default_Handler
-
-  .weak  USART3_IRQHandler
-  .thumb_set USART3_IRQHandler,Default_Handler
-
-  .weak  EXTI15_10_IRQHandler
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
-
-  .weak  RTC_Alarm_IRQHandler
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
-
-  .weak  TIM12_IRQHandler
-  .thumb_set TIM12_IRQHandler,Default_Handler
-
-  .weak  TIM13_IRQHandler
-  .thumb_set TIM13_IRQHandler,Default_Handler
-
-  .weak  TIM14_IRQHandler
-  .thumb_set TIM14_IRQHandler,Default_Handler
-
-  .weak  FSMC_IRQHandler
-  .thumb_set FSMC_IRQHandler,Default_Handler
-
-  .weak  TIM5_IRQHandler
-  .thumb_set TIM5_IRQHandler,Default_Handler
-
-  .weak  SPI3_IRQHandler
-  .thumb_set SPI3_IRQHandler,Default_Handler
-
-  .weak  UART4_IRQHandler
-  .thumb_set UART4_IRQHandler,Default_Handler
-
-  .weak  UART5_IRQHandler
-  .thumb_set UART5_IRQHandler,Default_Handler
-
-  .weak  TIM6_IRQHandler
-  .thumb_set TIM6_IRQHandler,Default_Handler
-
-  .weak  TIM7_IRQHandler
-  .thumb_set TIM7_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel1_IRQHandler
-  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel2_IRQHandler
-  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel3_IRQHandler
-  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel4_5_IRQHandler
-  .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f102x6.s

@@ -1,330 +0,0 @@
-/**
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
-  * @file      startup_stm32f102x6.s
-  * @author    MCD Application Team
-  * @brief     STM32F102x6 Devices vector table for Atollic toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Configure the clock system   
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M3 processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * @attention
-  *
-  * Copyright (c) 2017-2021 STMicroelectronics.
-  * All rights reserved.
-  *
-  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m3
-  .fpu softvfp
-  .thumb
-
-.global g_pfnVectors
-.global Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word _sidata
-/* start address for the .data section. defined in linker script */
-.word _sdata
-/* end address for the .data section. defined in linker script */
-.word _edata
-/* start address for the .bss section. defined in linker script */
-.word _sbss
-/* end address for the .bss section. defined in linker script */
-.word _ebss
-
-.equ  BootRAM, 0xF108F85F
-/**
- * @brief  This is the code that gets called when the processor first
- *          starts execution following a reset event. Only the absolutely
- *          necessary set is performed, after which the application
- *          supplied main() routine is called.
- * @param  None
- * @retval : None
-*/
-
-  .section .text.Reset_Handler
-  .weak Reset_Handler
-  .type Reset_Handler, %function
-Reset_Handler:
-
-/* Call the clock system initialization function.*/
-    bl  SystemInit
-
-/* Copy the data segment initializers from flash to SRAM */
-  ldr r0, =_sdata
-  ldr r1, =_edata
-  ldr r2, =_sidata
-  movs r3, #0
-  b LoopCopyDataInit
-
-CopyDataInit:
-  ldr r4, [r2, r3]
-  str r4, [r0, r3]
-  adds r3, r3, #4
-
-LoopCopyDataInit:
-  adds r4, r0, r3
-  cmp r4, r1
-  bcc CopyDataInit
-  
-/* Zero fill the bss segment. */
-  ldr r2, =_sbss
-  ldr r4, =_ebss
-  movs r3, #0
-  b LoopFillZerobss
-
-FillZerobss:
-  str  r3, [r2]
-  adds r2, r2, #4
-
-LoopFillZerobss:
-  cmp r2, r4
-  bcc FillZerobss
-
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl main
-  bx lr
-.size Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b Infinite_Loop
-  .size Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-  .section .isr_vector,"a",%progbits
-  .type g_pfnVectors, %object
-  .size g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-
-  .word _estack
-  .word Reset_Handler
-  .word NMI_Handler
-  .word HardFault_Handler
-  .word MemManage_Handler
-  .word BusFault_Handler
-  .word UsageFault_Handler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word SVC_Handler
-  .word DebugMon_Handler
-  .word 0
-  .word PendSV_Handler
-  .word SysTick_Handler
-  .word WWDG_IRQHandler
-  .word PVD_IRQHandler
-  .word TAMPER_IRQHandler
-  .word RTC_IRQHandler
-  .word FLASH_IRQHandler
-  .word RCC_IRQHandler
-  .word EXTI0_IRQHandler
-  .word EXTI1_IRQHandler
-  .word EXTI2_IRQHandler
-  .word EXTI3_IRQHandler
-  .word EXTI4_IRQHandler
-  .word DMA1_Channel1_IRQHandler
-  .word DMA1_Channel2_IRQHandler
-  .word DMA1_Channel3_IRQHandler
-  .word DMA1_Channel4_IRQHandler
-  .word DMA1_Channel5_IRQHandler
-  .word DMA1_Channel6_IRQHandler
-  .word DMA1_Channel7_IRQHandler
-  .word ADC1_IRQHandler
-  .word USB_HP_IRQHandler
-  .word USB_LP_IRQHandler
-  .word 0 
-  .word 0
-  .word EXTI9_5_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word TIM2_IRQHandler
-  .word TIM3_IRQHandler
-  .word 0
-  .word I2C1_EV_IRQHandler
-  .word I2C1_ER_IRQHandler
-  .word 0
-  .word 0
-  .word SPI1_IRQHandler
-  .word 0
-  .word USART1_IRQHandler
-  .word USART2_IRQHandler
-  .word 0
-  .word EXTI15_10_IRQHandler
-  .word RTC_Alarm_IRQHandler
-  .word USBWakeUp_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word BootRAM        /* @0x108. This is for boot in RAM mode for
-                          STM32F10x Low Density devices.*/
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-  .weak NMI_Handler
-  .thumb_set NMI_Handler,Default_Handler
-
-  .weak HardFault_Handler
-  .thumb_set HardFault_Handler,Default_Handler
-
-  .weak MemManage_Handler
-  .thumb_set MemManage_Handler,Default_Handler
-
-  .weak BusFault_Handler
-  .thumb_set BusFault_Handler,Default_Handler
-
-  .weak UsageFault_Handler
-  .thumb_set UsageFault_Handler,Default_Handler
-
-  .weak SVC_Handler
-  .thumb_set SVC_Handler,Default_Handler
-
-  .weak DebugMon_Handler
-  .thumb_set DebugMon_Handler,Default_Handler
-
-  .weak PendSV_Handler
-  .thumb_set PendSV_Handler,Default_Handler
-
-  .weak SysTick_Handler
-  .thumb_set SysTick_Handler,Default_Handler
-
-  .weak WWDG_IRQHandler
-  .thumb_set WWDG_IRQHandler,Default_Handler
-
-  .weak PVD_IRQHandler
-  .thumb_set PVD_IRQHandler,Default_Handler
-
-  .weak TAMPER_IRQHandler
-  .thumb_set TAMPER_IRQHandler,Default_Handler
-
-  .weak RTC_IRQHandler
-  .thumb_set RTC_IRQHandler,Default_Handler
-
-  .weak FLASH_IRQHandler
-  .thumb_set FLASH_IRQHandler,Default_Handler
-
-  .weak RCC_IRQHandler
-  .thumb_set RCC_IRQHandler,Default_Handler
-
-  .weak EXTI0_IRQHandler
-  .thumb_set EXTI0_IRQHandler,Default_Handler
-
-  .weak EXTI1_IRQHandler
-  .thumb_set EXTI1_IRQHandler,Default_Handler
-
-  .weak EXTI2_IRQHandler
-  .thumb_set EXTI2_IRQHandler,Default_Handler
-
-  .weak EXTI3_IRQHandler
-  .thumb_set EXTI3_IRQHandler,Default_Handler
-
-  .weak EXTI4_IRQHandler
-  .thumb_set EXTI4_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel1_IRQHandler
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel2_IRQHandler
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel3_IRQHandler
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel4_IRQHandler
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel5_IRQHandler
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel6_IRQHandler
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel7_IRQHandler
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
-
-  .weak  ADC1_IRQHandler
-  .thumb_set ADC1_IRQHandler,Default_Handler
-
-  .weak USB_HP_IRQHandler
-  .thumb_set USB_HP_IRQHandler,Default_Handler
-
-  .weak USB_LP_IRQHandler
-  .thumb_set USB_LP_IRQHandler,Default_Handler
-
-  .weak EXTI9_5_IRQHandler
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
-
-  .weak TIM2_IRQHandler
-  .thumb_set TIM2_IRQHandler,Default_Handler
-
-  .weak TIM3_IRQHandler
-  .thumb_set TIM3_IRQHandler,Default_Handler
-
-  .weak I2C1_EV_IRQHandler
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
-
-  .weak I2C1_ER_IRQHandler
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
-
-  .weak SPI1_IRQHandler
-  .thumb_set SPI1_IRQHandler,Default_Handler
-
-  .weak USART1_IRQHandler
-  .thumb_set USART1_IRQHandler,Default_Handler
-
-  .weak USART2_IRQHandler
-  .thumb_set USART2_IRQHandler,Default_Handler
-
-  .weak EXTI15_10_IRQHandler
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
-
-  .weak RTC_Alarm_IRQHandler
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
-
-  .weak USBWakeUp_IRQHandler
-  .thumb_set USBWakeUp_IRQHandler,Default_Handler
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f102xb.s

@@ -1,346 +0,0 @@
-/**
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
-  * @file      startup_stm32f102xb.s
-  * @author    MCD Application Team
-  * @brief     STM32F102xB Value Line Devices vector table for Atollic toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Configure the clock system   
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M3 processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * @attention
-  *
-  * Copyright (c) 2017-2021 STMicroelectronics.
-  * All rights reserved.
-  *
-  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m3
-  .fpu softvfp
-  .thumb
-
-.global g_pfnVectors
-.global Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word _sidata
-/* start address for the .data section. defined in linker script */
-.word _sdata
-/* end address for the .data section. defined in linker script */
-.word _edata
-/* start address for the .bss section. defined in linker script */
-.word _sbss
-/* end address for the .bss section. defined in linker script */
-.word _ebss
-
-.equ  BootRAM, 0xF108F85F
-/**
- * @brief  This is the code that gets called when the processor first
- *          starts execution following a reset event. Only the absolutely
- *          necessary set is performed, after which the application
- *          supplied main() routine is called.
- * @param  None
- * @retval : None
-*/
-
-  .section .text.Reset_Handler
-  .weak Reset_Handler
-  .type Reset_Handler, %function
-Reset_Handler:
-
-/* Call the clock system initialization function.*/
-    bl  SystemInit
-
-/* Copy the data segment initializers from flash to SRAM */
-  ldr r0, =_sdata
-  ldr r1, =_edata
-  ldr r2, =_sidata
-  movs r3, #0
-  b LoopCopyDataInit
-
-CopyDataInit:
-  ldr r4, [r2, r3]
-  str r4, [r0, r3]
-  adds r3, r3, #4
-
-LoopCopyDataInit:
-  adds r4, r0, r3
-  cmp r4, r1
-  bcc CopyDataInit
-  
-/* Zero fill the bss segment. */
-  ldr r2, =_sbss
-  ldr r4, =_ebss
-  movs r3, #0
-  b LoopFillZerobss
-
-FillZerobss:
-  str  r3, [r2]
-  adds r2, r2, #4
-
-LoopFillZerobss:
-  cmp r2, r4
-  bcc FillZerobss
-
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl main
-  bx lr
-.size Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b Infinite_Loop
-  .size Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-  .section .isr_vector,"a",%progbits
-  .type g_pfnVectors, %object
-  .size g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-
-  .word _estack
-  .word Reset_Handler
-  .word NMI_Handler
-  .word HardFault_Handler
-  .word MemManage_Handler
-  .word BusFault_Handler
-  .word UsageFault_Handler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word SVC_Handler
-  .word DebugMon_Handler
-  .word 0
-  .word PendSV_Handler
-  .word SysTick_Handler
-  .word WWDG_IRQHandler
-  .word PVD_IRQHandler
-  .word TAMPER_IRQHandler
-  .word RTC_IRQHandler
-  .word FLASH_IRQHandler
-  .word RCC_IRQHandler
-  .word EXTI0_IRQHandler
-  .word EXTI1_IRQHandler
-  .word EXTI2_IRQHandler
-  .word EXTI3_IRQHandler
-  .word EXTI4_IRQHandler
-  .word DMA1_Channel1_IRQHandler
-  .word DMA1_Channel2_IRQHandler
-  .word DMA1_Channel3_IRQHandler
-  .word DMA1_Channel4_IRQHandler
-  .word DMA1_Channel5_IRQHandler
-  .word DMA1_Channel6_IRQHandler
-  .word DMA1_Channel7_IRQHandler
-  .word ADC1_IRQHandler
-  .word USB_HP_IRQHandler
-  .word USB_LP_IRQHandler
-  .word 0 
-  .word 0
-  .word EXTI9_5_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word TIM2_IRQHandler
-  .word TIM3_IRQHandler
-  .word TIM4_IRQHandler
-  .word I2C1_EV_IRQHandler
-  .word I2C1_ER_IRQHandler
-  .word I2C2_EV_IRQHandler
-  .word I2C2_ER_IRQHandler
-  .word SPI1_IRQHandler
-  .word SPI2_IRQHandler
-  .word USART1_IRQHandler
-  .word USART2_IRQHandler
-  .word USART3_IRQHandler
-  .word EXTI15_10_IRQHandler
-  .word RTC_Alarm_IRQHandler
-  .word USBWakeUp_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word BootRAM          /* @0x108. This is for boot in RAM mode for
-                            STM32F10x Medium Density devices. */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-  .weak NMI_Handler
-  .thumb_set NMI_Handler,Default_Handler
-
-  .weak HardFault_Handler
-  .thumb_set HardFault_Handler,Default_Handler
-
-  .weak MemManage_Handler
-  .thumb_set MemManage_Handler,Default_Handler
-
-  .weak BusFault_Handler
-  .thumb_set BusFault_Handler,Default_Handler
-
-  .weak UsageFault_Handler
-  .thumb_set UsageFault_Handler,Default_Handler
-
-  .weak SVC_Handler
-  .thumb_set SVC_Handler,Default_Handler
-
-  .weak DebugMon_Handler
-  .thumb_set DebugMon_Handler,Default_Handler
-
-  .weak PendSV_Handler
-  .thumb_set PendSV_Handler,Default_Handler
-
-  .weak SysTick_Handler
-  .thumb_set SysTick_Handler,Default_Handler
-
-  .weak WWDG_IRQHandler
-  .thumb_set WWDG_IRQHandler,Default_Handler
-
-  .weak PVD_IRQHandler
-  .thumb_set PVD_IRQHandler,Default_Handler
-
-  .weak TAMPER_IRQHandler
-  .thumb_set TAMPER_IRQHandler,Default_Handler
-
-  .weak RTC_IRQHandler
-  .thumb_set RTC_IRQHandler,Default_Handler
-
-  .weak FLASH_IRQHandler
-  .thumb_set FLASH_IRQHandler,Default_Handler
-
-  .weak RCC_IRQHandler
-  .thumb_set RCC_IRQHandler,Default_Handler
-
-  .weak EXTI0_IRQHandler
-  .thumb_set EXTI0_IRQHandler,Default_Handler
-
-  .weak EXTI1_IRQHandler
-  .thumb_set EXTI1_IRQHandler,Default_Handler
-
-  .weak EXTI2_IRQHandler
-  .thumb_set EXTI2_IRQHandler,Default_Handler
-
-  .weak EXTI3_IRQHandler
-  .thumb_set EXTI3_IRQHandler,Default_Handler
-
-  .weak EXTI4_IRQHandler
-  .thumb_set EXTI4_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel1_IRQHandler
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel2_IRQHandler
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel3_IRQHandler
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel4_IRQHandler
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel5_IRQHandler
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel6_IRQHandler
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel7_IRQHandler
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
-
-  .weak  ADC1_IRQHandler
-  .thumb_set ADC1_IRQHandler,Default_Handler
-
-  .weak USB_HP_IRQHandler
-  .thumb_set USB_HP_IRQHandler,Default_Handler
-
-  .weak USB_LP_IRQHandler
-  .thumb_set USB_LP_IRQHandler,Default_Handler
-
-  .weak EXTI9_5_IRQHandler
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
-
-  .weak TIM2_IRQHandler
-  .thumb_set TIM2_IRQHandler,Default_Handler
-
-  .weak TIM3_IRQHandler
-  .thumb_set TIM3_IRQHandler,Default_Handler
-
-  .weak TIM4_IRQHandler
-  .thumb_set TIM4_IRQHandler,Default_Handler
-
-  .weak I2C1_EV_IRQHandler
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
-
-  .weak I2C1_ER_IRQHandler
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
-
-  .weak I2C2_EV_IRQHandler
-  .thumb_set I2C2_EV_IRQHandler,Default_Handler
-
-  .weak I2C2_ER_IRQHandler
-  .thumb_set I2C2_ER_IRQHandler,Default_Handler
-
-  .weak SPI1_IRQHandler
-  .thumb_set SPI1_IRQHandler,Default_Handler
-
-  .weak SPI2_IRQHandler
-  .thumb_set SPI2_IRQHandler,Default_Handler
-
-  .weak USART1_IRQHandler
-  .thumb_set USART1_IRQHandler,Default_Handler
-
-  .weak USART2_IRQHandler
-  .thumb_set USART2_IRQHandler,Default_Handler
-
-  .weak USART3_IRQHandler
-  .thumb_set USART3_IRQHandler,Default_Handler
-
-  .weak EXTI15_10_IRQHandler
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
-
-  .weak RTC_Alarm_IRQHandler
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
-
-  .weak USBWakeUp_IRQHandler
-  .thumb_set USBWakeUp_IRQHandler,Default_Handler
-
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103x6.s

@@ -1,348 +0,0 @@
-/**
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
-  * @file      startup_stm32f103x6.s
-  * @author    MCD Application Team
-  * @brief     STM32F103x6 Devices vector table for Atollic toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Configure the clock system   
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M3 processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * @attention
-  *
-  * Copyright (c) 2017-2021 STMicroelectronics.
-  * All rights reserved.
-  *
-  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m3
-  .fpu softvfp
-  .thumb
-
-.global g_pfnVectors
-.global Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word _sidata
-/* start address for the .data section. defined in linker script */
-.word _sdata
-/* end address for the .data section. defined in linker script */
-.word _edata
-/* start address for the .bss section. defined in linker script */
-.word _sbss
-/* end address for the .bss section. defined in linker script */
-.word _ebss
-
-.equ  BootRAM, 0xF108F85F
-/**
- * @brief  This is the code that gets called when the processor first
- *          starts execution following a reset event. Only the absolutely
- *          necessary set is performed, after which the application
- *          supplied main() routine is called.
- * @param  None
- * @retval : None
-*/
-
-  .section .text.Reset_Handler
-  .weak Reset_Handler
-  .type Reset_Handler, %function
-Reset_Handler:
-
-/* Call the clock system initialization function.*/
-    bl  SystemInit
-
-/* Copy the data segment initializers from flash to SRAM */
-  ldr r0, =_sdata
-  ldr r1, =_edata
-  ldr r2, =_sidata
-  movs r3, #0
-  b LoopCopyDataInit
-
-CopyDataInit:
-  ldr r4, [r2, r3]
-  str r4, [r0, r3]
-  adds r3, r3, #4
-
-LoopCopyDataInit:
-  adds r4, r0, r3
-  cmp r4, r1
-  bcc CopyDataInit
-  
-/* Zero fill the bss segment. */
-  ldr r2, =_sbss
-  ldr r4, =_ebss
-  movs r3, #0
-  b LoopFillZerobss
-
-FillZerobss:
-  str  r3, [r2]
-  adds r2, r2, #4
-
-LoopFillZerobss:
-  cmp r2, r4
-  bcc FillZerobss
-
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl main
-  bx lr
-.size Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b Infinite_Loop
-  .size Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-  .section .isr_vector,"a",%progbits
-  .type g_pfnVectors, %object
-  .size g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-
-  .word _estack
-  .word Reset_Handler
-  .word NMI_Handler
-  .word HardFault_Handler
-  .word MemManage_Handler
-  .word BusFault_Handler
-  .word UsageFault_Handler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word SVC_Handler
-  .word DebugMon_Handler
-  .word 0
-  .word PendSV_Handler
-  .word SysTick_Handler
-  .word WWDG_IRQHandler
-  .word PVD_IRQHandler
-  .word TAMPER_IRQHandler
-  .word RTC_IRQHandler
-  .word FLASH_IRQHandler
-  .word RCC_IRQHandler
-  .word EXTI0_IRQHandler
-  .word EXTI1_IRQHandler
-  .word EXTI2_IRQHandler
-  .word EXTI3_IRQHandler
-  .word EXTI4_IRQHandler
-  .word DMA1_Channel1_IRQHandler
-  .word DMA1_Channel2_IRQHandler
-  .word DMA1_Channel3_IRQHandler
-  .word DMA1_Channel4_IRQHandler
-  .word DMA1_Channel5_IRQHandler
-  .word DMA1_Channel6_IRQHandler
-  .word DMA1_Channel7_IRQHandler
-  .word ADC1_2_IRQHandler
-  .word USB_HP_CAN1_TX_IRQHandler
-  .word USB_LP_CAN1_RX0_IRQHandler
-  .word CAN1_RX1_IRQHandler
-  .word CAN1_SCE_IRQHandler
-  .word EXTI9_5_IRQHandler
-  .word TIM1_BRK_IRQHandler
-  .word TIM1_UP_IRQHandler
-  .word TIM1_TRG_COM_IRQHandler
-  .word TIM1_CC_IRQHandler
-  .word TIM2_IRQHandler
-  .word TIM3_IRQHandler
-  .word 0
-  .word I2C1_EV_IRQHandler
-  .word I2C1_ER_IRQHandler
-  .word 0
-  .word 0
-  .word SPI1_IRQHandler
-  .word 0
-  .word USART1_IRQHandler
-  .word USART2_IRQHandler
-  .word 0
-  .word EXTI15_10_IRQHandler
-  .word RTC_Alarm_IRQHandler
-  .word USBWakeUp_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word BootRAM        /* @0x108. This is for boot in RAM mode for
-                          STM32F10x Low Density devices.*/
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-  .weak NMI_Handler
-  .thumb_set NMI_Handler,Default_Handler
-
-  .weak HardFault_Handler
-  .thumb_set HardFault_Handler,Default_Handler
-
-  .weak MemManage_Handler
-  .thumb_set MemManage_Handler,Default_Handler
-
-  .weak BusFault_Handler
-  .thumb_set BusFault_Handler,Default_Handler
-
-  .weak UsageFault_Handler
-  .thumb_set UsageFault_Handler,Default_Handler
-
-  .weak SVC_Handler
-  .thumb_set SVC_Handler,Default_Handler
-
-  .weak DebugMon_Handler
-  .thumb_set DebugMon_Handler,Default_Handler
-
-  .weak PendSV_Handler
-  .thumb_set PendSV_Handler,Default_Handler
-
-  .weak SysTick_Handler
-  .thumb_set SysTick_Handler,Default_Handler
-
-  .weak WWDG_IRQHandler
-  .thumb_set WWDG_IRQHandler,Default_Handler
-
-  .weak PVD_IRQHandler
-  .thumb_set PVD_IRQHandler,Default_Handler
-
-  .weak TAMPER_IRQHandler
-  .thumb_set TAMPER_IRQHandler,Default_Handler
-
-  .weak RTC_IRQHandler
-  .thumb_set RTC_IRQHandler,Default_Handler
-
-  .weak FLASH_IRQHandler
-  .thumb_set FLASH_IRQHandler,Default_Handler
-
-  .weak RCC_IRQHandler
-  .thumb_set RCC_IRQHandler,Default_Handler
-
-  .weak EXTI0_IRQHandler
-  .thumb_set EXTI0_IRQHandler,Default_Handler
-
-  .weak EXTI1_IRQHandler
-  .thumb_set EXTI1_IRQHandler,Default_Handler
-
-  .weak EXTI2_IRQHandler
-  .thumb_set EXTI2_IRQHandler,Default_Handler
-
-  .weak EXTI3_IRQHandler
-  .thumb_set EXTI3_IRQHandler,Default_Handler
-
-  .weak EXTI4_IRQHandler
-  .thumb_set EXTI4_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel1_IRQHandler
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel2_IRQHandler
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel3_IRQHandler
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel4_IRQHandler
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel5_IRQHandler
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel6_IRQHandler
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel7_IRQHandler
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
-
-  .weak ADC1_2_IRQHandler
-  .thumb_set ADC1_2_IRQHandler,Default_Handler
-
-  .weak USB_HP_CAN1_TX_IRQHandler
-  .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
-
-  .weak USB_LP_CAN1_RX0_IRQHandler
-  .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
-
-  .weak CAN1_RX1_IRQHandler
-  .thumb_set CAN1_RX1_IRQHandler,Default_Handler
-
-  .weak CAN1_SCE_IRQHandler
-  .thumb_set CAN1_SCE_IRQHandler,Default_Handler
-
-  .weak EXTI9_5_IRQHandler
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
-
-  .weak TIM1_BRK_IRQHandler
-  .thumb_set TIM1_BRK_IRQHandler,Default_Handler
-
-  .weak TIM1_UP_IRQHandler
-  .thumb_set TIM1_UP_IRQHandler,Default_Handler
-
-  .weak TIM1_TRG_COM_IRQHandler
-  .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
-
-  .weak TIM1_CC_IRQHandler
-  .thumb_set TIM1_CC_IRQHandler,Default_Handler
-
-  .weak TIM2_IRQHandler
-  .thumb_set TIM2_IRQHandler,Default_Handler
-
-  .weak TIM3_IRQHandler
-  .thumb_set TIM3_IRQHandler,Default_Handler
-
-  .weak I2C1_EV_IRQHandler
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
-
-  .weak I2C1_ER_IRQHandler
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
-
-  .weak SPI1_IRQHandler
-  .thumb_set SPI1_IRQHandler,Default_Handler
-
-  .weak USART1_IRQHandler
-  .thumb_set USART1_IRQHandler,Default_Handler
-
-  .weak USART2_IRQHandler
-  .thumb_set USART2_IRQHandler,Default_Handler
-
-  .weak EXTI15_10_IRQHandler
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
-
-  .weak RTC_Alarm_IRQHandler
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
-
-  .weak USBWakeUp_IRQHandler
-  .thumb_set USBWakeUp_IRQHandler,Default_Handler
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xe.s

@@ -1,470 +0,0 @@
-/**
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
-  * @file      startup_stm32f103xe.s
-  * @author    MCD Application Team
-  * @brief     STM32F103xE Devices vector table for Atollic toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Configure the clock system   
-  *                - Configure external SRAM mounted on STM3210E-EVAL board
-  *                  to be used as data memory (optional, to be enabled by user)
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M3 processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * @attention
-  *
-  * Copyright (c) 2017-2021 STMicroelectronics.
-  * All rights reserved.
-  *
-  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m3
-  .fpu softvfp
-  .thumb
-
-.global g_pfnVectors
-.global Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word _sidata
-/* start address for the .data section. defined in linker script */
-.word _sdata
-/* end address for the .data section. defined in linker script */
-.word _edata
-/* start address for the .bss section. defined in linker script */
-.word _sbss
-/* end address for the .bss section. defined in linker script */
-.word _ebss
-
-.equ  BootRAM,        0xF1E0F85F
-/**
- * @brief  This is the code that gets called when the processor first
- *          starts execution following a reset event. Only the absolutely
- *          necessary set is performed, after which the application
- *          supplied main() routine is called.
- * @param  None
- * @retval : None
-*/
-
-  .section .text.Reset_Handler
-  .weak Reset_Handler
-  .type Reset_Handler, %function
-Reset_Handler:
-
-/* Call the clock system initialization function.*/
-    bl  SystemInit
-
-/* Copy the data segment initializers from flash to SRAM */
-  ldr r0, =_sdata
-  ldr r1, =_edata
-  ldr r2, =_sidata
-  movs r3, #0
-  b LoopCopyDataInit
-
-CopyDataInit:
-  ldr r4, [r2, r3]
-  str r4, [r0, r3]
-  adds r3, r3, #4
-
-LoopCopyDataInit:
-  adds r4, r0, r3
-  cmp r4, r1
-  bcc CopyDataInit
-  
-/* Zero fill the bss segment. */
-  ldr r2, =_sbss
-  ldr r4, =_ebss
-  movs r3, #0
-  b LoopFillZerobss
-
-FillZerobss:
-  str  r3, [r2]
-  adds r2, r2, #4
-
-LoopFillZerobss:
-  cmp r2, r4
-  bcc FillZerobss
-
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl main
-  bx lr
-.size Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b Infinite_Loop
-  .size Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-  .section .isr_vector,"a",%progbits
-  .type g_pfnVectors, %object
-  .size g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-
-  .word _estack
-  .word Reset_Handler
-  .word NMI_Handler
-  .word HardFault_Handler
-  .word MemManage_Handler
-  .word BusFault_Handler
-  .word UsageFault_Handler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word SVC_Handler
-  .word DebugMon_Handler
-  .word 0
-  .word PendSV_Handler
-  .word SysTick_Handler
-  .word WWDG_IRQHandler
-  .word PVD_IRQHandler
-  .word TAMPER_IRQHandler
-  .word RTC_IRQHandler
-  .word FLASH_IRQHandler
-  .word RCC_IRQHandler
-  .word EXTI0_IRQHandler
-  .word EXTI1_IRQHandler
-  .word EXTI2_IRQHandler
-  .word EXTI3_IRQHandler
-  .word EXTI4_IRQHandler
-  .word DMA1_Channel1_IRQHandler
-  .word DMA1_Channel2_IRQHandler
-  .word DMA1_Channel3_IRQHandler
-  .word DMA1_Channel4_IRQHandler
-  .word DMA1_Channel5_IRQHandler
-  .word DMA1_Channel6_IRQHandler
-  .word DMA1_Channel7_IRQHandler
-  .word ADC1_2_IRQHandler
-  .word USB_HP_CAN1_TX_IRQHandler
-  .word USB_LP_CAN1_RX0_IRQHandler
-  .word CAN1_RX1_IRQHandler
-  .word CAN1_SCE_IRQHandler
-  .word EXTI9_5_IRQHandler
-  .word TIM1_BRK_IRQHandler
-  .word TIM1_UP_IRQHandler
-  .word TIM1_TRG_COM_IRQHandler
-  .word TIM1_CC_IRQHandler
-  .word TIM2_IRQHandler
-  .word TIM3_IRQHandler
-  .word TIM4_IRQHandler
-  .word I2C1_EV_IRQHandler
-  .word I2C1_ER_IRQHandler
-  .word I2C2_EV_IRQHandler
-  .word I2C2_ER_IRQHandler
-  .word SPI1_IRQHandler
-  .word SPI2_IRQHandler
-  .word USART1_IRQHandler
-  .word USART2_IRQHandler
-  .word USART3_IRQHandler
-  .word EXTI15_10_IRQHandler
-  .word RTC_Alarm_IRQHandler
-  .word USBWakeUp_IRQHandler
-  .word TIM8_BRK_IRQHandler
-  .word TIM8_UP_IRQHandler
-  .word TIM8_TRG_COM_IRQHandler
-  .word TIM8_CC_IRQHandler
-  .word ADC3_IRQHandler
-  .word FSMC_IRQHandler
-  .word SDIO_IRQHandler
-  .word TIM5_IRQHandler
-  .word SPI3_IRQHandler
-  .word UART4_IRQHandler
-  .word UART5_IRQHandler
-  .word TIM6_IRQHandler
-  .word TIM7_IRQHandler
-  .word DMA2_Channel1_IRQHandler
-  .word DMA2_Channel2_IRQHandler
-  .word DMA2_Channel3_IRQHandler
-  .word DMA2_Channel4_5_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word BootRAM       /* @0x1E0. This is for boot in RAM mode for
-                         STM32F10x High Density devices. */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-  .weak NMI_Handler
-  .thumb_set NMI_Handler,Default_Handler
-
-  .weak HardFault_Handler
-  .thumb_set HardFault_Handler,Default_Handler
-
-  .weak MemManage_Handler
-  .thumb_set MemManage_Handler,Default_Handler
-
-  .weak BusFault_Handler
-  .thumb_set BusFault_Handler,Default_Handler
-
-  .weak UsageFault_Handler
-  .thumb_set UsageFault_Handler,Default_Handler
-
-  .weak SVC_Handler
-  .thumb_set SVC_Handler,Default_Handler
-
-  .weak DebugMon_Handler
-  .thumb_set DebugMon_Handler,Default_Handler
-
-  .weak PendSV_Handler
-  .thumb_set PendSV_Handler,Default_Handler
-
-  .weak SysTick_Handler
-  .thumb_set SysTick_Handler,Default_Handler
-
-  .weak WWDG_IRQHandler
-  .thumb_set WWDG_IRQHandler,Default_Handler
-
-  .weak PVD_IRQHandler
-  .thumb_set PVD_IRQHandler,Default_Handler
-
-  .weak TAMPER_IRQHandler
-  .thumb_set TAMPER_IRQHandler,Default_Handler
-
-  .weak RTC_IRQHandler
-  .thumb_set RTC_IRQHandler,Default_Handler
-
-  .weak FLASH_IRQHandler
-  .thumb_set FLASH_IRQHandler,Default_Handler
-
-  .weak RCC_IRQHandler
-  .thumb_set RCC_IRQHandler,Default_Handler
-
-  .weak EXTI0_IRQHandler
-  .thumb_set EXTI0_IRQHandler,Default_Handler
-
-  .weak EXTI1_IRQHandler
-  .thumb_set EXTI1_IRQHandler,Default_Handler
-
-  .weak EXTI2_IRQHandler
-  .thumb_set EXTI2_IRQHandler,Default_Handler
-
-  .weak EXTI3_IRQHandler
-  .thumb_set EXTI3_IRQHandler,Default_Handler
-
-  .weak EXTI4_IRQHandler
-  .thumb_set EXTI4_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel1_IRQHandler
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel2_IRQHandler
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel3_IRQHandler
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel4_IRQHandler
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel5_IRQHandler
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel6_IRQHandler
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel7_IRQHandler
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
-
-  .weak ADC1_2_IRQHandler
-  .thumb_set ADC1_2_IRQHandler,Default_Handler
-
-  .weak USB_HP_CAN1_TX_IRQHandler
-  .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
-
-  .weak USB_LP_CAN1_RX0_IRQHandler
-  .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
-
-  .weak CAN1_RX1_IRQHandler
-  .thumb_set CAN1_RX1_IRQHandler,Default_Handler
-
-  .weak CAN1_SCE_IRQHandler
-  .thumb_set CAN1_SCE_IRQHandler,Default_Handler
-
-  .weak EXTI9_5_IRQHandler
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
-
-  .weak TIM1_BRK_IRQHandler
-  .thumb_set TIM1_BRK_IRQHandler,Default_Handler
-
-  .weak TIM1_UP_IRQHandler
-  .thumb_set TIM1_UP_IRQHandler,Default_Handler
-
-  .weak TIM1_TRG_COM_IRQHandler
-  .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
-
-  .weak TIM1_CC_IRQHandler
-  .thumb_set TIM1_CC_IRQHandler,Default_Handler
-
-  .weak TIM2_IRQHandler
-  .thumb_set TIM2_IRQHandler,Default_Handler
-
-  .weak TIM3_IRQHandler
-  .thumb_set TIM3_IRQHandler,Default_Handler
-
-  .weak TIM4_IRQHandler
-  .thumb_set TIM4_IRQHandler,Default_Handler
-
-  .weak I2C1_EV_IRQHandler
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
-
-  .weak I2C1_ER_IRQHandler
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
-
-  .weak I2C2_EV_IRQHandler
-  .thumb_set I2C2_EV_IRQHandler,Default_Handler
-
-  .weak I2C2_ER_IRQHandler
-  .thumb_set I2C2_ER_IRQHandler,Default_Handler
-
-  .weak SPI1_IRQHandler
-  .thumb_set SPI1_IRQHandler,Default_Handler
-
-  .weak SPI2_IRQHandler
-  .thumb_set SPI2_IRQHandler,Default_Handler
-
-  .weak USART1_IRQHandler
-  .thumb_set USART1_IRQHandler,Default_Handler
-
-  .weak USART2_IRQHandler
-  .thumb_set USART2_IRQHandler,Default_Handler
-
-  .weak USART3_IRQHandler
-  .thumb_set USART3_IRQHandler,Default_Handler
-
-  .weak EXTI15_10_IRQHandler
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
-
-  .weak RTC_Alarm_IRQHandler
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
-
-  .weak USBWakeUp_IRQHandler
-  .thumb_set USBWakeUp_IRQHandler,Default_Handler
-
-  .weak TIM8_BRK_IRQHandler
-  .thumb_set TIM8_BRK_IRQHandler,Default_Handler
-
-  .weak TIM8_UP_IRQHandler
-  .thumb_set TIM8_UP_IRQHandler,Default_Handler
-
-  .weak TIM8_TRG_COM_IRQHandler
-  .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
-
-  .weak TIM8_CC_IRQHandler
-  .thumb_set TIM8_CC_IRQHandler,Default_Handler
-
-  .weak ADC3_IRQHandler
-  .thumb_set ADC3_IRQHandler,Default_Handler
-
-  .weak FSMC_IRQHandler
-  .thumb_set FSMC_IRQHandler,Default_Handler
-
-  .weak SDIO_IRQHandler
-  .thumb_set SDIO_IRQHandler,Default_Handler
-
-  .weak TIM5_IRQHandler
-  .thumb_set TIM5_IRQHandler,Default_Handler
-
-  .weak SPI3_IRQHandler
-  .thumb_set SPI3_IRQHandler,Default_Handler
-
-  .weak UART4_IRQHandler
-  .thumb_set UART4_IRQHandler,Default_Handler
-
-  .weak UART5_IRQHandler
-  .thumb_set UART5_IRQHandler,Default_Handler
-
-  .weak TIM6_IRQHandler
-  .thumb_set TIM6_IRQHandler,Default_Handler
-
-  .weak TIM7_IRQHandler
-  .thumb_set TIM7_IRQHandler,Default_Handler
-
-  .weak DMA2_Channel1_IRQHandler
-  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
-
-  .weak DMA2_Channel2_IRQHandler
-  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
-
-  .weak DMA2_Channel3_IRQHandler
-  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
-
-  .weak DMA2_Channel4_5_IRQHandler
-  .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xg.s

@@ -1,466 +0,0 @@
-/**
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
-  * @file      startup_stm32f103xb.s
-  * @author    MCD Application Team
-  * @brief     STM32F103xB Devices vector table for Atollic toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Configure the clock system   
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M3 processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * @attention
-  *
-  * Copyright (c) 2017-2021 STMicroelectronics.
-  * All rights reserved.
-  *
-  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m3
-  .fpu softvfp
-  .thumb
-
-.global g_pfnVectors
-.global Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word _sidata
-/* start address for the .data section. defined in linker script */
-.word _sdata
-/* end address for the .data section. defined in linker script */
-.word _edata
-/* start address for the .bss section. defined in linker script */
-.word _sbss
-/* end address for the .bss section. defined in linker script */
-.word _ebss
-
-.equ  BootRAM,        0xF1E0F85F
-/**
- * @brief  This is the code that gets called when the processor first
- *          starts execution following a reset event. Only the absolutely
- *          necessary set is performed, after which the application
- *          supplied main() routine is called.
- * @param  None
- * @retval : None
-*/
-
-  .section .text.Reset_Handler
-  .weak Reset_Handler
-  .type Reset_Handler, %function
-Reset_Handler:
-
-/* Call the clock system initialization function.*/
-    bl  SystemInit
-
-/* Copy the data segment initializers from flash to SRAM */
-  ldr r0, =_sdata
-  ldr r1, =_edata
-  ldr r2, =_sidata
-  movs r3, #0
-  b LoopCopyDataInit
-
-CopyDataInit:
-  ldr r4, [r2, r3]
-  str r4, [r0, r3]
-  adds r3, r3, #4
-
-LoopCopyDataInit:
-  adds r4, r0, r3
-  cmp r4, r1
-  bcc CopyDataInit
-  
-/* Zero fill the bss segment. */
-  ldr r2, =_sbss
-  ldr r4, =_ebss
-  movs r3, #0
-  b LoopFillZerobss
-
-FillZerobss:
-  str  r3, [r2]
-  adds r2, r2, #4
-
-LoopFillZerobss:
-  cmp r2, r4
-  bcc FillZerobss
-
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl main
-  bx lr
-.size Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- * @param  None
- * @retval None       
-*/
-    .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b Infinite_Loop
-  .size Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-*******************************************************************************/
-  .section .isr_vector,"a",%progbits
-  .type g_pfnVectors, %object
-  .size g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-
-  .word  _estack
-  .word  Reset_Handler
-  .word  NMI_Handler
-  .word  HardFault_Handler
-  .word  MemManage_Handler
-  .word  BusFault_Handler
-  .word  UsageFault_Handler
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  SVC_Handler
-  .word  DebugMon_Handler
-  .word  0
-  .word  PendSV_Handler
-  .word  SysTick_Handler
-  .word  WWDG_IRQHandler
-  .word  PVD_IRQHandler
-  .word  TAMPER_IRQHandler
-  .word  RTC_IRQHandler
-  .word  FLASH_IRQHandler
-  .word  RCC_IRQHandler
-  .word  EXTI0_IRQHandler
-  .word  EXTI1_IRQHandler
-  .word  EXTI2_IRQHandler
-  .word  EXTI3_IRQHandler
-  .word  EXTI4_IRQHandler
-  .word  DMA1_Channel1_IRQHandler
-  .word  DMA1_Channel2_IRQHandler
-  .word  DMA1_Channel3_IRQHandler
-  .word  DMA1_Channel4_IRQHandler
-  .word  DMA1_Channel5_IRQHandler
-  .word  DMA1_Channel6_IRQHandler
-  .word  DMA1_Channel7_IRQHandler
-  .word  ADC1_2_IRQHandler
-  .word  USB_HP_CAN1_TX_IRQHandler
-  .word  USB_LP_CAN1_RX0_IRQHandler
-  .word  CAN1_RX1_IRQHandler
-  .word  CAN1_SCE_IRQHandler
-  .word  EXTI9_5_IRQHandler
-  .word  TIM1_BRK_TIM9_IRQHandler
-  .word  TIM1_UP_TIM10_IRQHandler
-  .word  TIM1_TRG_COM_TIM11_IRQHandler
-  .word  TIM1_CC_IRQHandler
-  .word  TIM2_IRQHandler
-  .word  TIM3_IRQHandler
-  .word  TIM4_IRQHandler
-  .word  I2C1_EV_IRQHandler
-  .word  I2C1_ER_IRQHandler
-  .word  I2C2_EV_IRQHandler
-  .word  I2C2_ER_IRQHandler
-  .word  SPI1_IRQHandler
-  .word  SPI2_IRQHandler
-  .word  USART1_IRQHandler
-  .word  USART2_IRQHandler
-  .word  USART3_IRQHandler
-  .word  EXTI15_10_IRQHandler
-  .word  RTC_Alarm_IRQHandler
-  .word  USBWakeUp_IRQHandler
-  .word  TIM8_BRK_TIM12_IRQHandler
-  .word  TIM8_UP_TIM13_IRQHandler
-  .word  TIM8_TRG_COM_TIM14_IRQHandler
-  .word  TIM8_CC_IRQHandler
-  .word  ADC3_IRQHandler
-  .word  FSMC_IRQHandler
-  .word  SDIO_IRQHandler
-  .word  TIM5_IRQHandler
-  .word  SPI3_IRQHandler
-  .word  UART4_IRQHandler
-  .word  UART5_IRQHandler
-  .word  TIM6_IRQHandler
-  .word  TIM7_IRQHandler
-  .word  DMA2_Channel1_IRQHandler
-  .word  DMA2_Channel2_IRQHandler
-  .word  DMA2_Channel3_IRQHandler
-  .word  DMA2_Channel4_5_IRQHandler
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  BootRAM       /* @0x1E0. This is for boot in RAM mode for 
-                         STM32F10x XL-Density devices. */
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler. 
-* As they are weak aliases, any function with the same name will override 
-* this definition.
-* 
-*******************************************************************************/
-    
-  .weak  NMI_Handler
-  .thumb_set NMI_Handler,Default_Handler
-  
-  .weak  HardFault_Handler
-  .thumb_set HardFault_Handler,Default_Handler
-  
-  .weak  MemManage_Handler
-  .thumb_set MemManage_Handler,Default_Handler
-  
-  .weak  BusFault_Handler
-  .thumb_set BusFault_Handler,Default_Handler
-
-  .weak  UsageFault_Handler
-  .thumb_set UsageFault_Handler,Default_Handler
-
-  .weak  SVC_Handler
-  .thumb_set SVC_Handler,Default_Handler
-
-  .weak  DebugMon_Handler
-  .thumb_set DebugMon_Handler,Default_Handler
-
-  .weak  PendSV_Handler
-  .thumb_set PendSV_Handler,Default_Handler
-
-  .weak  SysTick_Handler
-  .thumb_set SysTick_Handler,Default_Handler
-
-  .weak  WWDG_IRQHandler
-  .thumb_set WWDG_IRQHandler,Default_Handler
-
-  .weak  PVD_IRQHandler
-  .thumb_set PVD_IRQHandler,Default_Handler
-
-  .weak  TAMPER_IRQHandler
-  .thumb_set TAMPER_IRQHandler,Default_Handler
-
-  .weak  RTC_IRQHandler
-  .thumb_set RTC_IRQHandler,Default_Handler
-
-  .weak  FLASH_IRQHandler
-  .thumb_set FLASH_IRQHandler,Default_Handler
-
-  .weak  RCC_IRQHandler
-  .thumb_set RCC_IRQHandler,Default_Handler
-
-  .weak  EXTI0_IRQHandler
-  .thumb_set EXTI0_IRQHandler,Default_Handler
-
-  .weak  EXTI1_IRQHandler
-  .thumb_set EXTI1_IRQHandler,Default_Handler
-
-  .weak  EXTI2_IRQHandler
-  .thumb_set EXTI2_IRQHandler,Default_Handler
-
-  .weak  EXTI3_IRQHandler
-  .thumb_set EXTI3_IRQHandler,Default_Handler
-
-  .weak  EXTI4_IRQHandler
-  .thumb_set EXTI4_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel1_IRQHandler
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel2_IRQHandler
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel3_IRQHandler
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel4_IRQHandler
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel5_IRQHandler
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel6_IRQHandler
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel7_IRQHandler
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
-
-  .weak  ADC1_2_IRQHandler
-  .thumb_set ADC1_2_IRQHandler,Default_Handler
-
-  .weak  USB_HP_CAN1_TX_IRQHandler
-  .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
-
-  .weak  USB_LP_CAN1_RX0_IRQHandler
-  .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
-
-  .weak  CAN1_RX1_IRQHandler
-  .thumb_set CAN1_RX1_IRQHandler,Default_Handler
-
-  .weak  CAN1_SCE_IRQHandler
-  .thumb_set CAN1_SCE_IRQHandler,Default_Handler
-
-  .weak  EXTI9_5_IRQHandler
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
-
-  .weak  TIM1_BRK_TIM9_IRQHandler
-  .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
-
-  .weak  TIM1_UP_TIM10_IRQHandler
-  .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
-
-  .weak  TIM1_TRG_COM_TIM11_IRQHandler
-  .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
-
-  .weak  TIM1_CC_IRQHandler
-  .thumb_set TIM1_CC_IRQHandler,Default_Handler
-
-  .weak  TIM2_IRQHandler
-  .thumb_set TIM2_IRQHandler,Default_Handler
-
-  .weak  TIM3_IRQHandler
-  .thumb_set TIM3_IRQHandler,Default_Handler
-
-  .weak  TIM4_IRQHandler
-  .thumb_set TIM4_IRQHandler,Default_Handler
-
-  .weak  I2C1_EV_IRQHandler
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
-
-  .weak  I2C1_ER_IRQHandler
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
-
-  .weak  I2C2_EV_IRQHandler
-  .thumb_set I2C2_EV_IRQHandler,Default_Handler
-
-  .weak  I2C2_ER_IRQHandler
-  .thumb_set I2C2_ER_IRQHandler,Default_Handler
-
-  .weak  SPI1_IRQHandler
-  .thumb_set SPI1_IRQHandler,Default_Handler
-
-  .weak  SPI2_IRQHandler
-  .thumb_set SPI2_IRQHandler,Default_Handler
-
-  .weak  USART1_IRQHandler
-  .thumb_set USART1_IRQHandler,Default_Handler
-
-  .weak  USART2_IRQHandler
-  .thumb_set USART2_IRQHandler,Default_Handler
-
-  .weak  USART3_IRQHandler
-  .thumb_set USART3_IRQHandler,Default_Handler
-
-  .weak  EXTI15_10_IRQHandler
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
-
-  .weak  RTC_Alarm_IRQHandler
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
-
-  .weak  USBWakeUp_IRQHandler
-  .thumb_set USBWakeUp_IRQHandler,Default_Handler
-
-  .weak  TIM8_BRK_TIM12_IRQHandler
-  .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
-
-  .weak  TIM8_UP_TIM13_IRQHandler
-  .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
-
-  .weak  TIM8_TRG_COM_TIM14_IRQHandler
-  .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
-
-  .weak  TIM8_CC_IRQHandler
-  .thumb_set TIM8_CC_IRQHandler,Default_Handler
-
-  .weak  ADC3_IRQHandler
-  .thumb_set ADC3_IRQHandler,Default_Handler
-
-  .weak  FSMC_IRQHandler
-  .thumb_set FSMC_IRQHandler,Default_Handler
-
-  .weak  SDIO_IRQHandler
-  .thumb_set SDIO_IRQHandler,Default_Handler
-
-  .weak  TIM5_IRQHandler
-  .thumb_set TIM5_IRQHandler,Default_Handler
-
-  .weak  SPI3_IRQHandler
-  .thumb_set SPI3_IRQHandler,Default_Handler
-
-  .weak  UART4_IRQHandler
-  .thumb_set UART4_IRQHandler,Default_Handler
-
-  .weak  UART5_IRQHandler
-  .thumb_set UART5_IRQHandler,Default_Handler
-
-  .weak  TIM6_IRQHandler
-  .thumb_set TIM6_IRQHandler,Default_Handler
-
-  .weak  TIM7_IRQHandler
-  .thumb_set TIM7_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel1_IRQHandler
-  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel2_IRQHandler
-  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel3_IRQHandler
-  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel4_5_IRQHandler
-  .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f105xc.s

@@ -1,463 +0,0 @@
-/**
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
-  * @file      startup_stm32f105xc.s
-  * @author    MCD Application Team
-  * @brief     STM32F105xC Devices vector table for Atollic toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Configure the clock system   
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M3 processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * @attention
-  *
-  * Copyright (c) 2017-2021 STMicroelectronics.
-  * All rights reserved.
-  *
-  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m3
-  .fpu softvfp
-  .thumb
-
-.global g_pfnVectors
-.global Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word _sidata
-/* start address for the .data section. defined in linker script */
-.word _sdata
-/* end address for the .data section. defined in linker script */
-.word _edata
-/* start address for the .bss section. defined in linker script */
-.word _sbss
-/* end address for the .bss section. defined in linker script */
-.word _ebss
-
-.equ  BootRAM, 0xF1E0F85F
-/**
- * @brief  This is the code that gets called when the processor first
- *          starts execution following a reset event. Only the absolutely
- *          necessary set is performed, after which the application
- *          supplied main() routine is called.
- * @param  None
- * @retval : None
-*/
-
-  .section .text.Reset_Handler
-  .weak Reset_Handler
-  .type Reset_Handler, %function
-Reset_Handler:
-
-/* Call the clock system initialization function.*/
-    bl  SystemInit
-
-/* Copy the data segment initializers from flash to SRAM */
-  ldr r0, =_sdata
-  ldr r1, =_edata
-  ldr r2, =_sidata
-  movs r3, #0
-  b LoopCopyDataInit
-
-CopyDataInit:
-  ldr r4, [r2, r3]
-  str r4, [r0, r3]
-  adds r3, r3, #4
-
-LoopCopyDataInit:
-  adds r4, r0, r3
-  cmp r4, r1
-  bcc CopyDataInit
-  
-/* Zero fill the bss segment. */
-  ldr r2, =_sbss
-  ldr r4, =_ebss
-  movs r3, #0
-  b LoopFillZerobss
-
-FillZerobss:
-  str  r3, [r2]
-  adds r2, r2, #4
-
-LoopFillZerobss:
-  cmp r2, r4
-  bcc FillZerobss
-
-/* Call static constructors */
-  bl __libc_init_array
-/* Call the application's entry point.*/
-  bl main
-  bx lr
-.size Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- * @param  None
- * @retval None
-*/
-    .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b Infinite_Loop
-  .size Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-  .section .isr_vector,"a",%progbits
-  .type g_pfnVectors, %object
-  .size g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-
-  .word _estack
-  .word Reset_Handler
-  .word NMI_Handler
-  .word HardFault_Handler
-  .word MemManage_Handler
-  .word BusFault_Handler
-  .word UsageFault_Handler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word SVC_Handler
-  .word DebugMon_Handler
-  .word 0
-  .word PendSV_Handler
-  .word SysTick_Handler
-  .word WWDG_IRQHandler
-  .word PVD_IRQHandler
-  .word TAMPER_IRQHandler
-  .word RTC_IRQHandler
-  .word FLASH_IRQHandler
-  .word RCC_IRQHandler
-  .word EXTI0_IRQHandler
-  .word EXTI1_IRQHandler
-  .word EXTI2_IRQHandler
-  .word EXTI3_IRQHandler
-  .word EXTI4_IRQHandler
-  .word DMA1_Channel1_IRQHandler
-  .word DMA1_Channel2_IRQHandler
-  .word DMA1_Channel3_IRQHandler
-  .word DMA1_Channel4_IRQHandler
-  .word DMA1_Channel5_IRQHandler
-  .word DMA1_Channel6_IRQHandler
-  .word DMA1_Channel7_IRQHandler
-  .word ADC1_2_IRQHandler
-  .word CAN1_TX_IRQHandler
-  .word CAN1_RX0_IRQHandler
-   .word CAN1_RX1_IRQHandler
-  .word CAN1_SCE_IRQHandler
-  .word EXTI9_5_IRQHandler
-  .word TIM1_BRK_IRQHandler
-  .word TIM1_UP_IRQHandler
-  .word TIM1_TRG_COM_IRQHandler
-  .word TIM1_CC_IRQHandler
-  .word TIM2_IRQHandler
-  .word TIM3_IRQHandler
-  .word TIM4_IRQHandler
-  .word I2C1_EV_IRQHandler
-  .word I2C1_ER_IRQHandler
-  .word I2C2_EV_IRQHandler
-  .word I2C2_ER_IRQHandler
-  .word SPI1_IRQHandler
-  .word SPI2_IRQHandler
-  .word USART1_IRQHandler
-  .word USART2_IRQHandler
-  .word USART3_IRQHandler
-  .word EXTI15_10_IRQHandler
-  .word RTC_Alarm_IRQHandler
-  .word OTG_FS_WKUP_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word TIM5_IRQHandler
-  .word SPI3_IRQHandler
-  .word UART4_IRQHandler
-  .word UART5_IRQHandler
-  .word TIM6_IRQHandler
-  .word TIM7_IRQHandler
-  .word DMA2_Channel1_IRQHandler
-  .word DMA2_Channel2_IRQHandler
-  .word DMA2_Channel3_IRQHandler
-  .word DMA2_Channel4_IRQHandler
-  .word DMA2_Channel5_IRQHandler
-  .word 0
-  .word 0
-  .word CAN2_TX_IRQHandler
-  .word CAN2_RX0_IRQHandler
-  .word CAN2_RX1_IRQHandler
-  .word CAN2_SCE_IRQHandler
-  .word OTG_FS_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word BootRAM     /* @0x1E0. This is for boot in RAM mode for
-                         STM32F10x Connectivity line Devices. */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-  .weak NMI_Handler
-  .thumb_set NMI_Handler,Default_Handler
-
-  .weak HardFault_Handler
-  .thumb_set HardFault_Handler,Default_Handler
-
-  .weak MemManage_Handler
-  .thumb_set MemManage_Handler,Default_Handler
-
-  .weak BusFault_Handler
-  .thumb_set BusFault_Handler,Default_Handler
-
-  .weak UsageFault_Handler
-  .thumb_set UsageFault_Handler,Default_Handler
-
-  .weak SVC_Handler
-  .thumb_set SVC_Handler,Default_Handler
-
-  .weak DebugMon_Handler
-  .thumb_set DebugMon_Handler,Default_Handler
-
-  .weak PendSV_Handler
-  .thumb_set PendSV_Handler,Default_Handler
-
-  .weak SysTick_Handler
-  .thumb_set SysTick_Handler,Default_Handler
-
-  .weak WWDG_IRQHandler
-  .thumb_set WWDG_IRQHandler,Default_Handler
-
-  .weak PVD_IRQHandler
-  .thumb_set PVD_IRQHandler,Default_Handler
-
-  .weak TAMPER_IRQHandler
-  .thumb_set TAMPER_IRQHandler,Default_Handler
-
-  .weak RTC_IRQHandler
-  .thumb_set RTC_IRQHandler,Default_Handler
-
-  .weak FLASH_IRQHandler
-  .thumb_set FLASH_IRQHandler,Default_Handler
-
-  .weak RCC_IRQHandler
-  .thumb_set RCC_IRQHandler,Default_Handler
-
-  .weak EXTI0_IRQHandler
-  .thumb_set EXTI0_IRQHandler,Default_Handler
-
-  .weak EXTI1_IRQHandler
-  .thumb_set EXTI1_IRQHandler,Default_Handler
-
-  .weak EXTI2_IRQHandler
-  .thumb_set EXTI2_IRQHandler,Default_Handler
-
-  .weak EXTI3_IRQHandler
-  .thumb_set EXTI3_IRQHandler,Default_Handler
-
-  .weak EXTI4_IRQHandler
-  .thumb_set EXTI4_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel1_IRQHandler
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel2_IRQHandler
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel3_IRQHandler
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel4_IRQHandler
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel5_IRQHandler
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel6_IRQHandler
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
-
-  .weak DMA1_Channel7_IRQHandler
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
-
-  .weak ADC1_2_IRQHandler
-  .thumb_set ADC1_2_IRQHandler,Default_Handler
-
-  .weak CAN1_TX_IRQHandler
-  .thumb_set CAN1_TX_IRQHandler,Default_Handler
-
-  .weak CAN1_RX0_IRQHandler
-  .thumb_set CAN1_RX0_IRQHandler,Default_Handler
-
-  .weak CAN1_RX1_IRQHandler
-  .thumb_set CAN1_RX1_IRQHandler,Default_Handler
-
-  .weak CAN1_SCE_IRQHandler
-  .thumb_set CAN1_SCE_IRQHandler,Default_Handler
-
-  .weak EXTI9_5_IRQHandler
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
-
-  .weak TIM1_BRK_IRQHandler
-  .thumb_set TIM1_BRK_IRQHandler,Default_Handler
-
-  .weak TIM1_UP_IRQHandler
-  .thumb_set TIM1_UP_IRQHandler,Default_Handler
-
-  .weak TIM1_TRG_COM_IRQHandler
-  .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
-
-  .weak TIM1_CC_IRQHandler
-  .thumb_set TIM1_CC_IRQHandler,Default_Handler
-
-  .weak TIM2_IRQHandler
-  .thumb_set TIM2_IRQHandler,Default_Handler
-
-  .weak TIM3_IRQHandler
-  .thumb_set TIM3_IRQHandler,Default_Handler
-
-  .weak TIM4_IRQHandler
-  .thumb_set TIM4_IRQHandler,Default_Handler
-
-  .weak I2C1_EV_IRQHandler
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
-
-  .weak I2C1_ER_IRQHandler
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
-
-  .weak I2C2_EV_IRQHandler
-  .thumb_set I2C2_EV_IRQHandler,Default_Handler
-
-  .weak I2C2_ER_IRQHandler
-  .thumb_set I2C2_ER_IRQHandler,Default_Handler
-
-  .weak SPI1_IRQHandler
-  .thumb_set SPI1_IRQHandler,Default_Handler
-
-  .weak SPI2_IRQHandler
-  .thumb_set SPI2_IRQHandler,Default_Handler
-
-  .weak USART1_IRQHandler
-  .thumb_set USART1_IRQHandler,Default_Handler
-
-  .weak USART2_IRQHandler
-  .thumb_set USART2_IRQHandler,Default_Handler
-
-  .weak USART3_IRQHandler
-  .thumb_set USART3_IRQHandler,Default_Handler
-
-  .weak EXTI15_10_IRQHandler
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
-
-  .weak RTC_Alarm_IRQHandler
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
-
-  .weak OTG_FS_WKUP_IRQHandler
-  .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
-
-  .weak TIM5_IRQHandler
-  .thumb_set TIM5_IRQHandler,Default_Handler
-
-  .weak SPI3_IRQHandler
-  .thumb_set SPI3_IRQHandler,Default_Handler
-
-  .weak UART4_IRQHandler
-  .thumb_set UART4_IRQHandler,Default_Handler
-
-  .weak UART5_IRQHandler
-  .thumb_set UART5_IRQHandler,Default_Handler
-
-  .weak TIM6_IRQHandler
-  .thumb_set TIM6_IRQHandler,Default_Handler
-
-  .weak TIM7_IRQHandler
-  .thumb_set TIM7_IRQHandler,Default_Handler
-
-  .weak DMA2_Channel1_IRQHandler
-  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
-
-  .weak DMA2_Channel2_IRQHandler
-  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
-
-  .weak DMA2_Channel3_IRQHandler
-  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
-
-  .weak DMA2_Channel4_IRQHandler
-  .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
-
-  .weak DMA2_Channel5_IRQHandler
-  .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
-
-  .weak CAN2_TX_IRQHandler
-  .thumb_set CAN2_TX_IRQHandler,Default_Handler
-
-  .weak CAN2_RX0_IRQHandler
-  .thumb_set CAN2_RX0_IRQHandler,Default_Handler
-
-  .weak CAN2_RX1_IRQHandler
-  .thumb_set CAN2_RX1_IRQHandler,Default_Handler
-
-  .weak CAN2_SCE_IRQHandler
-  .thumb_set CAN2_SCE_IRQHandler,Default_Handler
-
-  .weak OTG_FS_IRQHandler
-  .thumb_set OTG_FS_IRQHandler ,Default_Handler
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f107xc.s

@@ -1,472 +0,0 @@
-/**
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
-  * @file      startup_stm32f107xc.s
-  * @author    MCD Application Team
-  * @brief     STM32F107xC Devices vector table for Atollic toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Configure the clock system   
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M3 processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * @attention
-  *
-  * Copyright (c) 2017-2021 STMicroelectronics.
-  * All rights reserved.
-  *
-  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m3
-  .fpu softvfp
-  .thumb
-
-.global g_pfnVectors
-.global Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word _sidata
-/* start address for the .data section. defined in linker script */
-.word _sdata
-/* end address for the .data section. defined in linker script */
-.word _edata
-/* start address for the .bss section. defined in linker script */
-.word _sbss
-/* end address for the .bss section. defined in linker script */
-.word _ebss
-
-.equ  BootRAM, 0xF1E0F85F
-/**
- * @brief  This is the code that gets called when the processor first
- *          starts execution following a reset event. Only the absolutely
- *          necessary set is performed, after which the application
- *          supplied main() routine is called.
- * @param  None
- * @retval : None
-*/
-
-  .section .text.Reset_Handler
-  .weak Reset_Handler
-  .type Reset_Handler, %function
-Reset_Handler:
-
-/* Call the clock system initialization function.*/
-    bl  SystemInit
-
-/* Copy the data segment initializers from flash to SRAM */
-  ldr r0, =_sdata
-  ldr r1, =_edata
-  ldr r2, =_sidata
-  movs r3, #0
-  b LoopCopyDataInit
-
-CopyDataInit:
-  ldr r4, [r2, r3]
-  str r4, [r0, r3]
-  adds r3, r3, #4
-
-LoopCopyDataInit:
-  adds r4, r0, r3
-  cmp r4, r1
-  bcc CopyDataInit
-  
-/* Zero fill the bss segment. */
-  ldr r2, =_sbss
-  ldr r4, =_ebss
-  movs r3, #0
-  b LoopFillZerobss
-
-FillZerobss:
-  str  r3, [r2]
-  adds r2, r2, #4
-
-LoopFillZerobss:
-  cmp r2, r4
-  bcc FillZerobss
-
-
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl main
-  bx lr
-.size Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b Infinite_Loop
-  .size Default_Handler, .-Default_Handler
-
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-  .section .isr_vector,"a",%progbits
-  .type g_pfnVectors, %object
-  .size g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-
-  .word _estack
-  .word Reset_Handler
-  .word NMI_Handler
-  .word HardFault_Handler
-  .word MemManage_Handler
-  .word BusFault_Handler
-  .word UsageFault_Handler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word SVC_Handler
-  .word DebugMon_Handler
-  .word 0
-  .word PendSV_Handler
-  .word SysTick_Handler
-  .word WWDG_IRQHandler
-  .word PVD_IRQHandler
-  .word TAMPER_IRQHandler
-  .word RTC_IRQHandler
-  .word FLASH_IRQHandler
-  .word RCC_IRQHandler
-  .word EXTI0_IRQHandler
-  .word EXTI1_IRQHandler
-  .word EXTI2_IRQHandler
-  .word EXTI3_IRQHandler
-  .word EXTI4_IRQHandler
-  .word DMA1_Channel1_IRQHandler
-  .word DMA1_Channel2_IRQHandler
-  .word DMA1_Channel3_IRQHandler
-  .word DMA1_Channel4_IRQHandler
-  .word DMA1_Channel5_IRQHandler
-  .word DMA1_Channel6_IRQHandler
-  .word DMA1_Channel7_IRQHandler
-  .word ADC1_2_IRQHandler
-  .word CAN1_TX_IRQHandler
-  .word CAN1_RX0_IRQHandler
-  .word CAN1_RX1_IRQHandler
-  .word CAN1_SCE_IRQHandler
-  .word EXTI9_5_IRQHandler
-  .word TIM1_BRK_IRQHandler
-  .word TIM1_UP_IRQHandler
-  .word TIM1_TRG_COM_IRQHandler
-  .word TIM1_CC_IRQHandler
-  .word TIM2_IRQHandler
-  .word TIM3_IRQHandler
-  .word TIM4_IRQHandler
-  .word I2C1_EV_IRQHandler
-  .word I2C1_ER_IRQHandler
-  .word I2C2_EV_IRQHandler
-  .word I2C2_ER_IRQHandler
-  .word SPI1_IRQHandler
-  .word SPI2_IRQHandler
-  .word USART1_IRQHandler
-  .word USART2_IRQHandler
-  .word USART3_IRQHandler
-  .word EXTI15_10_IRQHandler
-  .word RTC_Alarm_IRQHandler
-  .word OTG_FS_WKUP_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word TIM5_IRQHandler
-  .word SPI3_IRQHandler
-  .word UART4_IRQHandler
-  .word UART5_IRQHandler
-  .word TIM6_IRQHandler
-  .word TIM7_IRQHandler
-  .word DMA2_Channel1_IRQHandler
-  .word DMA2_Channel2_IRQHandler
-  .word DMA2_Channel3_IRQHandler
-  .word DMA2_Channel4_IRQHandler
-  .word DMA2_Channel5_IRQHandler
-  .word ETH_IRQHandler
-  .word ETH_WKUP_IRQHandler
-  .word CAN2_TX_IRQHandler
-  .word CAN2_RX0_IRQHandler
-  .word CAN2_RX1_IRQHandler
-  .word CAN2_SCE_IRQHandler
-  .word OTG_FS_IRQHandler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word BootRAM     /* @0x1E0. This is for boot in RAM mode for
-                         STM32F10x Connectivity line Devices. */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-  .weak  NMI_Handler
-  .thumb_set NMI_Handler,Default_Handler
-
-  .weak  HardFault_Handler
-  .thumb_set HardFault_Handler,Default_Handler
-
-  .weak  MemManage_Handler
-  .thumb_set MemManage_Handler,Default_Handler
-
-  .weak  BusFault_Handler
-  .thumb_set BusFault_Handler,Default_Handler
-
-  .weak  UsageFault_Handler
-  .thumb_set UsageFault_Handler,Default_Handler
-
-  .weak  SVC_Handler
-  .thumb_set SVC_Handler,Default_Handler
-
-  .weak  DebugMon_Handler
-  .thumb_set DebugMon_Handler,Default_Handler
-
-  .weak  PendSV_Handler
-  .thumb_set PendSV_Handler,Default_Handler
-
-  .weak  SysTick_Handler
-  .thumb_set SysTick_Handler,Default_Handler
-
-  .weak  WWDG_IRQHandler
-  .thumb_set WWDG_IRQHandler,Default_Handler
-
-  .weak  PVD_IRQHandler
-  .thumb_set PVD_IRQHandler,Default_Handler
-
-  .weak  TAMPER_IRQHandler
-  .thumb_set TAMPER_IRQHandler,Default_Handler
-
-  .weak  RTC_IRQHandler
-  .thumb_set RTC_IRQHandler,Default_Handler
-
-  .weak  FLASH_IRQHandler
-  .thumb_set FLASH_IRQHandler,Default_Handler
-
-  .weak  RCC_IRQHandler
-  .thumb_set RCC_IRQHandler,Default_Handler
-
-  .weak  EXTI0_IRQHandler
-  .thumb_set EXTI0_IRQHandler,Default_Handler
-
-  .weak  EXTI1_IRQHandler
-  .thumb_set EXTI1_IRQHandler,Default_Handler
-
-  .weak  EXTI2_IRQHandler
-  .thumb_set EXTI2_IRQHandler,Default_Handler
-
-  .weak  EXTI3_IRQHandler
-  .thumb_set EXTI3_IRQHandler,Default_Handler
-
-  .weak  EXTI4_IRQHandler
-  .thumb_set EXTI4_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel1_IRQHandler
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel2_IRQHandler
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel3_IRQHandler
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel4_IRQHandler
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel5_IRQHandler
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel6_IRQHandler
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel7_IRQHandler
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
-
-  .weak  ADC1_2_IRQHandler
-  .thumb_set ADC1_2_IRQHandler,Default_Handler
-
-  .weak  CAN1_TX_IRQHandler
-  .thumb_set CAN1_TX_IRQHandler,Default_Handler
-
-  .weak  CAN1_RX0_IRQHandler
-  .thumb_set CAN1_RX0_IRQHandler,Default_Handler
-
-  .weak  CAN1_RX1_IRQHandler
-  .thumb_set CAN1_RX1_IRQHandler,Default_Handler
-
-  .weak  CAN1_SCE_IRQHandler
-  .thumb_set CAN1_SCE_IRQHandler,Default_Handler
-
-  .weak  EXTI9_5_IRQHandler
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
-
-  .weak  TIM1_BRK_IRQHandler
-  .thumb_set TIM1_BRK_IRQHandler,Default_Handler
-
-  .weak  TIM1_UP_IRQHandler
-  .thumb_set TIM1_UP_IRQHandler,Default_Handler
-
-  .weak  TIM1_TRG_COM_IRQHandler
-  .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
-
-  .weak  TIM1_CC_IRQHandler
-  .thumb_set TIM1_CC_IRQHandler,Default_Handler
-
-  .weak  TIM2_IRQHandler
-  .thumb_set TIM2_IRQHandler,Default_Handler
-
-  .weak  TIM3_IRQHandler
-  .thumb_set TIM3_IRQHandler,Default_Handler
-
-  .weak  TIM4_IRQHandler
-  .thumb_set TIM4_IRQHandler,Default_Handler
-
-  .weak  I2C1_EV_IRQHandler
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
-
-  .weak  I2C1_ER_IRQHandler
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
-
-  .weak  I2C2_EV_IRQHandler
-  .thumb_set I2C2_EV_IRQHandler,Default_Handler
-
-  .weak  I2C2_ER_IRQHandler
-  .thumb_set I2C2_ER_IRQHandler,Default_Handler
-
-  .weak  SPI1_IRQHandler
-  .thumb_set SPI1_IRQHandler,Default_Handler
-
-  .weak  SPI2_IRQHandler
-  .thumb_set SPI2_IRQHandler,Default_Handler
-
-  .weak  USART1_IRQHandler
-  .thumb_set USART1_IRQHandler,Default_Handler
-
-  .weak  USART2_IRQHandler
-  .thumb_set USART2_IRQHandler,Default_Handler
-
-  .weak  USART3_IRQHandler
-  .thumb_set USART3_IRQHandler,Default_Handler
-
-  .weak  EXTI15_10_IRQHandler
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
-
-  .weak  RTC_Alarm_IRQHandler
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
-
-  .weak  OTG_FS_WKUP_IRQHandler
-  .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
-
-  .weak  TIM5_IRQHandler
-  .thumb_set TIM5_IRQHandler,Default_Handler
-
-  .weak  SPI3_IRQHandler
-  .thumb_set SPI3_IRQHandler,Default_Handler
-
-  .weak  UART4_IRQHandler
-  .thumb_set UART4_IRQHandler,Default_Handler
-
-  .weak  UART5_IRQHandler
-  .thumb_set UART5_IRQHandler,Default_Handler
-
-  .weak  TIM6_IRQHandler
-  .thumb_set TIM6_IRQHandler,Default_Handler
-
-  .weak  TIM7_IRQHandler
-  .thumb_set TIM7_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel1_IRQHandler
-  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel2_IRQHandler
-  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel3_IRQHandler
-  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel4_IRQHandler
-  .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel5_IRQHandler
-  .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
-
-  .weak  ETH_IRQHandler
-  .thumb_set ETH_IRQHandler,Default_Handler
-
-  .weak  ETH_WKUP_IRQHandler
-  .thumb_set ETH_WKUP_IRQHandler,Default_Handler
-
-  .weak  CAN2_TX_IRQHandler
-  .thumb_set CAN2_TX_IRQHandler,Default_Handler
-
-  .weak  CAN2_RX0_IRQHandler
-  .thumb_set CAN2_RX0_IRQHandler,Default_Handler
-
-  .weak  CAN2_RX1_IRQHandler
-  .thumb_set CAN2_RX1_IRQHandler,Default_Handler
-
-  .weak  CAN2_SCE_IRQHandler
-  .thumb_set CAN2_SCE_IRQHandler,Default_Handler
-
-  .weak  OTG_FS_IRQHandler
-  .thumb_set OTG_FS_IRQHandler ,Default_Handler
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xb_flash.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__     = 0x0801FFFF;
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__     = 0x20001FFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xb_sram.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
-define symbol __ICFEDIT_region_RAM_end__     = 0x20001FFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xe_flash.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__     = 0x0807FFFF;
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__     = 0x20007FFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xe_sram.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
-define symbol __ICFEDIT_region_RAM_end__     = 0x20007FFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101x6_flash.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__     = 0x08007FFF;
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__     = 0x200017FF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101x6_sram.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
-define symbol __ICFEDIT_region_RAM_end__     = 0x200017FF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xb_flash.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__     = 0x0801FFFF;
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__     = 0x20003FFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xb_sram.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
-define symbol __ICFEDIT_region_RAM_end__     = 0x20003FFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xe_flash.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__     = 0x0807FFFF;
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__     = 0x2000BFFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xe_sram.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
-define symbol __ICFEDIT_region_RAM_end__     = 0x2000BFFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xg_flash.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__     = 0x080FFFFF;
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__     = 0x20013FFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xg_sram.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
-define symbol __ICFEDIT_region_RAM_end__     = 0x20013FFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102x6_flash.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__     = 0x08007FFF;
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__     = 0x200017FF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102x6_sram.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
-define symbol __ICFEDIT_region_RAM_end__     = 0x200017FF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102xb_flash.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__     = 0x0801FFFF;
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__     = 0x20003FFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102xb_sram.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
-define symbol __ICFEDIT_region_RAM_end__     = 0x20003FFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103x6_flash.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__     = 0x08007FFF;
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__     = 0x200027FF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103x6_sram.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
-define symbol __ICFEDIT_region_RAM_end__     = 0x200027FF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xb_flash.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__     = 0x0801FFFF;
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__     = 0x20004FFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xb_sram.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
-define symbol __ICFEDIT_region_RAM_end__     = 0x20004FFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xe_flash.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__     = 0x0807FFFF;
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__     = 0x2000FFFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xe_sram.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
-define symbol __ICFEDIT_region_RAM_end__     = 0x2000FFFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xg_flash.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__     = 0x080FFFFF;
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__     = 0x20017FFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xg_sram.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
-define symbol __ICFEDIT_region_RAM_end__     = 0x20017FFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f105xc_flash.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__     = 0x0803FFFF;
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__     = 0x2000FFFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f105xc_sram.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
-define symbol __ICFEDIT_region_RAM_end__     = 0x2000FFFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f107xc_flash.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__     = 0x0803FFFF;
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__     = 0x2000FFFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f107xc_sram.icf

@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
-define symbol __ICFEDIT_region_RAM_end__     = 0x2000FFFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f100xb.s

@@ -1,393 +0,0 @@
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
-;* File Name          : startup_stm32f100xb.s
-;* Author             : MCD Application Team
-;* Description        : STM32F100xB Value Line Devices vector table 
-;*                      for EWARM toolchain.
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Configure the clock system
-;*                      - Set the initial PC == __iar_program_start,
-;*                      - Set the vector table entries with the exceptions ISR 
-;*                        address.
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;*
-;* Copyright (c) 2017-2021 STMicroelectronics.
-;* All rights reserved.
-;*
-;* This software is licensed under terms that can be found in the LICENSE file
-;* in the root directory of this software component.
-;* If no LICENSE file comes with this software, it is provided AS-IS.
-;
-;*******************************************************************************
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
-
-        MODULE  ?cstartup
-
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit        
-        PUBLIC  __vector_table
-
-        DATA
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler             ; Reset Handler
-        DCD     NMI_Handler               ; NMI Handler
-        DCD     HardFault_Handler         ; Hard Fault Handler
-        DCD     MemManage_Handler         ; MPU Fault Handler
-        DCD     BusFault_Handler          ; Bus Fault Handler
-        DCD     UsageFault_Handler        ; Usage Fault Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler               ; SVCall Handler
-        DCD     DebugMon_Handler          ; Debug Monitor Handler
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler            ; PendSV Handler
-        DCD     SysTick_Handler           ; SysTick Handler
-
-         ; External Interrupts
-        DCD     WWDG_IRQHandler               ; Window Watchdog
-        DCD     PVD_IRQHandler                ; PVD through EXTI Line detect
-        DCD     TAMPER_IRQHandler             ; Tamper
-        DCD     RTC_IRQHandler                ; RTC
-        DCD     FLASH_IRQHandler              ; Flash
-        DCD     RCC_IRQHandler                ; RCC
-        DCD     EXTI0_IRQHandler              ; EXTI Line 0
-        DCD     EXTI1_IRQHandler              ; EXTI Line 1
-        DCD     EXTI2_IRQHandler              ; EXTI Line 2
-        DCD     EXTI3_IRQHandler              ; EXTI Line 3
-        DCD     EXTI4_IRQHandler              ; EXTI Line 4
-        DCD     DMA1_Channel1_IRQHandler      ; DMA1 Channel 1
-        DCD     DMA1_Channel2_IRQHandler      ; DMA1 Channel 2
-        DCD     DMA1_Channel3_IRQHandler      ; DMA1 Channel 3
-        DCD     DMA1_Channel4_IRQHandler      ; DMA1 Channel 4
-        DCD     DMA1_Channel5_IRQHandler      ; DMA1 Channel 5
-        DCD     DMA1_Channel6_IRQHandler      ; DMA1 Channel 6
-        DCD     DMA1_Channel7_IRQHandler      ; DMA1 Channel 7
-        DCD     ADC1_IRQHandler               ; ADC1
-        DCD     0                             ; Reserved
-        DCD     0                             ; Reserved
-        DCD     0                             ; Reserved
-        DCD     0                             ; Reserved
-        DCD     EXTI9_5_IRQHandler            ; EXTI Line 9..5
-        DCD     TIM1_BRK_TIM15_IRQHandler     ; TIM1 Break and TIM15
-        DCD     TIM1_UP_TIM16_IRQHandler      ; TIM1 Update and TIM16
-        DCD     TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17
-        DCD     TIM1_CC_IRQHandler            ; TIM1 Capture Compare
-        DCD     TIM2_IRQHandler               ; TIM2
-        DCD     TIM3_IRQHandler               ; TIM3
-        DCD     TIM4_IRQHandler               ; TIM4
-        DCD     I2C1_EV_IRQHandler            ; I2C1 Event
-        DCD     I2C1_ER_IRQHandler            ; I2C1 Error
-        DCD     I2C2_EV_IRQHandler            ; I2C2 Event
-        DCD     I2C2_ER_IRQHandler            ; I2C2 Error
-        DCD     SPI1_IRQHandler               ; SPI1
-        DCD     SPI2_IRQHandler               ; SPI2
-        DCD     USART1_IRQHandler             ; USART1
-        DCD     USART2_IRQHandler             ; USART2
-        DCD     USART3_IRQHandler             ; USART3
-        DCD     EXTI15_10_IRQHandler          ; EXTI Line 15..10
-        DCD     RTC_Alarm_IRQHandler           ; RTC Alarm through EXTI Line
-        DCD     CEC_IRQHandler                ; HDMI-CEC
-        DCD     0                             ; Reserved
-        DCD     0                             ; Reserved
-        DCD     0                             ; Reserved
-        DCD     0                             ; Reserved
-        DCD     0                             ; Reserved
-        DCD     0                             ; Reserved
-        DCD     0                             ; Reserved
-        DCD     0                             ; Reserved
-        DCD     0                             ; Reserved
-        DCD     0                             ; Reserved
-        DCD     0                             ; Reserved                        
-        DCD     TIM6_DAC_IRQHandler           ; TIM6 and DAC underrun
-        DCD     TIM7_IRQHandler               ; TIM7                
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
-        THUMB
-
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:REORDER:NOROOT(2)
-Reset_Handler
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-        
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-NMI_Handler
-        B NMI_Handler
-
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-HardFault_Handler
-        B HardFault_Handler
-
-        PUBWEAK MemManage_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-MemManage_Handler
-        B MemManage_Handler
-
-        PUBWEAK BusFault_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-BusFault_Handler
-        B BusFault_Handler
-
-        PUBWEAK UsageFault_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-UsageFault_Handler
-        B UsageFault_Handler
-
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SVC_Handler
-        B SVC_Handler
-
-        PUBWEAK DebugMon_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DebugMon_Handler
-        B DebugMon_Handler
-
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-PendSV_Handler
-        B PendSV_Handler
-
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SysTick_Handler
-        B SysTick_Handler
-
-        PUBWEAK WWDG_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-WWDG_IRQHandler
-        B WWDG_IRQHandler
-
-        PUBWEAK PVD_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-PVD_IRQHandler
-        B PVD_IRQHandler
-
-        PUBWEAK TAMPER_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TAMPER_IRQHandler
-        B TAMPER_IRQHandler
-
-        PUBWEAK RTC_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-RTC_IRQHandler
-        B RTC_IRQHandler
-
-        PUBWEAK FLASH_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-FLASH_IRQHandler
-        B FLASH_IRQHandler
-
-        PUBWEAK RCC_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-RCC_IRQHandler
-        B RCC_IRQHandler
-
-        PUBWEAK EXTI0_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI0_IRQHandler
-        B EXTI0_IRQHandler
-
-        PUBWEAK EXTI1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI1_IRQHandler
-        B EXTI1_IRQHandler
-
-        PUBWEAK EXTI2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI2_IRQHandler
-        B EXTI2_IRQHandler
-
-        PUBWEAK EXTI3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI3_IRQHandler
-        B EXTI3_IRQHandler
-
-        PUBWEAK EXTI4_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI4_IRQHandler
-        B EXTI4_IRQHandler
-
-        PUBWEAK DMA1_Channel1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel1_IRQHandler
-        B DMA1_Channel1_IRQHandler
-
-        PUBWEAK DMA1_Channel2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel2_IRQHandler
-        B DMA1_Channel2_IRQHandler
-
-        PUBWEAK DMA1_Channel3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel3_IRQHandler
-        B DMA1_Channel3_IRQHandler
-
-        PUBWEAK DMA1_Channel4_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel4_IRQHandler
-        B DMA1_Channel4_IRQHandler
-
-        PUBWEAK DMA1_Channel5_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel5_IRQHandler
-        B DMA1_Channel5_IRQHandler
-
-        PUBWEAK DMA1_Channel6_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel6_IRQHandler
-        B DMA1_Channel6_IRQHandler
-
-        PUBWEAK DMA1_Channel7_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel7_IRQHandler
-        B DMA1_Channel7_IRQHandler
-
-        PUBWEAK ADC1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-ADC1_IRQHandler
-        B ADC1_IRQHandler
-
-        PUBWEAK EXTI9_5_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI9_5_IRQHandler
-        B EXTI9_5_IRQHandler
-
-        PUBWEAK TIM1_BRK_TIM15_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM1_BRK_TIM15_IRQHandler
-        B TIM1_BRK_TIM15_IRQHandler
-
-        PUBWEAK TIM1_UP_TIM16_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM1_UP_TIM16_IRQHandler
-        B TIM1_UP_TIM16_IRQHandler
-
-        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM1_TRG_COM_TIM17_IRQHandler
-        B TIM1_TRG_COM_TIM17_IRQHandler
-
-        PUBWEAK TIM1_CC_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM1_CC_IRQHandler
-        B TIM1_CC_IRQHandler
-
-        PUBWEAK TIM2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM2_IRQHandler
-        B TIM2_IRQHandler
-
-        PUBWEAK TIM3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM3_IRQHandler
-        B TIM3_IRQHandler
-
-        PUBWEAK TIM4_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM4_IRQHandler
-        B TIM4_IRQHandler
-
-        PUBWEAK I2C1_EV_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-I2C1_EV_IRQHandler
-        B I2C1_EV_IRQHandler
-
-        PUBWEAK I2C1_ER_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-I2C1_ER_IRQHandler
-        B I2C1_ER_IRQHandler
-
-        PUBWEAK I2C2_EV_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-I2C2_EV_IRQHandler
-        B I2C2_EV_IRQHandler
-
-        PUBWEAK I2C2_ER_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-I2C2_ER_IRQHandler
-        B I2C2_ER_IRQHandler
-
-        PUBWEAK SPI1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SPI1_IRQHandler
-        B SPI1_IRQHandler
-
-        PUBWEAK SPI2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SPI2_IRQHandler
-        B SPI2_IRQHandler
-
-        PUBWEAK USART1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-USART1_IRQHandler
-        B USART1_IRQHandler
-
-        PUBWEAK USART2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-USART2_IRQHandler
-        B USART2_IRQHandler
-
-        PUBWEAK USART3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-USART3_IRQHandler
-        B USART3_IRQHandler
-
-        PUBWEAK EXTI15_10_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI15_10_IRQHandler
-        B EXTI15_10_IRQHandler
-
-        PUBWEAK RTC_Alarm_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-RTC_Alarm_IRQHandler
-        B RTC_Alarm_IRQHandler
-
-        PUBWEAK CEC_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-CEC_IRQHandler
-        B CEC_IRQHandler
-
-        PUBWEAK TIM6_DAC_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM6_DAC_IRQHandler
-        B TIM6_DAC_IRQHandler
-
-        PUBWEAK TIM7_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM7_IRQHandler
-        B TIM7_IRQHandler                
-
-        END

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f100xe.s

@@ -1,459 +0,0 @@
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
-;* File Name          : startup_stm32f100xe.s
-;* Author             : MCD Application Team
-;* Description        : STM32F100xE Value Line Devices vector table 
-;*                      for EWARM toolchain.
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == __iar_program_start,
-;*                      - Set the vector table entries with the exceptions ISR 
-;*                        address.
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;*
-;* Copyright (c) 2017-2021 STMicroelectronics.
-;* All rights reserved.
-;*
-;* This software is licensed under terms that can be found in the LICENSE file
-;* in the root directory of this software component.
-;* If no LICENSE file comes with this software, it is provided AS-IS.
-;
-;*******************************************************************************
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
-
-        MODULE  ?cstartup
-
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit        
-        PUBLIC  __vector_table
-
-        DATA
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler             ; Reset Handler
-        DCD     NMI_Handler               ; NMI Handler
-        DCD     HardFault_Handler         ; Hard Fault Handler
-        DCD     MemManage_Handler         ; MPU Fault Handler
-        DCD     BusFault_Handler          ; Bus Fault Handler
-        DCD     UsageFault_Handler        ; Usage Fault Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler               ; SVCall Handler
-        DCD     DebugMon_Handler          ; Debug Monitor Handler
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler            ; PendSV Handler
-        DCD     SysTick_Handler           ; SysTick Handler
-
-         ; External Interrupts
-        DCD     WWDG_IRQHandler               ; Window Watchdog
-        DCD     PVD_IRQHandler                ; PVD through EXTI Line detect
-        DCD     TAMPER_IRQHandler             ; Tamper
-        DCD     RTC_IRQHandler                ; RTC
-        DCD     FLASH_IRQHandler              ; Flash
-        DCD     RCC_IRQHandler                ; RCC
-        DCD     EXTI0_IRQHandler              ; EXTI Line 0
-        DCD     EXTI1_IRQHandler              ; EXTI Line 1
-        DCD     EXTI2_IRQHandler              ; EXTI Line 2
-        DCD     EXTI3_IRQHandler              ; EXTI Line 3
-        DCD     EXTI4_IRQHandler              ; EXTI Line 4
-        DCD     DMA1_Channel1_IRQHandler      ; DMA1 Channel 1
-        DCD     DMA1_Channel2_IRQHandler      ; DMA1 Channel 2
-        DCD     DMA1_Channel3_IRQHandler      ; DMA1 Channel 3
-        DCD     DMA1_Channel4_IRQHandler      ; DMA1 Channel 4
-        DCD     DMA1_Channel5_IRQHandler      ; DMA1 Channel 5
-        DCD     DMA1_Channel6_IRQHandler      ; DMA1 Channel 6
-        DCD     DMA1_Channel7_IRQHandler      ; DMA1 Channel 7
-        DCD     ADC1_IRQHandler               ; ADC1
-        DCD     0                             ; Reserved
-        DCD     0                             ; Reserved
-        DCD     0                             ; Reserved
-        DCD     0                             ; Reserved
-        DCD     EXTI9_5_IRQHandler            ; EXTI Line 9..5
-        DCD     TIM1_BRK_TIM15_IRQHandler     ; TIM1 Break and TIM15
-        DCD     TIM1_UP_TIM16_IRQHandler      ; TIM1 Update and TIM16
-        DCD     TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17
-        DCD     TIM1_CC_IRQHandler            ; TIM1 Capture Compare
-        DCD     TIM2_IRQHandler               ; TIM2
-        DCD     TIM3_IRQHandler               ; TIM3
-        DCD     TIM4_IRQHandler               ; TIM4
-        DCD     I2C1_EV_IRQHandler            ; I2C1 Event
-        DCD     I2C1_ER_IRQHandler            ; I2C1 Error
-        DCD     I2C2_EV_IRQHandler            ; I2C2 Event
-        DCD     I2C2_ER_IRQHandler            ; I2C2 Error
-        DCD     SPI1_IRQHandler               ; SPI1
-        DCD     SPI2_IRQHandler               ; SPI2
-        DCD     USART1_IRQHandler             ; USART1
-        DCD     USART2_IRQHandler             ; USART2
-        DCD     USART3_IRQHandler             ; USART3
-        DCD     EXTI15_10_IRQHandler          ; EXTI Line 15..10
-        DCD     RTC_Alarm_IRQHandler          ; RTC Alarm through EXTI Line
-        DCD     CEC_IRQHandler                ; HDMI CEC
-        DCD     TIM12_IRQHandler              ; TIM12
-        DCD     TIM13_IRQHandler              ; TIM13
-        DCD     TIM14_IRQHandler              ; TIM14
-        DCD     0                             ; Reserved
-        DCD     0                             ; Reserved
-        DCD     0                             ; Reserved
-        DCD     0                             ; Reserved
-        DCD     TIM5_IRQHandler               ; TIM5
-        DCD     SPI3_IRQHandler               ; SPI3
-        DCD     UART4_IRQHandler              ; UART4
-        DCD     UART5_IRQHandler              ; UART5                       
-        DCD     TIM6_DAC_IRQHandler           ; TIM6 and DAC underrun
-        DCD     TIM7_IRQHandler               ; TIM7     
-        DCD     DMA2_Channel1_IRQHandler      ; DMA2 Channel1
-        DCD     DMA2_Channel2_IRQHandler      ; DMA2 Channel2
-        DCD     DMA2_Channel3_IRQHandler      ; DMA2 Channel3
-        DCD     DMA2_Channel4_5_IRQHandler    ; DMA2 Channel4 & Channel5 if MISC_REMAP is not set 
-                                              ; or DMA2 Channel4 if MISC_REMAP is set
-        DCD     DMA2_Channel5_IRQHandler      ; DMA2 Channel5 if MISC_REMAP is set
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
-        THUMB
-
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:REORDER:NOROOT(2)
-Reset_Handler
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-        
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-NMI_Handler
-        B NMI_Handler
-
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-HardFault_Handler
-        B HardFault_Handler
-
-        PUBWEAK MemManage_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-MemManage_Handler
-        B MemManage_Handler
-
-        PUBWEAK BusFault_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-BusFault_Handler
-        B BusFault_Handler
-
-        PUBWEAK UsageFault_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-UsageFault_Handler
-        B UsageFault_Handler
-
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SVC_Handler
-        B SVC_Handler
-
-        PUBWEAK DebugMon_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DebugMon_Handler
-        B DebugMon_Handler
-
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-PendSV_Handler
-        B PendSV_Handler
-
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SysTick_Handler
-        B SysTick_Handler
-
-        PUBWEAK WWDG_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-WWDG_IRQHandler
-        B WWDG_IRQHandler
-
-        PUBWEAK PVD_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-PVD_IRQHandler
-        B PVD_IRQHandler
-
-        PUBWEAK TAMPER_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TAMPER_IRQHandler
-        B TAMPER_IRQHandler
-
-        PUBWEAK RTC_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-RTC_IRQHandler
-        B RTC_IRQHandler
-
-        PUBWEAK FLASH_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-FLASH_IRQHandler
-        B FLASH_IRQHandler
-
-        PUBWEAK RCC_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-RCC_IRQHandler
-        B RCC_IRQHandler
-
-        PUBWEAK EXTI0_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI0_IRQHandler
-        B EXTI0_IRQHandler
-
-        PUBWEAK EXTI1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI1_IRQHandler
-        B EXTI1_IRQHandler
-
-        PUBWEAK EXTI2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI2_IRQHandler
-        B EXTI2_IRQHandler
-
-        PUBWEAK EXTI3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI3_IRQHandler
-        B EXTI3_IRQHandler
-
-        PUBWEAK EXTI4_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI4_IRQHandler
-        B EXTI4_IRQHandler
-
-        PUBWEAK DMA1_Channel1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel1_IRQHandler
-        B DMA1_Channel1_IRQHandler
-
-        PUBWEAK DMA1_Channel2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel2_IRQHandler
-        B DMA1_Channel2_IRQHandler
-
-        PUBWEAK DMA1_Channel3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel3_IRQHandler
-        B DMA1_Channel3_IRQHandler
-
-        PUBWEAK DMA1_Channel4_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel4_IRQHandler
-        B DMA1_Channel4_IRQHandler
-
-        PUBWEAK DMA1_Channel5_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel5_IRQHandler
-        B DMA1_Channel5_IRQHandler
-
-        PUBWEAK DMA1_Channel6_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel6_IRQHandler
-        B DMA1_Channel6_IRQHandler
-
-        PUBWEAK DMA1_Channel7_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel7_IRQHandler
-        B DMA1_Channel7_IRQHandler
-
-        PUBWEAK ADC1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-ADC1_IRQHandler
-        B ADC1_IRQHandler
-
-        PUBWEAK EXTI9_5_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI9_5_IRQHandler
-        B EXTI9_5_IRQHandler
-
-        PUBWEAK TIM1_BRK_TIM15_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM1_BRK_TIM15_IRQHandler
-        B TIM1_BRK_TIM15_IRQHandler
-
-        PUBWEAK TIM1_UP_TIM16_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM1_UP_TIM16_IRQHandler
-        B TIM1_UP_TIM16_IRQHandler
-
-        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM1_TRG_COM_TIM17_IRQHandler
-        B TIM1_TRG_COM_TIM17_IRQHandler
-
-        PUBWEAK TIM1_CC_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM1_CC_IRQHandler
-        B TIM1_CC_IRQHandler
-
-        PUBWEAK TIM2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM2_IRQHandler
-        B TIM2_IRQHandler
-
-        PUBWEAK TIM3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM3_IRQHandler
-        B TIM3_IRQHandler
-
-        PUBWEAK TIM4_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM4_IRQHandler
-        B TIM4_IRQHandler
-
-        PUBWEAK I2C1_EV_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-I2C1_EV_IRQHandler
-        B I2C1_EV_IRQHandler
-
-        PUBWEAK I2C1_ER_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-I2C1_ER_IRQHandler
-        B I2C1_ER_IRQHandler
-
-        PUBWEAK I2C2_EV_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-I2C2_EV_IRQHandler
-        B I2C2_EV_IRQHandler
-
-        PUBWEAK I2C2_ER_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-I2C2_ER_IRQHandler
-        B I2C2_ER_IRQHandler
-
-        PUBWEAK SPI1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SPI1_IRQHandler
-        B SPI1_IRQHandler
-
-        PUBWEAK SPI2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SPI2_IRQHandler
-        B SPI2_IRQHandler
-
-        PUBWEAK USART1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-USART1_IRQHandler
-        B USART1_IRQHandler
-
-        PUBWEAK USART2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-USART2_IRQHandler
-        B USART2_IRQHandler
-
-        PUBWEAK USART3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-USART3_IRQHandler
-        B USART3_IRQHandler
-
-        PUBWEAK EXTI15_10_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI15_10_IRQHandler
-        B EXTI15_10_IRQHandler
-
-        PUBWEAK RTC_Alarm_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-RTC_Alarm_IRQHandler
-        B RTC_Alarm_IRQHandler
-
-        
-        PUBWEAK CEC_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-CEC_IRQHandler
-        B CEC_IRQHandler
-
-        PUBWEAK TIM12_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM12_IRQHandler
-        B TIM12_IRQHandler
-
-        PUBWEAK TIM13_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM13_IRQHandler
-        B TIM13_IRQHandler
-
-        PUBWEAK TIM14_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM14_IRQHandler
-        B TIM14_IRQHandler
-
-        PUBWEAK TIM5_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM5_IRQHandler
-        B TIM5_IRQHandler
-
-        PUBWEAK SPI3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SPI3_IRQHandler
-        B SPI3_IRQHandler
-
-        PUBWEAK UART4_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-UART4_IRQHandler
-        B UART4_IRQHandler
-
-        PUBWEAK UART5_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-UART5_IRQHandler
-        B UART5_IRQHandler
-        
-        PUBWEAK TIM6_DAC_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM6_DAC_IRQHandler
-        B TIM6_DAC_IRQHandler
-
-        PUBWEAK TIM7_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM7_IRQHandler
-        B TIM7_IRQHandler                
-
-        PUBWEAK DMA2_Channel1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA2_Channel1_IRQHandler
-        B DMA2_Channel1_IRQHandler
-
-        PUBWEAK DMA2_Channel2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA2_Channel2_IRQHandler
-        B DMA2_Channel2_IRQHandler
-
-        PUBWEAK DMA2_Channel3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA2_Channel3_IRQHandler
-        B DMA2_Channel3_IRQHandler
-
-        PUBWEAK DMA2_Channel4_5_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA2_Channel4_5_IRQHandler
-        B DMA2_Channel4_5_IRQHandler
-
-        PUBWEAK DMA2_Channel5_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA2_Channel5_IRQHandler
-        B DMA2_Channel5_IRQHandler
-                
-        END

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f101x6.s

@@ -1,320 +0,0 @@
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
-;* File Name          : startup_stm32f101x6.s
-;* Author             : MCD Application Team
-;* Description        : STM32F101x6 Access Line Devices vector table for EWARM
-;*                      toolchain.
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Configure the clock system
-;*                      - Set the initial PC == __iar_program_start,
-;*                      - Set the vector table entries with the exceptions ISR 
-;*                        address.
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;*
-;* Copyright (c) 2017-2021 STMicroelectronics.
-;* All rights reserved.
-;*
-;* This software is licensed under terms that can be found in the LICENSE file
-;* in the root directory of this software component.
-;* If no LICENSE file comes with this software, it is provided AS-IS.
-;
-;*******************************************************************************
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
-
-        MODULE  ?cstartup
-
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit        
-        PUBLIC  __vector_table
-
-        DATA
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler             ; Reset Handler
-        DCD     NMI_Handler               ; NMI Handler
-        DCD     HardFault_Handler         ; Hard Fault Handler
-        DCD     MemManage_Handler         ; MPU Fault Handler
-        DCD     BusFault_Handler          ; Bus Fault Handler
-        DCD     UsageFault_Handler        ; Usage Fault Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler               ; SVCall Handler
-        DCD     DebugMon_Handler          ; Debug Monitor Handler
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler            ; PendSV Handler
-        DCD     SysTick_Handler           ; SysTick Handler
-
-         ; External Interrupts
-        DCD     WWDG_IRQHandler           ; Window Watchdog
-        DCD     PVD_IRQHandler            ; PVD through EXTI Line detect
-        DCD     TAMPER_IRQHandler         ; Tamper
-        DCD     RTC_IRQHandler            ; RTC
-        DCD     FLASH_IRQHandler          ; Flash
-        DCD     RCC_IRQHandler            ; RCC
-        DCD     EXTI0_IRQHandler          ; EXTI Line 0
-        DCD     EXTI1_IRQHandler          ; EXTI Line 1
-        DCD     EXTI2_IRQHandler          ; EXTI Line 2
-        DCD     EXTI3_IRQHandler          ; EXTI Line 3
-        DCD     EXTI4_IRQHandler          ; EXTI Line 4
-        DCD     DMA1_Channel1_IRQHandler  ; DMA1 Channel 1
-        DCD     DMA1_Channel2_IRQHandler  ; DMA1 Channel 2
-        DCD     DMA1_Channel3_IRQHandler  ; DMA1 Channel 3
-        DCD     DMA1_Channel4_IRQHandler  ; DMA1 Channel 4
-        DCD     DMA1_Channel5_IRQHandler  ; DMA1 Channel 5
-        DCD     DMA1_Channel6_IRQHandler  ; DMA1 Channel 6
-        DCD     DMA1_Channel7_IRQHandler  ; DMA1 Channel 7
-        DCD     ADC1_IRQHandler         ; ADC1
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     EXTI9_5_IRQHandler        ; EXTI Line 9..5
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     TIM2_IRQHandler           ; TIM2
-        DCD     TIM3_IRQHandler           ; TIM3
-        DCD     0                         ; Reserved
-        DCD     I2C1_EV_IRQHandler        ; I2C1 Event
-        DCD     I2C1_ER_IRQHandler        ; I2C1 Error
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SPI1_IRQHandler           ; SPI1
-        DCD     0                         ; Reserved
-        DCD     USART1_IRQHandler         ; USART1
-        DCD     USART2_IRQHandler         ; USART2
-        DCD     0                         ; Reserved
-        DCD     EXTI15_10_IRQHandler      ; EXTI Line 15..10
-        DCD     RTC_Alarm_IRQHandler       ; RTC Alarm through EXTI Line
-        DCD     0                         ; Reserved
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
-        THUMB
-
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:REORDER:NOROOT(2)
-Reset_Handler
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-        
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-NMI_Handler
-        B NMI_Handler
-        
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-HardFault_Handler
-        B HardFault_Handler
-        
-        PUBWEAK MemManage_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-MemManage_Handler
-        B MemManage_Handler
-        
-        PUBWEAK BusFault_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-BusFault_Handler
-        B BusFault_Handler
-        
-        PUBWEAK UsageFault_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-UsageFault_Handler
-        B UsageFault_Handler
-        
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SVC_Handler
-        B SVC_Handler
-        
-        PUBWEAK DebugMon_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DebugMon_Handler
-        B DebugMon_Handler
-        
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-PendSV_Handler
-        B PendSV_Handler
-        
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SysTick_Handler
-        B SysTick_Handler
-        
-        PUBWEAK WWDG_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-WWDG_IRQHandler
-        B WWDG_IRQHandler
-        
-        PUBWEAK PVD_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-PVD_IRQHandler
-        B PVD_IRQHandler
-        
-        PUBWEAK TAMPER_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TAMPER_IRQHandler
-        B TAMPER_IRQHandler
-        
-        PUBWEAK RTC_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-RTC_IRQHandler
-        B RTC_IRQHandler
-        
-        PUBWEAK FLASH_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-FLASH_IRQHandler
-        B FLASH_IRQHandler
-        
-        PUBWEAK RCC_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-RCC_IRQHandler
-        B RCC_IRQHandler
-        
-        PUBWEAK EXTI0_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI0_IRQHandler
-        B EXTI0_IRQHandler
-        
-        PUBWEAK EXTI1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI1_IRQHandler
-        B EXTI1_IRQHandler
-        
-        PUBWEAK EXTI2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI2_IRQHandler
-        B EXTI2_IRQHandler
-        
-        PUBWEAK EXTI3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI3_IRQHandler
-        B EXTI3_IRQHandler
-        
-        PUBWEAK EXTI4_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI4_IRQHandler
-        B EXTI4_IRQHandler
-        
-        PUBWEAK DMA1_Channel1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel1_IRQHandler
-        B DMA1_Channel1_IRQHandler
-        
-        PUBWEAK DMA1_Channel2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel2_IRQHandler
-        B DMA1_Channel2_IRQHandler
-        
-        PUBWEAK DMA1_Channel3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel3_IRQHandler
-        B DMA1_Channel3_IRQHandler
-        
-        PUBWEAK DMA1_Channel4_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel4_IRQHandler
-        B DMA1_Channel4_IRQHandler
-        
-        PUBWEAK DMA1_Channel5_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel5_IRQHandler
-        B DMA1_Channel5_IRQHandler
-        
-        PUBWEAK DMA1_Channel6_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel6_IRQHandler
-        B DMA1_Channel6_IRQHandler
-        
-        PUBWEAK DMA1_Channel7_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel7_IRQHandler
-        B DMA1_Channel7_IRQHandler
-        
-        PUBWEAK ADC1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-ADC1_IRQHandler
-        B ADC1_IRQHandler
-        
-        PUBWEAK EXTI9_5_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI9_5_IRQHandler
-        B EXTI9_5_IRQHandler  
-        
-        PUBWEAK TIM2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM2_IRQHandler
-        B TIM2_IRQHandler
-        
-        PUBWEAK TIM3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM3_IRQHandler
-        B TIM3_IRQHandler
-        
-        PUBWEAK I2C1_EV_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-I2C1_EV_IRQHandler
-        B I2C1_EV_IRQHandler
-        
-        PUBWEAK I2C1_ER_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-I2C1_ER_IRQHandler
-        B I2C1_ER_IRQHandler
-        
-        PUBWEAK SPI1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SPI1_IRQHandler
-        B SPI1_IRQHandler
-                      
-        PUBWEAK USART1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-USART1_IRQHandler
-        B USART1_IRQHandler
-
-        PUBWEAK USART2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-USART2_IRQHandler
-        B USART2_IRQHandler
-
-        PUBWEAK EXTI15_10_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI15_10_IRQHandler
-        B EXTI15_10_IRQHandler
-
-        PUBWEAK RTC_Alarm_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-RTC_Alarm_IRQHandler
-        B RTC_Alarm_IRQHandler
-
-        END

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f101xb.s

@@ -1,345 +0,0 @@
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
-;* File Name          : startup_stm32f101xb.s
-;* Author             : MCD Application Team
-;* Description        : STM32F101xB Access Line Devices vector table for 
-;*                      EWARM toolchain.
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Configure the clock system
-;*                      - Set the initial PC == __iar_program_start,
-;*                      - Set the vector table entries with the exceptions ISR 
-;*                        address.
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;*
-;* Copyright (c) 2017-2021 STMicroelectronics.
-;* All rights reserved.
-;*
-;* This software is licensed under terms that can be found in the LICENSE file
-;* in the root directory of this software component.
-;* If no LICENSE file comes with this software, it is provided AS-IS.
-;
-;*******************************************************************************
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
-
-        MODULE  ?cstartup
-
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit        
-        PUBLIC  __vector_table
-
-        DATA
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler             ; Reset Handler
-        DCD     NMI_Handler               ; NMI Handler
-        DCD     HardFault_Handler         ; Hard Fault Handler
-        DCD     MemManage_Handler         ; MPU Fault Handler
-        DCD     BusFault_Handler          ; Bus Fault Handler
-        DCD     UsageFault_Handler        ; Usage Fault Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler               ; SVCall Handler
-        DCD     DebugMon_Handler          ; Debug Monitor Handler
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler            ; PendSV Handler
-        DCD     SysTick_Handler           ; SysTick Handler
-
-         ; External Interrupts
-        DCD     WWDG_IRQHandler           ; Window Watchdog
-        DCD     PVD_IRQHandler            ; PVD through EXTI Line detect
-        DCD     TAMPER_IRQHandler         ; Tamper
-        DCD     RTC_IRQHandler            ; RTC
-        DCD     FLASH_IRQHandler          ; Flash
-        DCD     RCC_IRQHandler            ; RCC
-        DCD     EXTI0_IRQHandler          ; EXTI Line 0
-        DCD     EXTI1_IRQHandler          ; EXTI Line 1
-        DCD     EXTI2_IRQHandler          ; EXTI Line 2
-        DCD     EXTI3_IRQHandler          ; EXTI Line 3
-        DCD     EXTI4_IRQHandler          ; EXTI Line 4
-        DCD     DMA1_Channel1_IRQHandler  ; DMA1 Channel 1
-        DCD     DMA1_Channel2_IRQHandler  ; DMA1 Channel 2
-        DCD     DMA1_Channel3_IRQHandler  ; DMA1 Channel 3
-        DCD     DMA1_Channel4_IRQHandler  ; DMA1 Channel 4
-        DCD     DMA1_Channel5_IRQHandler  ; DMA1 Channel 5
-        DCD     DMA1_Channel6_IRQHandler  ; DMA1 Channel 6
-        DCD     DMA1_Channel7_IRQHandler  ; DMA1 Channel 7
-        DCD     ADC1_IRQHandler         ; ADC1
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     EXTI9_5_IRQHandler        ; EXTI Line 9..5
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     TIM2_IRQHandler           ; TIM2
-        DCD     TIM3_IRQHandler           ; TIM3
-        DCD     TIM4_IRQHandler           ; TIM4
-        DCD     I2C1_EV_IRQHandler        ; I2C1 Event
-        DCD     I2C1_ER_IRQHandler        ; I2C1 Error
-        DCD     I2C2_EV_IRQHandler        ; I2C2 Event
-        DCD     I2C2_ER_IRQHandler        ; I2C2 Error
-        DCD     SPI1_IRQHandler           ; SPI1
-        DCD     SPI2_IRQHandler           ; SPI2
-        DCD     USART1_IRQHandler         ; USART1
-        DCD     USART2_IRQHandler         ; USART2
-        DCD     USART3_IRQHandler         ; USART3
-        DCD     EXTI15_10_IRQHandler      ; EXTI Line 15..10
-        DCD     RTC_Alarm_IRQHandler       ; RTC Alarm through EXTI Line
-        DCD     0                         ; Reserved
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
-        THUMB
-
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:REORDER:NOROOT(2)
-Reset_Handler
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-        
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-NMI_Handler
-        B NMI_Handler
-
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-HardFault_Handler
-        B HardFault_Handler
-
-        PUBWEAK MemManage_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-MemManage_Handler
-        B MemManage_Handler
-
-        PUBWEAK BusFault_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-BusFault_Handler
-        B BusFault_Handler
-
-        PUBWEAK UsageFault_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-UsageFault_Handler
-        B UsageFault_Handler
-
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SVC_Handler
-        B SVC_Handler
-
-        PUBWEAK DebugMon_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DebugMon_Handler
-        B DebugMon_Handler
-
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-PendSV_Handler
-        B PendSV_Handler
-
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SysTick_Handler
-        B SysTick_Handler
-
-        PUBWEAK WWDG_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-WWDG_IRQHandler
-        B WWDG_IRQHandler
-
-        PUBWEAK PVD_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-PVD_IRQHandler
-        B PVD_IRQHandler
-
-        PUBWEAK TAMPER_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TAMPER_IRQHandler
-        B TAMPER_IRQHandler
-
-        PUBWEAK RTC_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-RTC_IRQHandler
-        B RTC_IRQHandler
-
-        PUBWEAK FLASH_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-FLASH_IRQHandler
-        B FLASH_IRQHandler
-
-        PUBWEAK RCC_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-RCC_IRQHandler
-        B RCC_IRQHandler
-
-        PUBWEAK EXTI0_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI0_IRQHandler
-        B EXTI0_IRQHandler
-
-        PUBWEAK EXTI1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI1_IRQHandler
-        B EXTI1_IRQHandler
-
-        PUBWEAK EXTI2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI2_IRQHandler
-        B EXTI2_IRQHandler
-
-        PUBWEAK EXTI3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI3_IRQHandler
-        B EXTI3_IRQHandler
-
-        PUBWEAK EXTI4_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI4_IRQHandler
-        B EXTI4_IRQHandler
-
-        PUBWEAK DMA1_Channel1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel1_IRQHandler
-        B DMA1_Channel1_IRQHandler
-
-        PUBWEAK DMA1_Channel2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel2_IRQHandler
-        B DMA1_Channel2_IRQHandler
-
-        PUBWEAK DMA1_Channel3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel3_IRQHandler
-        B DMA1_Channel3_IRQHandler
-
-        PUBWEAK DMA1_Channel4_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel4_IRQHandler
-        B DMA1_Channel4_IRQHandler
-
-        PUBWEAK DMA1_Channel5_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel5_IRQHandler
-        B DMA1_Channel5_IRQHandler
-
-        PUBWEAK DMA1_Channel6_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel6_IRQHandler
-        B DMA1_Channel6_IRQHandler
-
-        PUBWEAK DMA1_Channel7_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel7_IRQHandler
-        B DMA1_Channel7_IRQHandler
-
-        PUBWEAK ADC1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-ADC1_IRQHandler
-        B ADC1_IRQHandler
-
-        PUBWEAK EXTI9_5_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI9_5_IRQHandler
-        B EXTI9_5_IRQHandler
-
-        PUBWEAK TIM2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM2_IRQHandler
-        B TIM2_IRQHandler
-
-        PUBWEAK TIM3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM3_IRQHandler
-        B TIM3_IRQHandler
-
-        PUBWEAK TIM4_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM4_IRQHandler
-        B TIM4_IRQHandler
-
-        PUBWEAK I2C1_EV_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-I2C1_EV_IRQHandler
-        B I2C1_EV_IRQHandler
-
-        PUBWEAK I2C1_ER_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-I2C1_ER_IRQHandler
-        B I2C1_ER_IRQHandler
-
-        PUBWEAK I2C2_EV_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-I2C2_EV_IRQHandler
-        B I2C2_EV_IRQHandler
-
-        PUBWEAK I2C2_ER_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-I2C2_ER_IRQHandler
-        B I2C2_ER_IRQHandler
-
-        PUBWEAK SPI1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SPI1_IRQHandler
-        B SPI1_IRQHandler
-
-        PUBWEAK SPI2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SPI2_IRQHandler
-        B SPI2_IRQHandler
-
-        PUBWEAK USART1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-USART1_IRQHandler
-        B USART1_IRQHandler
-
-        PUBWEAK USART2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-USART2_IRQHandler
-        B USART2_IRQHandler
-
-        PUBWEAK USART3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-USART3_IRQHandler
-        B USART3_IRQHandler
-
-        PUBWEAK EXTI15_10_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI15_10_IRQHandler
-        B EXTI15_10_IRQHandler
-
-        PUBWEAK RTC_Alarm_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-RTC_Alarm_IRQHandler
-        B RTC_Alarm_IRQHandler
-
-        END

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f101xe.s

@@ -1,425 +0,0 @@
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
-;* File Name          : startup_stm32f101xe.s
-;* Author             : MCD Application Team
-;* Description        : STM32F101xE Access Line Devices vector table for EWARM toolchain.
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == __iar_program_start,
-;*                      - Set the vector table entries with the exceptions ISR 
-;*                        address.
-;*                      - Configure the system clock
-;*                      - Branches to main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;*
-;* Copyright (c) 2017-2021 STMicroelectronics.
-;* All rights reserved.
-;*
-;* This software is licensed under terms that can be found in the LICENSE file
-;* in the root directory of this software component.
-;* If no LICENSE file comes with this software, it is provided AS-IS.
-;
-;*******************************************************************************
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;     
-  
-    MODULE  ?cstartup
-        
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit        
-        PUBLIC  __vector_table
-
-        DATA
-       
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler             ; Reset Handler
-        DCD     NMI_Handler               ; NMI Handler
-        DCD     HardFault_Handler         ; Hard Fault Handler
-        DCD     MemManage_Handler         ; MPU Fault Handler
-        DCD     BusFault_Handler          ; Bus Fault Handler
-        DCD     UsageFault_Handler        ; Usage Fault Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler               ; SVCall Handler
-        DCD     DebugMon_Handler          ; Debug Monitor Handler
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler            ; PendSV Handler
-        DCD     SysTick_Handler           ; SysTick Handler
-
-         ; External Interrupts
-        DCD     WWDG_IRQHandler           ; Window Watchdog
-        DCD     PVD_IRQHandler            ; PVD through EXTI Line detect
-        DCD     TAMPER_IRQHandler         ; Tamper
-        DCD     RTC_IRQHandler            ; RTC
-        DCD     FLASH_IRQHandler          ; Flash
-        DCD     RCC_IRQHandler            ; RCC
-        DCD     EXTI0_IRQHandler          ; EXTI Line 0
-        DCD     EXTI1_IRQHandler          ; EXTI Line 1
-        DCD     EXTI2_IRQHandler          ; EXTI Line 2
-        DCD     EXTI3_IRQHandler          ; EXTI Line 3
-        DCD     EXTI4_IRQHandler          ; EXTI Line 4
-        DCD     DMA1_Channel1_IRQHandler  ; DMA1 Channel 1
-        DCD     DMA1_Channel2_IRQHandler  ; DMA1 Channel 2
-        DCD     DMA1_Channel3_IRQHandler  ; DMA1 Channel 3
-        DCD     DMA1_Channel4_IRQHandler  ; DMA1 Channel 4
-        DCD     DMA1_Channel5_IRQHandler  ; DMA1 Channel 5
-        DCD     DMA1_Channel6_IRQHandler  ; DMA1 Channel 6
-        DCD     DMA1_Channel7_IRQHandler  ; DMA1 Channel 7
-        DCD     ADC1_IRQHandler         ; ADC1
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     EXTI9_5_IRQHandler        ; EXTI Line 9..5
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     TIM2_IRQHandler           ; TIM2
-        DCD     TIM3_IRQHandler           ; TIM3
-        DCD     TIM4_IRQHandler           ; TIM4
-        DCD     I2C1_EV_IRQHandler        ; I2C1 Event
-        DCD     I2C1_ER_IRQHandler        ; I2C1 Error
-        DCD     I2C2_EV_IRQHandler        ; I2C2 Event
-        DCD     I2C2_ER_IRQHandler        ; I2C2 Error
-        DCD     SPI1_IRQHandler           ; SPI1
-        DCD     SPI2_IRQHandler           ; SPI2
-        DCD     USART1_IRQHandler         ; USART1
-        DCD     USART2_IRQHandler         ; USART2
-        DCD     USART3_IRQHandler         ; USART3
-        DCD     EXTI15_10_IRQHandler      ; EXTI Line 15..10
-        DCD     RTC_Alarm_IRQHandler       ; RTC Alarm through EXTI Line
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     FSMC_IRQHandler           ; FSMC
-        DCD     0                         ; Reserved
-        DCD     TIM5_IRQHandler           ; TIM5
-        DCD     SPI3_IRQHandler           ; SPI3
-        DCD     UART4_IRQHandler          ; UART4
-        DCD     UART5_IRQHandler          ; UART5
-        DCD     TIM6_IRQHandler           ; TIM6
-        DCD     TIM7_IRQHandler           ; TIM7
-        DCD     DMA2_Channel1_IRQHandler  ; DMA2 Channel1
-        DCD     DMA2_Channel2_IRQHandler  ; DMA2 Channel2
-        DCD     DMA2_Channel3_IRQHandler  ; DMA2 Channel3
-        DCD     DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
-        THUMB
-
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:REORDER:NOROOT(2)
-Reset_Handler
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-               
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-NMI_Handler
-        B NMI_Handler
-
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-HardFault_Handler
-        B HardFault_Handler
-
-        PUBWEAK MemManage_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-MemManage_Handler
-        B MemManage_Handler
-
-        PUBWEAK BusFault_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-BusFault_Handler
-        B BusFault_Handler
-
-        PUBWEAK UsageFault_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-UsageFault_Handler
-        B UsageFault_Handler
-
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SVC_Handler
-        B SVC_Handler
-
-        PUBWEAK DebugMon_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DebugMon_Handler
-        B DebugMon_Handler
-
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-PendSV_Handler
-        B PendSV_Handler
-
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SysTick_Handler
-        B SysTick_Handler
-
-        PUBWEAK WWDG_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-WWDG_IRQHandler
-        B WWDG_IRQHandler
-
-        PUBWEAK PVD_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-PVD_IRQHandler
-        B PVD_IRQHandler
-
-        PUBWEAK TAMPER_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TAMPER_IRQHandler
-        B TAMPER_IRQHandler
-
-        PUBWEAK RTC_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-RTC_IRQHandler
-        B RTC_IRQHandler
-
-        PUBWEAK FLASH_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-FLASH_IRQHandler
-        B FLASH_IRQHandler
-
-        PUBWEAK RCC_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-RCC_IRQHandler
-        B RCC_IRQHandler
-
-        PUBWEAK EXTI0_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI0_IRQHandler
-        B EXTI0_IRQHandler
-
-        PUBWEAK EXTI1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI1_IRQHandler
-        B EXTI1_IRQHandler
-
-        PUBWEAK EXTI2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI2_IRQHandler
-        B EXTI2_IRQHandler
-
-        PUBWEAK EXTI3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI3_IRQHandler
-        B EXTI3_IRQHandler
-
-        PUBWEAK EXTI4_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI4_IRQHandler
-        B EXTI4_IRQHandler
-
-        PUBWEAK DMA1_Channel1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel1_IRQHandler
-        B DMA1_Channel1_IRQHandler
-
-        PUBWEAK DMA1_Channel2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel2_IRQHandler
-        B DMA1_Channel2_IRQHandler
-
-        PUBWEAK DMA1_Channel3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel3_IRQHandler
-        B DMA1_Channel3_IRQHandler
-
-        PUBWEAK DMA1_Channel4_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel4_IRQHandler
-        B DMA1_Channel4_IRQHandler
-
-        PUBWEAK DMA1_Channel5_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel5_IRQHandler
-        B DMA1_Channel5_IRQHandler
-
-        PUBWEAK DMA1_Channel6_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel6_IRQHandler
-        B DMA1_Channel6_IRQHandler
-
-        PUBWEAK DMA1_Channel7_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel7_IRQHandler
-        B DMA1_Channel7_IRQHandler
-
-        PUBWEAK ADC1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-ADC1_IRQHandler
-        B ADC1_IRQHandler
- 
-        PUBWEAK EXTI9_5_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI9_5_IRQHandler
-        B EXTI9_5_IRQHandler
-
-        PUBWEAK TIM2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM2_IRQHandler
-        B TIM2_IRQHandler
-
-        PUBWEAK TIM3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM3_IRQHandler
-        B TIM3_IRQHandler
-
-        PUBWEAK TIM4_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM4_IRQHandler
-        B TIM4_IRQHandler
-
-        PUBWEAK I2C1_EV_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-I2C1_EV_IRQHandler
-        B I2C1_EV_IRQHandler
-
-        PUBWEAK I2C1_ER_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-I2C1_ER_IRQHandler
-        B I2C1_ER_IRQHandler
-
-        PUBWEAK I2C2_EV_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-I2C2_EV_IRQHandler
-        B I2C2_EV_IRQHandler
-
-        PUBWEAK I2C2_ER_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-I2C2_ER_IRQHandler
-        B I2C2_ER_IRQHandler
-
-        PUBWEAK SPI1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SPI1_IRQHandler
-        B SPI1_IRQHandler
-
-        PUBWEAK SPI2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SPI2_IRQHandler
-        B SPI2_IRQHandler
-
-        PUBWEAK USART1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-USART1_IRQHandler
-        B USART1_IRQHandler
-
-        PUBWEAK USART2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-USART2_IRQHandler
-        B USART2_IRQHandler
-
-        PUBWEAK USART3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-USART3_IRQHandler
-        B USART3_IRQHandler
-
-        PUBWEAK EXTI15_10_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI15_10_IRQHandler
-        B EXTI15_10_IRQHandler
-
-        PUBWEAK RTC_Alarm_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-RTC_Alarm_IRQHandler
-        B RTC_Alarm_IRQHandler
-
-        PUBWEAK FSMC_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-FSMC_IRQHandler
-        B FSMC_IRQHandler
-
-        PUBWEAK SDIO_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SDIO_IRQHandler
-        B SDIO_IRQHandler
-
-        PUBWEAK TIM5_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM5_IRQHandler
-        B TIM5_IRQHandler
-
-        PUBWEAK SPI3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SPI3_IRQHandler
-        B SPI3_IRQHandler
-
-        PUBWEAK UART4_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-UART4_IRQHandler
-        B UART4_IRQHandler
-
-        PUBWEAK UART5_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-UART5_IRQHandler
-        B UART5_IRQHandler
-
-        PUBWEAK TIM6_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM6_IRQHandler
-        B TIM6_IRQHandler
-
-        PUBWEAK TIM7_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM7_IRQHandler
-        B TIM7_IRQHandler
-
-        PUBWEAK DMA2_Channel1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA2_Channel1_IRQHandler
-        B DMA2_Channel1_IRQHandler
-
-        PUBWEAK DMA2_Channel2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA2_Channel2_IRQHandler
-        B DMA2_Channel2_IRQHandler
-
-        PUBWEAK DMA2_Channel3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA2_Channel3_IRQHandler
-        B DMA2_Channel3_IRQHandler
-
-        PUBWEAK DMA2_Channel4_5_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA2_Channel4_5_IRQHandler
-        B DMA2_Channel4_5_IRQHandler
-        
-        
-        END
-

Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f101xg.s

@@ -1,456 +0,0 @@
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
-;* File Name          : startup_stm32f101xg.s
-;* Author             : MCD Application Team
-;* Description        : STM32F101xG Access Line Devices vector table for EWARM 
-;*                      toolchain.
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == __iar_program_start,
-;*                      - Set the vector table entries with the exceptions ISR 
-;*                        address.
-;*                      - Configure the system clock
-;*                      - Branches to main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;*
-;* Copyright (c) 2017-2021 STMicroelectronics.
-;* All rights reserved.
-;*
-;* This software is licensed under terms that can be found in the LICENSE file
-;* in the root directory of this software component.
-;* If no LICENSE file comes with this software, it is provided AS-IS.
-;
-;*******************************************************************************
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;     
-  
-    MODULE  ?cstartup
-        
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit        
-        PUBLIC  __vector_table
-
-        DATA
-       
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler             ; Reset Handler
-        DCD     NMI_Handler               ; NMI Handler
-        DCD     HardFault_Handler         ; Hard Fault Handler
-        DCD     MemManage_Handler         ; MPU Fault Handler
-        DCD     BusFault_Handler          ; Bus Fault Handler
-        DCD     UsageFault_Handler        ; Usage Fault Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler               ; SVCall Handler
-        DCD     DebugMon_Handler          ; Debug Monitor Handler
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler            ; PendSV Handler
-        DCD     SysTick_Handler           ; SysTick Handler
-
-         ; External Interrupts
-        DCD     WWDG_IRQHandler               ; Window Watchdog
-        DCD     PVD_IRQHandler                ; PVD through EXTI Line detect
-        DCD     TAMPER_IRQHandler             ; Tamper
-        DCD     RTC_IRQHandler                ; RTC
-        DCD     FLASH_IRQHandler              ; Flash
-        DCD     RCC_IRQHandler                ; RCC
-        DCD     EXTI0_IRQHandler              ; EXTI Line 0
-        DCD     EXTI1_IRQHandler              ; EXTI Line 1
-        DCD     EXTI2_IRQHandler              ; EXTI Line 2
-        DCD     EXTI3_IRQHandler              ; EXTI Line 3
-        DCD     EXTI4_IRQHandler              ; EXTI Line 4
-        DCD     DMA1_Channel1_IRQHandler      ; DMA1 Channel 1
-        DCD     DMA1_Channel2_IRQHandler      ; DMA1 Channel 2
-        DCD     DMA1_Channel3_IRQHandler      ; DMA1 Channel 3
-        DCD     DMA1_Channel4_IRQHandler      ; DMA1 Channel 4
-        DCD     DMA1_Channel5_IRQHandler      ; DMA1 Channel 5
-        DCD     DMA1_Channel6_IRQHandler      ; DMA1 Channel 6
-        DCD     DMA1_Channel7_IRQHandler      ; DMA1 Channel 7
-        DCD     ADC1_IRQHandler               ; ADC1
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     EXTI9_5_IRQHandler            ; EXTI Line 9..5
-        DCD     TIM9_IRQHandler               ; TIM9
-        DCD     TIM10_IRQHandler              ; TIM10
-        DCD     TIM11_IRQHandler              ; TIM11
-        DCD     0                         ; Reserved
-        DCD     TIM2_IRQHandler               ; TIM2
-        DCD     TIM3_IRQHandler               ; TIM3
-        DCD     TIM4_IRQHandler               ; TIM4
-        DCD     I2C1_EV_IRQHandler            ; I2C1 Event
-        DCD     I2C1_ER_IRQHandler            ; I2C1 Error
-        DCD     I2C2_EV_IRQHandler            ; I2C2 Event
-        DCD     I2C2_ER_IRQHandler            ; I2C2 Error
-        DCD     SPI1_IRQHandler               ; SPI1
-        DCD     SPI2_IRQHandler               ; SPI2
-        DCD     USART1_IRQHandler             ; USART1
-        DCD     USART2_IRQHandler             ; USART2
-        DCD     USART3_IRQHandler             ; USART3
-        DCD     EXTI15_10_IRQHandler          ; EXTI Line 15..10
-        DCD     RTC_Alarm_IRQHandler           ; RTC Alarm through EXTI Line
-        DCD     0                         ; Reserved
-        DCD     TIM12_IRQHandler              ; TIM12
-        DCD     TIM13_IRQHandler              ; TIM13
-        DCD     TIM14_IRQHandler              ; TIM14
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     FSMC_IRQHandler               ; FSMC
-        DCD     0                         ; Reserved
-        DCD     TIM5_IRQHandler               ; TIM5
-        DCD     SPI3_IRQHandler               ; SPI3
-        DCD     UART4_IRQHandler              ; UART4
-        DCD     UART5_IRQHandler              ; UART5
-        DCD     TIM6_IRQHandler               ; TIM6
-        DCD     TIM7_IRQHandler               ; TIM7
-        DCD     DMA2_Channel1_IRQHandler      ; DMA2 Channel1
-        DCD     DMA2_Channel2_IRQHandler      ; DMA2 Channel2
-        DCD     DMA2_Channel3_IRQHandler      ; DMA2 Channel3
-        DCD     DMA2_Channel4_5_IRQHandler    ; DMA2 Channel4 & Channel5
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
-        THUMB
-
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:REORDER:NOROOT(2)
-Reset_Handler
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-               
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-NMI_Handler
-        B NMI_Handler
-
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-HardFault_Handler
-        B HardFault_Handler
-
-        PUBWEAK MemManage_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-MemManage_Handler
-        B MemManage_Handler
-
-        PUBWEAK BusFault_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-BusFault_Handler
-        B BusFault_Handler
-
-        PUBWEAK UsageFault_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-UsageFault_Handler
-        B UsageFault_Handler
-
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SVC_Handler
-        B SVC_Handler
-
-        PUBWEAK DebugMon_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DebugMon_Handler
-        B DebugMon_Handler
-
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-PendSV_Handler
-        B PendSV_Handler
-
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SysTick_Handler
-        B SysTick_Handler
-
-        PUBWEAK WWDG_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-WWDG_IRQHandler
-        B WWDG_IRQHandler
-
-        PUBWEAK PVD_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-PVD_IRQHandler
-        B PVD_IRQHandler
-
-        PUBWEAK TAMPER_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TAMPER_IRQHandler
-        B TAMPER_IRQHandler
-
-        PUBWEAK RTC_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-RTC_IRQHandler
-        B RTC_IRQHandler
-
-        PUBWEAK FLASH_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-FLASH_IRQHandler
-        B FLASH_IRQHandler
-
-        PUBWEAK RCC_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-RCC_IRQHandler
-        B RCC_IRQHandler
-
-        PUBWEAK EXTI0_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI0_IRQHandler
-        B EXTI0_IRQHandler
-
-        PUBWEAK EXTI1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI1_IRQHandler
-        B EXTI1_IRQHandler
-
-        PUBWEAK EXTI2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI2_IRQHandler
-        B EXTI2_IRQHandler
-
-        PUBWEAK EXTI3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI3_IRQHandler
-        B EXTI3_IRQHandler
-
-        PUBWEAK EXTI4_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI4_IRQHandler
-        B EXTI4_IRQHandler
-
-        PUBWEAK DMA1_Channel1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel1_IRQHandler
-        B DMA1_Channel1_IRQHandler
-
-        PUBWEAK DMA1_Channel2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel2_IRQHandler
-        B DMA1_Channel2_IRQHandler
-
-        PUBWEAK DMA1_Channel3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel3_IRQHandler
-        B DMA1_Channel3_IRQHandler
-
-        PUBWEAK DMA1_Channel4_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel4_IRQHandler
-        B DMA1_Channel4_IRQHandler
-
-        PUBWEAK DMA1_Channel5_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel5_IRQHandler
-        B DMA1_Channel5_IRQHandler
-
-        PUBWEAK DMA1_Channel6_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel6_IRQHandler
-        B DMA1_Channel6_IRQHandler
-
-        PUBWEAK DMA1_Channel7_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA1_Channel7_IRQHandler
-        B DMA1_Channel7_IRQHandler
-
-        PUBWEAK ADC1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-ADC1_IRQHandler
-        B ADC1_IRQHandler
-
-         PUBWEAK EXTI9_5_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI9_5_IRQHandler
-        B EXTI9_5_IRQHandler
-
-        PUBWEAK TIM9_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM9_IRQHandler
-        B TIM9_IRQHandler
-
-        PUBWEAK TIM10_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM10_IRQHandler
-        B TIM10_IRQHandler
-
-        PUBWEAK TIM11_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM11_IRQHandler
-        B TIM11_IRQHandler
-
-        PUBWEAK TIM1_CC_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM1_CC_IRQHandler
-        B TIM1_CC_IRQHandler
-
-        PUBWEAK TIM2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM2_IRQHandler
-        B TIM2_IRQHandler
-
-        PUBWEAK TIM3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM3_IRQHandler
-        B TIM3_IRQHandler
-
-        PUBWEAK TIM4_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM4_IRQHandler
-        B TIM4_IRQHandler
-
-        PUBWEAK I2C1_EV_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-I2C1_EV_IRQHandler
-        B I2C1_EV_IRQHandler
-
-        PUBWEAK I2C1_ER_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-I2C1_ER_IRQHandler
-        B I2C1_ER_IRQHandler
-
-        PUBWEAK I2C2_EV_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-I2C2_EV_IRQHandler
-        B I2C2_EV_IRQHandler
-
-        PUBWEAK I2C2_ER_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-I2C2_ER_IRQHandler
-        B I2C2_ER_IRQHandler
-
-        PUBWEAK SPI1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SPI1_IRQHandler
-        B SPI1_IRQHandler
-
-        PUBWEAK SPI2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SPI2_IRQHandler
-        B SPI2_IRQHandler
-
-        PUBWEAK USART1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-USART1_IRQHandler
-        B USART1_IRQHandler
-
-        PUBWEAK USART2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-USART2_IRQHandler
-        B USART2_IRQHandler
-
-        PUBWEAK USART3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-USART3_IRQHandler
-        B USART3_IRQHandler
-
-        PUBWEAK EXTI15_10_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-EXTI15_10_IRQHandler
-        B EXTI15_10_IRQHandler
-
-        PUBWEAK RTC_Alarm_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-RTC_Alarm_IRQHandler
-        B RTC_Alarm_IRQHandler
-
-        PUBWEAK FSMC_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-FSMC_IRQHandler
-        B FSMC_IRQHandler
-
-        PUBWEAK TIM12_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM12_IRQHandler
-        B TIM12_IRQHandler
-
-        PUBWEAK TIM13_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM13_IRQHandler
-        B TIM13_IRQHandler
-
-        PUBWEAK TIM14_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM14_IRQHandler
-        B TIM14_IRQHandler
-
-        PUBWEAK TIM5_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM5_IRQHandler
-        B TIM5_IRQHandler
-
-        PUBWEAK SPI3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-SPI3_IRQHandler
-        B SPI3_IRQHandler
-
-        PUBWEAK UART4_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-UART4_IRQHandler
-        B UART4_IRQHandler
-
-        PUBWEAK UART5_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-UART5_IRQHandler
-        B UART5_IRQHandler
-
-        PUBWEAK TIM6_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM6_IRQHandler
-        B TIM6_IRQHandler
-
-        PUBWEAK TIM7_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-TIM7_IRQHandler
-        B TIM7_IRQHandler
-
-        PUBWEAK DMA2_Channel1_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA2_Channel1_IRQHandler
-        B DMA2_Channel1_IRQHandler
-
-        PUBWEAK DMA2_Channel2_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA2_Channel2_IRQHandler
-        B DMA2_Channel2_IRQHandler
-
-        PUBWEAK DMA2_Channel3_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA2_Channel3_IRQHandler
-        B DMA2_Channel3_IRQHandler
-
-        PUBWEAK DMA2_Channel4_5_IRQHandler
-        SECTION .text:CODE:REORDER:NOROOT(1)
-DMA2_Channel4_5_IRQHandler
-        B DMA2_Channel4_5_IRQHandler
-        
-        
-        END
-