gaoro-xiao
efb88ea367
- increase UART DMA/ring buffer sizes for mux traffic - switch SPI1 to Mode0 with prescaler /2 and align CubeMX settings - refactor CH390 memory read/write path with chunked SPI read and HAL bulk write - fallback to hardware MAC when configured MAC is invalid (all-zero) - add mux frame RTT logs and remove redundant UART1 polling - update Keil post-build viewer integration and include build viewer artifacts - update AT manual with all-zero MAC behavior
138 lines
3.8 KiB
C
138 lines
3.8 KiB
C
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file spi.c
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* @brief This file provides code for the configuration
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* of the SPI instances.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2026 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "spi.h"
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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SPI_HandleTypeDef hspi1;
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/* SPI1 init function */
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void MX_SPI1_Init(void)
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{
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/* USER CODE BEGIN SPI1_Init 0 */
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/* USER CODE END SPI1_Init 0 */
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/* USER CODE BEGIN SPI1_Init 1 */
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/* USER CODE END SPI1_Init 1 */
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hspi1.Instance = SPI1;
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hspi1.Init.Mode = SPI_MODE_MASTER;
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hspi1.Init.Direction = SPI_DIRECTION_2LINES;
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hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
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hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; /* Match CH390 runtime baseline: CPOL=Low */
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hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; /* Match CH390 runtime baseline: CPHA=1Edge (Mode 0) */
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hspi1.Init.NSS = SPI_NSS_SOFT; /* Software CS control for CH390 */
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hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; /* 72MHz/2 = 36MHz, max SPI1 clock at current APB2 */
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hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
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hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
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hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
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hspi1.Init.CRCPolynomial = 10;
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if (HAL_SPI_Init(&hspi1) != HAL_OK)
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{
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Error_Handler();
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}
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/* USER CODE BEGIN SPI1_Init 2 */
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/* USER CODE END SPI1_Init 2 */
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}
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void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
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{
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GPIO_InitTypeDef GPIO_InitStruct = {0};
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if(spiHandle->Instance==SPI1)
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{
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/* USER CODE BEGIN SPI1_MspInit 0 */
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/* USER CODE END SPI1_MspInit 0 */
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/* SPI1 clock enable */
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__HAL_RCC_SPI1_CLK_ENABLE();
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__HAL_RCC_GPIOA_CLK_ENABLE();
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/**SPI1 GPIO Configuration
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PA4 ------> GPIO_Output
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PA5 ------> SPI1_SCK
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PA6 ------> SPI1_MISO
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PA7 ------> SPI1_MOSI
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*/
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/* SCK and MOSI as AF Push-Pull */
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GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_7;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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/* MISO as Input */
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GPIO_InitStruct.Pin = GPIO_PIN_6;
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GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = GPIO_PIN_4;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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/* SPI1 interrupt Init */
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HAL_NVIC_SetPriority(SPI1_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(SPI1_IRQn);
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/* USER CODE BEGIN SPI1_MspInit 1 */
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/* USER CODE END SPI1_MspInit 1 */
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}
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}
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void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle)
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{
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if(spiHandle->Instance==SPI1)
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{
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/* USER CODE BEGIN SPI1_MspDeInit 0 */
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/* USER CODE END SPI1_MspDeInit 0 */
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/* Peripheral clock disable */
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__HAL_RCC_SPI1_CLK_DISABLE();
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/**SPI1 GPIO Configuration
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PA4 ------> GPIO_Output
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PA5 ------> SPI1_SCK
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PA6 ------> SPI1_MISO
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PA7 ------> SPI1_MOSI
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*/
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HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7);
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/* SPI1 interrupt Deinit */
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HAL_NVIC_DisableIRQ(SPI1_IRQn);
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/* USER CODE BEGIN SPI1_MspDeInit 1 */
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/* USER CODE END SPI1_MspDeInit 1 */
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}
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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